rtc-rs5c372.c 17 KB

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  1. /*
  2. * An I2C driver for Ricoh RS5C372, R2025S/D and RV5C38[67] RTCs
  3. *
  4. * Copyright (C) 2005 Pavel Mironchik <pmironchik@optifacio.net>
  5. * Copyright (C) 2006 Tower Technologies
  6. * Copyright (C) 2008 Paul Mundt
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/i2c.h>
  13. #include <linux/rtc.h>
  14. #include <linux/bcd.h>
  15. #include <linux/slab.h>
  16. #include <linux/module.h>
  17. /*
  18. * Ricoh has a family of I2C based RTCs, which differ only slightly from
  19. * each other. Differences center on pinout (e.g. how many interrupts,
  20. * output clock, etc) and how the control registers are used. The '372
  21. * is significant only because that's the one this driver first supported.
  22. */
  23. #define RS5C372_REG_SECS 0
  24. #define RS5C372_REG_MINS 1
  25. #define RS5C372_REG_HOURS 2
  26. #define RS5C372_REG_WDAY 3
  27. #define RS5C372_REG_DAY 4
  28. #define RS5C372_REG_MONTH 5
  29. #define RS5C372_REG_YEAR 6
  30. #define RS5C372_REG_TRIM 7
  31. # define RS5C372_TRIM_XSL 0x80
  32. # define RS5C372_TRIM_MASK 0x7F
  33. #define RS5C_REG_ALARM_A_MIN 8 /* or ALARM_W */
  34. #define RS5C_REG_ALARM_A_HOURS 9
  35. #define RS5C_REG_ALARM_A_WDAY 10
  36. #define RS5C_REG_ALARM_B_MIN 11 /* or ALARM_D */
  37. #define RS5C_REG_ALARM_B_HOURS 12
  38. #define RS5C_REG_ALARM_B_WDAY 13 /* (ALARM_B only) */
  39. #define RS5C_REG_CTRL1 14
  40. # define RS5C_CTRL1_AALE (1 << 7) /* or WALE */
  41. # define RS5C_CTRL1_BALE (1 << 6) /* or DALE */
  42. # define RV5C387_CTRL1_24 (1 << 5)
  43. # define RS5C372A_CTRL1_SL1 (1 << 5)
  44. # define RS5C_CTRL1_CT_MASK (7 << 0)
  45. # define RS5C_CTRL1_CT0 (0 << 0) /* no periodic irq */
  46. # define RS5C_CTRL1_CT4 (4 << 0) /* 1 Hz level irq */
  47. #define RS5C_REG_CTRL2 15
  48. # define RS5C372_CTRL2_24 (1 << 5)
  49. # define R2025_CTRL2_XST (1 << 5)
  50. # define RS5C_CTRL2_XSTP (1 << 4) /* only if !R2025S/D */
  51. # define RS5C_CTRL2_CTFG (1 << 2)
  52. # define RS5C_CTRL2_AAFG (1 << 1) /* or WAFG */
  53. # define RS5C_CTRL2_BAFG (1 << 0) /* or DAFG */
  54. /* to read (style 1) or write registers starting at R */
  55. #define RS5C_ADDR(R) (((R) << 4) | 0)
  56. enum rtc_type {
  57. rtc_undef = 0,
  58. rtc_r2025sd,
  59. rtc_r2221tl,
  60. rtc_rs5c372a,
  61. rtc_rs5c372b,
  62. rtc_rv5c386,
  63. rtc_rv5c387a,
  64. };
  65. static const struct i2c_device_id rs5c372_id[] = {
  66. { "r2025sd", rtc_r2025sd },
  67. { "r2221tl", rtc_r2221tl },
  68. { "rs5c372a", rtc_rs5c372a },
  69. { "rs5c372b", rtc_rs5c372b },
  70. { "rv5c386", rtc_rv5c386 },
  71. { "rv5c387a", rtc_rv5c387a },
  72. { }
  73. };
  74. MODULE_DEVICE_TABLE(i2c, rs5c372_id);
  75. /* REVISIT: this assumes that:
  76. * - we're in the 21st century, so it's safe to ignore the century
  77. * bit for rv5c38[67] (REG_MONTH bit 7);
  78. * - we should use ALARM_A not ALARM_B (may be wrong on some boards)
  79. */
  80. struct rs5c372 {
  81. struct i2c_client *client;
  82. struct rtc_device *rtc;
  83. enum rtc_type type;
  84. unsigned time24:1;
  85. unsigned has_irq:1;
  86. unsigned smbus:1;
  87. char buf[17];
  88. char *regs;
  89. };
  90. static int rs5c_get_regs(struct rs5c372 *rs5c)
  91. {
  92. struct i2c_client *client = rs5c->client;
  93. struct i2c_msg msgs[] = {
  94. {
  95. .addr = client->addr,
  96. .flags = I2C_M_RD,
  97. .len = sizeof(rs5c->buf),
  98. .buf = rs5c->buf
  99. },
  100. };
  101. /* This implements the third reading method from the datasheet, using
  102. * an internal address that's reset after each transaction (by STOP)
  103. * to 0x0f ... so we read extra registers, and skip the first one.
  104. *
  105. * The first method doesn't work with the iop3xx adapter driver, on at
  106. * least 80219 chips; this works around that bug.
  107. *
  108. * The third method on the other hand doesn't work for the SMBus-only
  109. * configurations, so we use the the first method there, stripping off
  110. * the extra register in the process.
  111. */
  112. if (rs5c->smbus) {
  113. int addr = RS5C_ADDR(RS5C372_REG_SECS);
  114. int size = sizeof(rs5c->buf) - 1;
  115. if (i2c_smbus_read_i2c_block_data(client, addr, size,
  116. rs5c->buf + 1) != size) {
  117. dev_warn(&client->dev, "can't read registers\n");
  118. return -EIO;
  119. }
  120. } else {
  121. if ((i2c_transfer(client->adapter, msgs, 1)) != 1) {
  122. dev_warn(&client->dev, "can't read registers\n");
  123. return -EIO;
  124. }
  125. }
  126. dev_dbg(&client->dev,
  127. "%3ph (%02x) %3ph (%02x), %3ph, %3ph; %02x %02x\n",
  128. rs5c->regs + 0, rs5c->regs[3],
  129. rs5c->regs + 4, rs5c->regs[7],
  130. rs5c->regs + 8, rs5c->regs + 11,
  131. rs5c->regs[14], rs5c->regs[15]);
  132. return 0;
  133. }
  134. static unsigned rs5c_reg2hr(struct rs5c372 *rs5c, unsigned reg)
  135. {
  136. unsigned hour;
  137. if (rs5c->time24)
  138. return bcd2bin(reg & 0x3f);
  139. hour = bcd2bin(reg & 0x1f);
  140. if (hour == 12)
  141. hour = 0;
  142. if (reg & 0x20)
  143. hour += 12;
  144. return hour;
  145. }
  146. static unsigned rs5c_hr2reg(struct rs5c372 *rs5c, unsigned hour)
  147. {
  148. if (rs5c->time24)
  149. return bin2bcd(hour);
  150. if (hour > 12)
  151. return 0x20 | bin2bcd(hour - 12);
  152. if (hour == 12)
  153. return 0x20 | bin2bcd(12);
  154. if (hour == 0)
  155. return bin2bcd(12);
  156. return bin2bcd(hour);
  157. }
  158. static int rs5c372_get_datetime(struct i2c_client *client, struct rtc_time *tm)
  159. {
  160. struct rs5c372 *rs5c = i2c_get_clientdata(client);
  161. int status = rs5c_get_regs(rs5c);
  162. if (status < 0)
  163. return status;
  164. tm->tm_sec = bcd2bin(rs5c->regs[RS5C372_REG_SECS] & 0x7f);
  165. tm->tm_min = bcd2bin(rs5c->regs[RS5C372_REG_MINS] & 0x7f);
  166. tm->tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C372_REG_HOURS]);
  167. tm->tm_wday = bcd2bin(rs5c->regs[RS5C372_REG_WDAY] & 0x07);
  168. tm->tm_mday = bcd2bin(rs5c->regs[RS5C372_REG_DAY] & 0x3f);
  169. /* tm->tm_mon is zero-based */
  170. tm->tm_mon = bcd2bin(rs5c->regs[RS5C372_REG_MONTH] & 0x1f) - 1;
  171. /* year is 1900 + tm->tm_year */
  172. tm->tm_year = bcd2bin(rs5c->regs[RS5C372_REG_YEAR]) + 100;
  173. dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
  174. "mday=%d, mon=%d, year=%d, wday=%d\n",
  175. __func__,
  176. tm->tm_sec, tm->tm_min, tm->tm_hour,
  177. tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
  178. /* rtc might need initialization */
  179. return rtc_valid_tm(tm);
  180. }
  181. static int rs5c372_set_datetime(struct i2c_client *client, struct rtc_time *tm)
  182. {
  183. struct rs5c372 *rs5c = i2c_get_clientdata(client);
  184. unsigned char buf[7];
  185. int addr;
  186. dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d "
  187. "mday=%d, mon=%d, year=%d, wday=%d\n",
  188. __func__,
  189. tm->tm_sec, tm->tm_min, tm->tm_hour,
  190. tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
  191. addr = RS5C_ADDR(RS5C372_REG_SECS);
  192. buf[0] = bin2bcd(tm->tm_sec);
  193. buf[1] = bin2bcd(tm->tm_min);
  194. buf[2] = rs5c_hr2reg(rs5c, tm->tm_hour);
  195. buf[3] = bin2bcd(tm->tm_wday);
  196. buf[4] = bin2bcd(tm->tm_mday);
  197. buf[5] = bin2bcd(tm->tm_mon + 1);
  198. buf[6] = bin2bcd(tm->tm_year - 100);
  199. if (i2c_smbus_write_i2c_block_data(client, addr, sizeof(buf), buf) < 0) {
  200. dev_err(&client->dev, "%s: write error\n", __func__);
  201. return -EIO;
  202. }
  203. return 0;
  204. }
  205. #if IS_ENABLED(CONFIG_RTC_INTF_PROC)
  206. #define NEED_TRIM
  207. #endif
  208. #if IS_ENABLED(CONFIG_RTC_INTF_SYSFS)
  209. #define NEED_TRIM
  210. #endif
  211. #ifdef NEED_TRIM
  212. static int rs5c372_get_trim(struct i2c_client *client, int *osc, int *trim)
  213. {
  214. struct rs5c372 *rs5c372 = i2c_get_clientdata(client);
  215. u8 tmp = rs5c372->regs[RS5C372_REG_TRIM];
  216. if (osc)
  217. *osc = (tmp & RS5C372_TRIM_XSL) ? 32000 : 32768;
  218. if (trim) {
  219. dev_dbg(&client->dev, "%s: raw trim=%x\n", __func__, tmp);
  220. tmp &= RS5C372_TRIM_MASK;
  221. if (tmp & 0x3e) {
  222. int t = tmp & 0x3f;
  223. if (tmp & 0x40)
  224. t = (~t | (s8)0xc0) + 1;
  225. else
  226. t = t - 1;
  227. tmp = t * 2;
  228. } else
  229. tmp = 0;
  230. *trim = tmp;
  231. }
  232. return 0;
  233. }
  234. #endif
  235. static int rs5c372_rtc_read_time(struct device *dev, struct rtc_time *tm)
  236. {
  237. return rs5c372_get_datetime(to_i2c_client(dev), tm);
  238. }
  239. static int rs5c372_rtc_set_time(struct device *dev, struct rtc_time *tm)
  240. {
  241. return rs5c372_set_datetime(to_i2c_client(dev), tm);
  242. }
  243. static int rs5c_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
  244. {
  245. struct i2c_client *client = to_i2c_client(dev);
  246. struct rs5c372 *rs5c = i2c_get_clientdata(client);
  247. unsigned char buf;
  248. int status, addr;
  249. buf = rs5c->regs[RS5C_REG_CTRL1];
  250. if (!rs5c->has_irq)
  251. return -EINVAL;
  252. status = rs5c_get_regs(rs5c);
  253. if (status < 0)
  254. return status;
  255. addr = RS5C_ADDR(RS5C_REG_CTRL1);
  256. if (enabled)
  257. buf |= RS5C_CTRL1_AALE;
  258. else
  259. buf &= ~RS5C_CTRL1_AALE;
  260. if (i2c_smbus_write_byte_data(client, addr, buf) < 0) {
  261. dev_warn(dev, "can't update alarm\n");
  262. status = -EIO;
  263. } else
  264. rs5c->regs[RS5C_REG_CTRL1] = buf;
  265. return status;
  266. }
  267. /* NOTE: Since RTC_WKALM_{RD,SET} were originally defined for EFI,
  268. * which only exposes a polled programming interface; and since
  269. * these calls map directly to those EFI requests; we don't demand
  270. * we have an IRQ for this chip when we go through this API.
  271. *
  272. * The older x86_pc derived RTC_ALM_{READ,SET} calls require irqs
  273. * though, managed through RTC_AIE_{ON,OFF} requests.
  274. */
  275. static int rs5c_read_alarm(struct device *dev, struct rtc_wkalrm *t)
  276. {
  277. struct i2c_client *client = to_i2c_client(dev);
  278. struct rs5c372 *rs5c = i2c_get_clientdata(client);
  279. int status;
  280. status = rs5c_get_regs(rs5c);
  281. if (status < 0)
  282. return status;
  283. /* report alarm time */
  284. t->time.tm_sec = 0;
  285. t->time.tm_min = bcd2bin(rs5c->regs[RS5C_REG_ALARM_A_MIN] & 0x7f);
  286. t->time.tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C_REG_ALARM_A_HOURS]);
  287. /* ... and status */
  288. t->enabled = !!(rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE);
  289. t->pending = !!(rs5c->regs[RS5C_REG_CTRL2] & RS5C_CTRL2_AAFG);
  290. return 0;
  291. }
  292. static int rs5c_set_alarm(struct device *dev, struct rtc_wkalrm *t)
  293. {
  294. struct i2c_client *client = to_i2c_client(dev);
  295. struct rs5c372 *rs5c = i2c_get_clientdata(client);
  296. int status, addr, i;
  297. unsigned char buf[3];
  298. /* only handle up to 24 hours in the future, like RTC_ALM_SET */
  299. if (t->time.tm_mday != -1
  300. || t->time.tm_mon != -1
  301. || t->time.tm_year != -1)
  302. return -EINVAL;
  303. /* REVISIT: round up tm_sec */
  304. /* if needed, disable irq (clears pending status) */
  305. status = rs5c_get_regs(rs5c);
  306. if (status < 0)
  307. return status;
  308. if (rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE) {
  309. addr = RS5C_ADDR(RS5C_REG_CTRL1);
  310. buf[0] = rs5c->regs[RS5C_REG_CTRL1] & ~RS5C_CTRL1_AALE;
  311. if (i2c_smbus_write_byte_data(client, addr, buf[0]) < 0) {
  312. dev_dbg(dev, "can't disable alarm\n");
  313. return -EIO;
  314. }
  315. rs5c->regs[RS5C_REG_CTRL1] = buf[0];
  316. }
  317. /* set alarm */
  318. buf[0] = bin2bcd(t->time.tm_min);
  319. buf[1] = rs5c_hr2reg(rs5c, t->time.tm_hour);
  320. buf[2] = 0x7f; /* any/all days */
  321. for (i = 0; i < sizeof(buf); i++) {
  322. addr = RS5C_ADDR(RS5C_REG_ALARM_A_MIN + i);
  323. if (i2c_smbus_write_byte_data(client, addr, buf[i]) < 0) {
  324. dev_dbg(dev, "can't set alarm time\n");
  325. return -EIO;
  326. }
  327. }
  328. /* ... and maybe enable its irq */
  329. if (t->enabled) {
  330. addr = RS5C_ADDR(RS5C_REG_CTRL1);
  331. buf[0] = rs5c->regs[RS5C_REG_CTRL1] | RS5C_CTRL1_AALE;
  332. if (i2c_smbus_write_byte_data(client, addr, buf[0]) < 0)
  333. dev_warn(dev, "can't enable alarm\n");
  334. rs5c->regs[RS5C_REG_CTRL1] = buf[0];
  335. }
  336. return 0;
  337. }
  338. #if IS_ENABLED(CONFIG_RTC_INTF_PROC)
  339. static int rs5c372_rtc_proc(struct device *dev, struct seq_file *seq)
  340. {
  341. int err, osc, trim;
  342. err = rs5c372_get_trim(to_i2c_client(dev), &osc, &trim);
  343. if (err == 0) {
  344. seq_printf(seq, "crystal\t\t: %d.%03d KHz\n",
  345. osc / 1000, osc % 1000);
  346. seq_printf(seq, "trim\t\t: %d\n", trim);
  347. }
  348. return 0;
  349. }
  350. #else
  351. #define rs5c372_rtc_proc NULL
  352. #endif
  353. static const struct rtc_class_ops rs5c372_rtc_ops = {
  354. .proc = rs5c372_rtc_proc,
  355. .read_time = rs5c372_rtc_read_time,
  356. .set_time = rs5c372_rtc_set_time,
  357. .read_alarm = rs5c_read_alarm,
  358. .set_alarm = rs5c_set_alarm,
  359. .alarm_irq_enable = rs5c_rtc_alarm_irq_enable,
  360. };
  361. #if IS_ENABLED(CONFIG_RTC_INTF_SYSFS)
  362. static ssize_t rs5c372_sysfs_show_trim(struct device *dev,
  363. struct device_attribute *attr, char *buf)
  364. {
  365. int err, trim;
  366. err = rs5c372_get_trim(to_i2c_client(dev), NULL, &trim);
  367. if (err)
  368. return err;
  369. return sprintf(buf, "%d\n", trim);
  370. }
  371. static DEVICE_ATTR(trim, S_IRUGO, rs5c372_sysfs_show_trim, NULL);
  372. static ssize_t rs5c372_sysfs_show_osc(struct device *dev,
  373. struct device_attribute *attr, char *buf)
  374. {
  375. int err, osc;
  376. err = rs5c372_get_trim(to_i2c_client(dev), &osc, NULL);
  377. if (err)
  378. return err;
  379. return sprintf(buf, "%d.%03d KHz\n", osc / 1000, osc % 1000);
  380. }
  381. static DEVICE_ATTR(osc, S_IRUGO, rs5c372_sysfs_show_osc, NULL);
  382. static int rs5c_sysfs_register(struct device *dev)
  383. {
  384. int err;
  385. err = device_create_file(dev, &dev_attr_trim);
  386. if (err)
  387. return err;
  388. err = device_create_file(dev, &dev_attr_osc);
  389. if (err)
  390. device_remove_file(dev, &dev_attr_trim);
  391. return err;
  392. }
  393. static void rs5c_sysfs_unregister(struct device *dev)
  394. {
  395. device_remove_file(dev, &dev_attr_trim);
  396. device_remove_file(dev, &dev_attr_osc);
  397. }
  398. #else
  399. static int rs5c_sysfs_register(struct device *dev)
  400. {
  401. return 0;
  402. }
  403. static void rs5c_sysfs_unregister(struct device *dev)
  404. {
  405. /* nothing */
  406. }
  407. #endif /* SYSFS */
  408. static struct i2c_driver rs5c372_driver;
  409. static int rs5c_oscillator_setup(struct rs5c372 *rs5c372)
  410. {
  411. unsigned char buf[2];
  412. int addr, i, ret = 0;
  413. if (rs5c372->type == rtc_r2025sd) {
  414. if (rs5c372->regs[RS5C_REG_CTRL2] & R2025_CTRL2_XST)
  415. return ret;
  416. rs5c372->regs[RS5C_REG_CTRL2] |= R2025_CTRL2_XST;
  417. } else {
  418. if (!(rs5c372->regs[RS5C_REG_CTRL2] & RS5C_CTRL2_XSTP))
  419. return ret;
  420. rs5c372->regs[RS5C_REG_CTRL2] &= ~RS5C_CTRL2_XSTP;
  421. }
  422. addr = RS5C_ADDR(RS5C_REG_CTRL1);
  423. buf[0] = rs5c372->regs[RS5C_REG_CTRL1];
  424. buf[1] = rs5c372->regs[RS5C_REG_CTRL2];
  425. /* use 24hr mode */
  426. switch (rs5c372->type) {
  427. case rtc_rs5c372a:
  428. case rtc_rs5c372b:
  429. buf[1] |= RS5C372_CTRL2_24;
  430. rs5c372->time24 = 1;
  431. break;
  432. case rtc_r2025sd:
  433. case rtc_r2221tl:
  434. case rtc_rv5c386:
  435. case rtc_rv5c387a:
  436. buf[0] |= RV5C387_CTRL1_24;
  437. rs5c372->time24 = 1;
  438. break;
  439. default:
  440. /* impossible */
  441. break;
  442. }
  443. for (i = 0; i < sizeof(buf); i++) {
  444. addr = RS5C_ADDR(RS5C_REG_CTRL1 + i);
  445. ret = i2c_smbus_write_byte_data(rs5c372->client, addr, buf[i]);
  446. if (unlikely(ret < 0))
  447. return ret;
  448. }
  449. rs5c372->regs[RS5C_REG_CTRL1] = buf[0];
  450. rs5c372->regs[RS5C_REG_CTRL2] = buf[1];
  451. return 0;
  452. }
  453. static int rs5c372_probe(struct i2c_client *client,
  454. const struct i2c_device_id *id)
  455. {
  456. int err = 0;
  457. int smbus_mode = 0;
  458. struct rs5c372 *rs5c372;
  459. struct rtc_time tm;
  460. dev_dbg(&client->dev, "%s\n", __func__);
  461. if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C |
  462. I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_I2C_BLOCK)) {
  463. /*
  464. * If we don't have any master mode adapter, try breaking
  465. * it down in to the barest of capabilities.
  466. */
  467. if (i2c_check_functionality(client->adapter,
  468. I2C_FUNC_SMBUS_BYTE_DATA |
  469. I2C_FUNC_SMBUS_I2C_BLOCK))
  470. smbus_mode = 1;
  471. else {
  472. /* Still no good, give up */
  473. err = -ENODEV;
  474. goto exit;
  475. }
  476. }
  477. rs5c372 = devm_kzalloc(&client->dev, sizeof(struct rs5c372),
  478. GFP_KERNEL);
  479. if (!rs5c372) {
  480. err = -ENOMEM;
  481. goto exit;
  482. }
  483. rs5c372->client = client;
  484. i2c_set_clientdata(client, rs5c372);
  485. rs5c372->type = id->driver_data;
  486. /* we read registers 0x0f then 0x00-0x0f; skip the first one */
  487. rs5c372->regs = &rs5c372->buf[1];
  488. rs5c372->smbus = smbus_mode;
  489. err = rs5c_get_regs(rs5c372);
  490. if (err < 0)
  491. goto exit;
  492. /* clock may be set for am/pm or 24 hr time */
  493. switch (rs5c372->type) {
  494. case rtc_rs5c372a:
  495. case rtc_rs5c372b:
  496. /* alarm uses ALARM_A; and nINTRA on 372a, nINTR on 372b.
  497. * so does periodic irq, except some 327a modes.
  498. */
  499. if (rs5c372->regs[RS5C_REG_CTRL2] & RS5C372_CTRL2_24)
  500. rs5c372->time24 = 1;
  501. break;
  502. case rtc_r2025sd:
  503. case rtc_r2221tl:
  504. case rtc_rv5c386:
  505. case rtc_rv5c387a:
  506. if (rs5c372->regs[RS5C_REG_CTRL1] & RV5C387_CTRL1_24)
  507. rs5c372->time24 = 1;
  508. /* alarm uses ALARM_W; and nINTRB for alarm and periodic
  509. * irq, on both 386 and 387
  510. */
  511. break;
  512. default:
  513. dev_err(&client->dev, "unknown RTC type\n");
  514. goto exit;
  515. }
  516. /* if the oscillator lost power and no other software (like
  517. * the bootloader) set it up, do it here.
  518. *
  519. * The R2025S/D does this a little differently than the other
  520. * parts, so we special case that..
  521. */
  522. err = rs5c_oscillator_setup(rs5c372);
  523. if (unlikely(err < 0)) {
  524. dev_err(&client->dev, "setup error\n");
  525. goto exit;
  526. }
  527. if (rs5c372_get_datetime(client, &tm) < 0)
  528. dev_warn(&client->dev, "clock needs to be set\n");
  529. dev_info(&client->dev, "%s found, %s\n",
  530. ({ char *s; switch (rs5c372->type) {
  531. case rtc_r2025sd: s = "r2025sd"; break;
  532. case rtc_r2221tl: s = "r2221tl"; break;
  533. case rtc_rs5c372a: s = "rs5c372a"; break;
  534. case rtc_rs5c372b: s = "rs5c372b"; break;
  535. case rtc_rv5c386: s = "rv5c386"; break;
  536. case rtc_rv5c387a: s = "rv5c387a"; break;
  537. default: s = "chip"; break;
  538. }; s;}),
  539. rs5c372->time24 ? "24hr" : "am/pm"
  540. );
  541. /* REVISIT use client->irq to register alarm irq ... */
  542. rs5c372->rtc = devm_rtc_device_register(&client->dev,
  543. rs5c372_driver.driver.name,
  544. &rs5c372_rtc_ops, THIS_MODULE);
  545. if (IS_ERR(rs5c372->rtc)) {
  546. err = PTR_ERR(rs5c372->rtc);
  547. goto exit;
  548. }
  549. err = rs5c_sysfs_register(&client->dev);
  550. if (err)
  551. goto exit;
  552. return 0;
  553. exit:
  554. return err;
  555. }
  556. static int rs5c372_remove(struct i2c_client *client)
  557. {
  558. rs5c_sysfs_unregister(&client->dev);
  559. return 0;
  560. }
  561. static struct i2c_driver rs5c372_driver = {
  562. .driver = {
  563. .name = "rtc-rs5c372",
  564. },
  565. .probe = rs5c372_probe,
  566. .remove = rs5c372_remove,
  567. .id_table = rs5c372_id,
  568. };
  569. module_i2c_driver(rs5c372_driver);
  570. MODULE_AUTHOR(
  571. "Pavel Mironchik <pmironchik@optifacio.net>, "
  572. "Alessandro Zummo <a.zummo@towertech.it>, "
  573. "Paul Mundt <lethal@linux-sh.org>");
  574. MODULE_DESCRIPTION("Ricoh RS5C372 RTC driver");
  575. MODULE_LICENSE("GPL");