rdma.c 51 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063
  1. /*
  2. * NVMe over Fabrics RDMA host code.
  3. * Copyright (c) 2015-2016 HGST, a Western Digital Company.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms and conditions of the GNU General Public License,
  7. * version 2, as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. */
  14. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  15. #include <linux/module.h>
  16. #include <linux/init.h>
  17. #include <linux/slab.h>
  18. #include <linux/err.h>
  19. #include <linux/string.h>
  20. #include <linux/atomic.h>
  21. #include <linux/blk-mq.h>
  22. #include <linux/types.h>
  23. #include <linux/list.h>
  24. #include <linux/mutex.h>
  25. #include <linux/scatterlist.h>
  26. #include <linux/nvme.h>
  27. #include <asm/unaligned.h>
  28. #include <rdma/ib_verbs.h>
  29. #include <rdma/rdma_cm.h>
  30. #include <rdma/ib_cm.h>
  31. #include <linux/nvme-rdma.h>
  32. #include "nvme.h"
  33. #include "fabrics.h"
  34. #define NVME_RDMA_CONNECT_TIMEOUT_MS 1000 /* 1 second */
  35. #define NVME_RDMA_MAX_SEGMENT_SIZE 0xffffff /* 24-bit SGL field */
  36. #define NVME_RDMA_MAX_SEGMENTS 256
  37. #define NVME_RDMA_MAX_INLINE_SEGMENTS 1
  38. /*
  39. * We handle AEN commands ourselves and don't even let the
  40. * block layer know about them.
  41. */
  42. #define NVME_RDMA_NR_AEN_COMMANDS 1
  43. #define NVME_RDMA_AQ_BLKMQ_DEPTH \
  44. (NVMF_AQ_DEPTH - NVME_RDMA_NR_AEN_COMMANDS)
  45. struct nvme_rdma_device {
  46. struct ib_device *dev;
  47. struct ib_pd *pd;
  48. struct kref ref;
  49. struct list_head entry;
  50. };
  51. struct nvme_rdma_qe {
  52. struct ib_cqe cqe;
  53. void *data;
  54. u64 dma;
  55. };
  56. struct nvme_rdma_queue;
  57. struct nvme_rdma_request {
  58. struct ib_mr *mr;
  59. struct nvme_rdma_qe sqe;
  60. struct ib_sge sge[1 + NVME_RDMA_MAX_INLINE_SEGMENTS];
  61. u32 num_sge;
  62. int nents;
  63. bool inline_data;
  64. struct ib_reg_wr reg_wr;
  65. struct ib_cqe reg_cqe;
  66. struct nvme_rdma_queue *queue;
  67. struct sg_table sg_table;
  68. struct scatterlist first_sgl[];
  69. };
  70. enum nvme_rdma_queue_flags {
  71. NVME_RDMA_Q_CONNECTED = (1 << 0),
  72. NVME_RDMA_IB_QUEUE_ALLOCATED = (1 << 1),
  73. NVME_RDMA_Q_DELETING = (1 << 2),
  74. NVME_RDMA_Q_LIVE = (1 << 3),
  75. };
  76. struct nvme_rdma_queue {
  77. struct nvme_rdma_qe *rsp_ring;
  78. atomic_t sig_count;
  79. int queue_size;
  80. size_t cmnd_capsule_len;
  81. struct nvme_rdma_ctrl *ctrl;
  82. struct nvme_rdma_device *device;
  83. struct ib_cq *ib_cq;
  84. struct ib_qp *qp;
  85. unsigned long flags;
  86. struct rdma_cm_id *cm_id;
  87. int cm_error;
  88. struct completion cm_done;
  89. };
  90. struct nvme_rdma_ctrl {
  91. /* read and written in the hot path */
  92. spinlock_t lock;
  93. /* read only in the hot path */
  94. struct nvme_rdma_queue *queues;
  95. u32 queue_count;
  96. /* other member variables */
  97. struct blk_mq_tag_set tag_set;
  98. struct work_struct delete_work;
  99. struct work_struct reset_work;
  100. struct work_struct err_work;
  101. struct nvme_rdma_qe async_event_sqe;
  102. int reconnect_delay;
  103. struct delayed_work reconnect_work;
  104. struct list_head list;
  105. struct blk_mq_tag_set admin_tag_set;
  106. struct nvme_rdma_device *device;
  107. u64 cap;
  108. u32 max_fr_pages;
  109. union {
  110. struct sockaddr addr;
  111. struct sockaddr_in addr_in;
  112. };
  113. struct nvme_ctrl ctrl;
  114. };
  115. static inline struct nvme_rdma_ctrl *to_rdma_ctrl(struct nvme_ctrl *ctrl)
  116. {
  117. return container_of(ctrl, struct nvme_rdma_ctrl, ctrl);
  118. }
  119. static LIST_HEAD(device_list);
  120. static DEFINE_MUTEX(device_list_mutex);
  121. static LIST_HEAD(nvme_rdma_ctrl_list);
  122. static DEFINE_MUTEX(nvme_rdma_ctrl_mutex);
  123. static struct workqueue_struct *nvme_rdma_wq;
  124. /*
  125. * Disabling this option makes small I/O goes faster, but is fundamentally
  126. * unsafe. With it turned off we will have to register a global rkey that
  127. * allows read and write access to all physical memory.
  128. */
  129. static bool register_always = true;
  130. module_param(register_always, bool, 0444);
  131. MODULE_PARM_DESC(register_always,
  132. "Use memory registration even for contiguous memory regions");
  133. static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id,
  134. struct rdma_cm_event *event);
  135. static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc);
  136. /* XXX: really should move to a generic header sooner or later.. */
  137. static inline void put_unaligned_le24(u32 val, u8 *p)
  138. {
  139. *p++ = val;
  140. *p++ = val >> 8;
  141. *p++ = val >> 16;
  142. }
  143. static inline int nvme_rdma_queue_idx(struct nvme_rdma_queue *queue)
  144. {
  145. return queue - queue->ctrl->queues;
  146. }
  147. static inline size_t nvme_rdma_inline_data_size(struct nvme_rdma_queue *queue)
  148. {
  149. return queue->cmnd_capsule_len - sizeof(struct nvme_command);
  150. }
  151. static void nvme_rdma_free_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe,
  152. size_t capsule_size, enum dma_data_direction dir)
  153. {
  154. ib_dma_unmap_single(ibdev, qe->dma, capsule_size, dir);
  155. kfree(qe->data);
  156. }
  157. static int nvme_rdma_alloc_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe,
  158. size_t capsule_size, enum dma_data_direction dir)
  159. {
  160. qe->data = kzalloc(capsule_size, GFP_KERNEL);
  161. if (!qe->data)
  162. return -ENOMEM;
  163. qe->dma = ib_dma_map_single(ibdev, qe->data, capsule_size, dir);
  164. if (ib_dma_mapping_error(ibdev, qe->dma)) {
  165. kfree(qe->data);
  166. return -ENOMEM;
  167. }
  168. return 0;
  169. }
  170. static void nvme_rdma_free_ring(struct ib_device *ibdev,
  171. struct nvme_rdma_qe *ring, size_t ib_queue_size,
  172. size_t capsule_size, enum dma_data_direction dir)
  173. {
  174. int i;
  175. for (i = 0; i < ib_queue_size; i++)
  176. nvme_rdma_free_qe(ibdev, &ring[i], capsule_size, dir);
  177. kfree(ring);
  178. }
  179. static struct nvme_rdma_qe *nvme_rdma_alloc_ring(struct ib_device *ibdev,
  180. size_t ib_queue_size, size_t capsule_size,
  181. enum dma_data_direction dir)
  182. {
  183. struct nvme_rdma_qe *ring;
  184. int i;
  185. ring = kcalloc(ib_queue_size, sizeof(struct nvme_rdma_qe), GFP_KERNEL);
  186. if (!ring)
  187. return NULL;
  188. for (i = 0; i < ib_queue_size; i++) {
  189. if (nvme_rdma_alloc_qe(ibdev, &ring[i], capsule_size, dir))
  190. goto out_free_ring;
  191. }
  192. return ring;
  193. out_free_ring:
  194. nvme_rdma_free_ring(ibdev, ring, i, capsule_size, dir);
  195. return NULL;
  196. }
  197. static void nvme_rdma_qp_event(struct ib_event *event, void *context)
  198. {
  199. pr_debug("QP event %d\n", event->event);
  200. }
  201. static int nvme_rdma_wait_for_cm(struct nvme_rdma_queue *queue)
  202. {
  203. wait_for_completion_interruptible_timeout(&queue->cm_done,
  204. msecs_to_jiffies(NVME_RDMA_CONNECT_TIMEOUT_MS) + 1);
  205. return queue->cm_error;
  206. }
  207. static int nvme_rdma_create_qp(struct nvme_rdma_queue *queue, const int factor)
  208. {
  209. struct nvme_rdma_device *dev = queue->device;
  210. struct ib_qp_init_attr init_attr;
  211. int ret;
  212. memset(&init_attr, 0, sizeof(init_attr));
  213. init_attr.event_handler = nvme_rdma_qp_event;
  214. /* +1 for drain */
  215. init_attr.cap.max_send_wr = factor * queue->queue_size + 1;
  216. /* +1 for drain */
  217. init_attr.cap.max_recv_wr = queue->queue_size + 1;
  218. init_attr.cap.max_recv_sge = 1;
  219. init_attr.cap.max_send_sge = 1 + NVME_RDMA_MAX_INLINE_SEGMENTS;
  220. init_attr.sq_sig_type = IB_SIGNAL_REQ_WR;
  221. init_attr.qp_type = IB_QPT_RC;
  222. init_attr.send_cq = queue->ib_cq;
  223. init_attr.recv_cq = queue->ib_cq;
  224. ret = rdma_create_qp(queue->cm_id, dev->pd, &init_attr);
  225. queue->qp = queue->cm_id->qp;
  226. return ret;
  227. }
  228. static int nvme_rdma_reinit_request(void *data, struct request *rq)
  229. {
  230. struct nvme_rdma_ctrl *ctrl = data;
  231. struct nvme_rdma_device *dev = ctrl->device;
  232. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  233. int ret = 0;
  234. if (!req->mr->need_inval)
  235. goto out;
  236. ib_dereg_mr(req->mr);
  237. req->mr = ib_alloc_mr(dev->pd, IB_MR_TYPE_MEM_REG,
  238. ctrl->max_fr_pages);
  239. if (IS_ERR(req->mr)) {
  240. ret = PTR_ERR(req->mr);
  241. req->mr = NULL;
  242. goto out;
  243. }
  244. req->mr->need_inval = false;
  245. out:
  246. return ret;
  247. }
  248. static void __nvme_rdma_exit_request(struct nvme_rdma_ctrl *ctrl,
  249. struct request *rq, unsigned int queue_idx)
  250. {
  251. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  252. struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx];
  253. struct nvme_rdma_device *dev = queue->device;
  254. if (req->mr)
  255. ib_dereg_mr(req->mr);
  256. nvme_rdma_free_qe(dev->dev, &req->sqe, sizeof(struct nvme_command),
  257. DMA_TO_DEVICE);
  258. }
  259. static void nvme_rdma_exit_request(void *data, struct request *rq,
  260. unsigned int hctx_idx, unsigned int rq_idx)
  261. {
  262. return __nvme_rdma_exit_request(data, rq, hctx_idx + 1);
  263. }
  264. static void nvme_rdma_exit_admin_request(void *data, struct request *rq,
  265. unsigned int hctx_idx, unsigned int rq_idx)
  266. {
  267. return __nvme_rdma_exit_request(data, rq, 0);
  268. }
  269. static int __nvme_rdma_init_request(struct nvme_rdma_ctrl *ctrl,
  270. struct request *rq, unsigned int queue_idx)
  271. {
  272. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  273. struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx];
  274. struct nvme_rdma_device *dev = queue->device;
  275. struct ib_device *ibdev = dev->dev;
  276. int ret;
  277. ret = nvme_rdma_alloc_qe(ibdev, &req->sqe, sizeof(struct nvme_command),
  278. DMA_TO_DEVICE);
  279. if (ret)
  280. return ret;
  281. req->mr = ib_alloc_mr(dev->pd, IB_MR_TYPE_MEM_REG,
  282. ctrl->max_fr_pages);
  283. if (IS_ERR(req->mr)) {
  284. ret = PTR_ERR(req->mr);
  285. goto out_free_qe;
  286. }
  287. req->queue = queue;
  288. return 0;
  289. out_free_qe:
  290. nvme_rdma_free_qe(dev->dev, &req->sqe, sizeof(struct nvme_command),
  291. DMA_TO_DEVICE);
  292. return -ENOMEM;
  293. }
  294. static int nvme_rdma_init_request(void *data, struct request *rq,
  295. unsigned int hctx_idx, unsigned int rq_idx,
  296. unsigned int numa_node)
  297. {
  298. return __nvme_rdma_init_request(data, rq, hctx_idx + 1);
  299. }
  300. static int nvme_rdma_init_admin_request(void *data, struct request *rq,
  301. unsigned int hctx_idx, unsigned int rq_idx,
  302. unsigned int numa_node)
  303. {
  304. return __nvme_rdma_init_request(data, rq, 0);
  305. }
  306. static int nvme_rdma_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
  307. unsigned int hctx_idx)
  308. {
  309. struct nvme_rdma_ctrl *ctrl = data;
  310. struct nvme_rdma_queue *queue = &ctrl->queues[hctx_idx + 1];
  311. BUG_ON(hctx_idx >= ctrl->queue_count);
  312. hctx->driver_data = queue;
  313. return 0;
  314. }
  315. static int nvme_rdma_init_admin_hctx(struct blk_mq_hw_ctx *hctx, void *data,
  316. unsigned int hctx_idx)
  317. {
  318. struct nvme_rdma_ctrl *ctrl = data;
  319. struct nvme_rdma_queue *queue = &ctrl->queues[0];
  320. BUG_ON(hctx_idx != 0);
  321. hctx->driver_data = queue;
  322. return 0;
  323. }
  324. static void nvme_rdma_free_dev(struct kref *ref)
  325. {
  326. struct nvme_rdma_device *ndev =
  327. container_of(ref, struct nvme_rdma_device, ref);
  328. mutex_lock(&device_list_mutex);
  329. list_del(&ndev->entry);
  330. mutex_unlock(&device_list_mutex);
  331. ib_dealloc_pd(ndev->pd);
  332. kfree(ndev);
  333. }
  334. static void nvme_rdma_dev_put(struct nvme_rdma_device *dev)
  335. {
  336. kref_put(&dev->ref, nvme_rdma_free_dev);
  337. }
  338. static int nvme_rdma_dev_get(struct nvme_rdma_device *dev)
  339. {
  340. return kref_get_unless_zero(&dev->ref);
  341. }
  342. static struct nvme_rdma_device *
  343. nvme_rdma_find_get_device(struct rdma_cm_id *cm_id)
  344. {
  345. struct nvme_rdma_device *ndev;
  346. mutex_lock(&device_list_mutex);
  347. list_for_each_entry(ndev, &device_list, entry) {
  348. if (ndev->dev->node_guid == cm_id->device->node_guid &&
  349. nvme_rdma_dev_get(ndev))
  350. goto out_unlock;
  351. }
  352. ndev = kzalloc(sizeof(*ndev), GFP_KERNEL);
  353. if (!ndev)
  354. goto out_err;
  355. ndev->dev = cm_id->device;
  356. kref_init(&ndev->ref);
  357. ndev->pd = ib_alloc_pd(ndev->dev,
  358. register_always ? 0 : IB_PD_UNSAFE_GLOBAL_RKEY);
  359. if (IS_ERR(ndev->pd))
  360. goto out_free_dev;
  361. if (!(ndev->dev->attrs.device_cap_flags &
  362. IB_DEVICE_MEM_MGT_EXTENSIONS)) {
  363. dev_err(&ndev->dev->dev,
  364. "Memory registrations not supported.\n");
  365. goto out_free_pd;
  366. }
  367. list_add(&ndev->entry, &device_list);
  368. out_unlock:
  369. mutex_unlock(&device_list_mutex);
  370. return ndev;
  371. out_free_pd:
  372. ib_dealloc_pd(ndev->pd);
  373. out_free_dev:
  374. kfree(ndev);
  375. out_err:
  376. mutex_unlock(&device_list_mutex);
  377. return NULL;
  378. }
  379. static void nvme_rdma_destroy_queue_ib(struct nvme_rdma_queue *queue)
  380. {
  381. struct nvme_rdma_device *dev;
  382. struct ib_device *ibdev;
  383. if (!test_and_clear_bit(NVME_RDMA_IB_QUEUE_ALLOCATED, &queue->flags))
  384. return;
  385. dev = queue->device;
  386. ibdev = dev->dev;
  387. rdma_destroy_qp(queue->cm_id);
  388. ib_free_cq(queue->ib_cq);
  389. nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size,
  390. sizeof(struct nvme_completion), DMA_FROM_DEVICE);
  391. nvme_rdma_dev_put(dev);
  392. }
  393. static int nvme_rdma_create_queue_ib(struct nvme_rdma_queue *queue,
  394. struct nvme_rdma_device *dev)
  395. {
  396. struct ib_device *ibdev = dev->dev;
  397. const int send_wr_factor = 3; /* MR, SEND, INV */
  398. const int cq_factor = send_wr_factor + 1; /* + RECV */
  399. int comp_vector, idx = nvme_rdma_queue_idx(queue);
  400. int ret;
  401. queue->device = dev;
  402. /*
  403. * The admin queue is barely used once the controller is live, so don't
  404. * bother to spread it out.
  405. */
  406. if (idx == 0)
  407. comp_vector = 0;
  408. else
  409. comp_vector = idx % ibdev->num_comp_vectors;
  410. /* +1 for ib_stop_cq */
  411. queue->ib_cq = ib_alloc_cq(dev->dev, queue,
  412. cq_factor * queue->queue_size + 1, comp_vector,
  413. IB_POLL_SOFTIRQ);
  414. if (IS_ERR(queue->ib_cq)) {
  415. ret = PTR_ERR(queue->ib_cq);
  416. goto out;
  417. }
  418. ret = nvme_rdma_create_qp(queue, send_wr_factor);
  419. if (ret)
  420. goto out_destroy_ib_cq;
  421. queue->rsp_ring = nvme_rdma_alloc_ring(ibdev, queue->queue_size,
  422. sizeof(struct nvme_completion), DMA_FROM_DEVICE);
  423. if (!queue->rsp_ring) {
  424. ret = -ENOMEM;
  425. goto out_destroy_qp;
  426. }
  427. set_bit(NVME_RDMA_IB_QUEUE_ALLOCATED, &queue->flags);
  428. return 0;
  429. out_destroy_qp:
  430. ib_destroy_qp(queue->qp);
  431. out_destroy_ib_cq:
  432. ib_free_cq(queue->ib_cq);
  433. out:
  434. return ret;
  435. }
  436. static int nvme_rdma_init_queue(struct nvme_rdma_ctrl *ctrl,
  437. int idx, size_t queue_size)
  438. {
  439. struct nvme_rdma_queue *queue;
  440. int ret;
  441. queue = &ctrl->queues[idx];
  442. queue->ctrl = ctrl;
  443. init_completion(&queue->cm_done);
  444. if (idx > 0)
  445. queue->cmnd_capsule_len = ctrl->ctrl.ioccsz * 16;
  446. else
  447. queue->cmnd_capsule_len = sizeof(struct nvme_command);
  448. queue->queue_size = queue_size;
  449. atomic_set(&queue->sig_count, 0);
  450. queue->cm_id = rdma_create_id(&init_net, nvme_rdma_cm_handler, queue,
  451. RDMA_PS_TCP, IB_QPT_RC);
  452. if (IS_ERR(queue->cm_id)) {
  453. dev_info(ctrl->ctrl.device,
  454. "failed to create CM ID: %ld\n", PTR_ERR(queue->cm_id));
  455. return PTR_ERR(queue->cm_id);
  456. }
  457. queue->cm_error = -ETIMEDOUT;
  458. ret = rdma_resolve_addr(queue->cm_id, NULL, &ctrl->addr,
  459. NVME_RDMA_CONNECT_TIMEOUT_MS);
  460. if (ret) {
  461. dev_info(ctrl->ctrl.device,
  462. "rdma_resolve_addr failed (%d).\n", ret);
  463. goto out_destroy_cm_id;
  464. }
  465. ret = nvme_rdma_wait_for_cm(queue);
  466. if (ret) {
  467. dev_info(ctrl->ctrl.device,
  468. "rdma_resolve_addr wait failed (%d).\n", ret);
  469. goto out_destroy_cm_id;
  470. }
  471. clear_bit(NVME_RDMA_Q_DELETING, &queue->flags);
  472. set_bit(NVME_RDMA_Q_CONNECTED, &queue->flags);
  473. return 0;
  474. out_destroy_cm_id:
  475. nvme_rdma_destroy_queue_ib(queue);
  476. rdma_destroy_id(queue->cm_id);
  477. return ret;
  478. }
  479. static void nvme_rdma_stop_queue(struct nvme_rdma_queue *queue)
  480. {
  481. rdma_disconnect(queue->cm_id);
  482. ib_drain_qp(queue->qp);
  483. }
  484. static void nvme_rdma_free_queue(struct nvme_rdma_queue *queue)
  485. {
  486. nvme_rdma_destroy_queue_ib(queue);
  487. rdma_destroy_id(queue->cm_id);
  488. }
  489. static void nvme_rdma_stop_and_free_queue(struct nvme_rdma_queue *queue)
  490. {
  491. if (test_and_set_bit(NVME_RDMA_Q_DELETING, &queue->flags))
  492. return;
  493. nvme_rdma_stop_queue(queue);
  494. nvme_rdma_free_queue(queue);
  495. }
  496. static void nvme_rdma_free_io_queues(struct nvme_rdma_ctrl *ctrl)
  497. {
  498. int i;
  499. for (i = 1; i < ctrl->queue_count; i++)
  500. nvme_rdma_stop_and_free_queue(&ctrl->queues[i]);
  501. }
  502. static int nvme_rdma_connect_io_queues(struct nvme_rdma_ctrl *ctrl)
  503. {
  504. int i, ret = 0;
  505. for (i = 1; i < ctrl->queue_count; i++) {
  506. ret = nvmf_connect_io_queue(&ctrl->ctrl, i);
  507. if (ret) {
  508. dev_info(ctrl->ctrl.device,
  509. "failed to connect i/o queue: %d\n", ret);
  510. goto out_free_queues;
  511. }
  512. set_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[i].flags);
  513. }
  514. return 0;
  515. out_free_queues:
  516. nvme_rdma_free_io_queues(ctrl);
  517. return ret;
  518. }
  519. static int nvme_rdma_init_io_queues(struct nvme_rdma_ctrl *ctrl)
  520. {
  521. struct nvmf_ctrl_options *opts = ctrl->ctrl.opts;
  522. unsigned int nr_io_queues;
  523. int i, ret;
  524. nr_io_queues = min(opts->nr_io_queues, num_online_cpus());
  525. ret = nvme_set_queue_count(&ctrl->ctrl, &nr_io_queues);
  526. if (ret)
  527. return ret;
  528. ctrl->queue_count = nr_io_queues + 1;
  529. if (ctrl->queue_count < 2)
  530. return 0;
  531. dev_info(ctrl->ctrl.device,
  532. "creating %d I/O queues.\n", nr_io_queues);
  533. for (i = 1; i < ctrl->queue_count; i++) {
  534. ret = nvme_rdma_init_queue(ctrl, i,
  535. ctrl->ctrl.opts->queue_size);
  536. if (ret) {
  537. dev_info(ctrl->ctrl.device,
  538. "failed to initialize i/o queue: %d\n", ret);
  539. goto out_free_queues;
  540. }
  541. }
  542. return 0;
  543. out_free_queues:
  544. for (i--; i >= 1; i--)
  545. nvme_rdma_stop_and_free_queue(&ctrl->queues[i]);
  546. return ret;
  547. }
  548. static void nvme_rdma_destroy_admin_queue(struct nvme_rdma_ctrl *ctrl)
  549. {
  550. nvme_rdma_free_qe(ctrl->queues[0].device->dev, &ctrl->async_event_sqe,
  551. sizeof(struct nvme_command), DMA_TO_DEVICE);
  552. nvme_rdma_stop_and_free_queue(&ctrl->queues[0]);
  553. blk_cleanup_queue(ctrl->ctrl.admin_q);
  554. blk_mq_free_tag_set(&ctrl->admin_tag_set);
  555. nvme_rdma_dev_put(ctrl->device);
  556. }
  557. static void nvme_rdma_free_ctrl(struct nvme_ctrl *nctrl)
  558. {
  559. struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
  560. if (list_empty(&ctrl->list))
  561. goto free_ctrl;
  562. mutex_lock(&nvme_rdma_ctrl_mutex);
  563. list_del(&ctrl->list);
  564. mutex_unlock(&nvme_rdma_ctrl_mutex);
  565. kfree(ctrl->queues);
  566. nvmf_free_options(nctrl->opts);
  567. free_ctrl:
  568. kfree(ctrl);
  569. }
  570. static void nvme_rdma_reconnect_ctrl_work(struct work_struct *work)
  571. {
  572. struct nvme_rdma_ctrl *ctrl = container_of(to_delayed_work(work),
  573. struct nvme_rdma_ctrl, reconnect_work);
  574. bool changed;
  575. int ret;
  576. if (ctrl->queue_count > 1) {
  577. nvme_rdma_free_io_queues(ctrl);
  578. ret = blk_mq_reinit_tagset(&ctrl->tag_set);
  579. if (ret)
  580. goto requeue;
  581. }
  582. nvme_rdma_stop_and_free_queue(&ctrl->queues[0]);
  583. ret = blk_mq_reinit_tagset(&ctrl->admin_tag_set);
  584. if (ret)
  585. goto requeue;
  586. ret = nvme_rdma_init_queue(ctrl, 0, NVMF_AQ_DEPTH);
  587. if (ret)
  588. goto requeue;
  589. blk_mq_start_stopped_hw_queues(ctrl->ctrl.admin_q, true);
  590. ret = nvmf_connect_admin_queue(&ctrl->ctrl);
  591. if (ret)
  592. goto stop_admin_q;
  593. set_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[0].flags);
  594. ret = nvme_enable_ctrl(&ctrl->ctrl, ctrl->cap);
  595. if (ret)
  596. goto stop_admin_q;
  597. nvme_start_keep_alive(&ctrl->ctrl);
  598. if (ctrl->queue_count > 1) {
  599. ret = nvme_rdma_init_io_queues(ctrl);
  600. if (ret)
  601. goto stop_admin_q;
  602. ret = nvme_rdma_connect_io_queues(ctrl);
  603. if (ret)
  604. goto stop_admin_q;
  605. }
  606. changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE);
  607. WARN_ON_ONCE(!changed);
  608. if (ctrl->queue_count > 1) {
  609. nvme_start_queues(&ctrl->ctrl);
  610. nvme_queue_scan(&ctrl->ctrl);
  611. nvme_queue_async_events(&ctrl->ctrl);
  612. }
  613. dev_info(ctrl->ctrl.device, "Successfully reconnected\n");
  614. return;
  615. stop_admin_q:
  616. blk_mq_stop_hw_queues(ctrl->ctrl.admin_q);
  617. requeue:
  618. /* Make sure we are not resetting/deleting */
  619. if (ctrl->ctrl.state == NVME_CTRL_RECONNECTING) {
  620. dev_info(ctrl->ctrl.device,
  621. "Failed reconnect attempt, requeueing...\n");
  622. queue_delayed_work(nvme_rdma_wq, &ctrl->reconnect_work,
  623. ctrl->reconnect_delay * HZ);
  624. }
  625. }
  626. static void nvme_rdma_error_recovery_work(struct work_struct *work)
  627. {
  628. struct nvme_rdma_ctrl *ctrl = container_of(work,
  629. struct nvme_rdma_ctrl, err_work);
  630. int i;
  631. nvme_stop_keep_alive(&ctrl->ctrl);
  632. for (i = 0; i < ctrl->queue_count; i++) {
  633. clear_bit(NVME_RDMA_Q_CONNECTED, &ctrl->queues[i].flags);
  634. clear_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[i].flags);
  635. }
  636. if (ctrl->queue_count > 1)
  637. nvme_stop_queues(&ctrl->ctrl);
  638. blk_mq_stop_hw_queues(ctrl->ctrl.admin_q);
  639. /* We must take care of fastfail/requeue all our inflight requests */
  640. if (ctrl->queue_count > 1)
  641. blk_mq_tagset_busy_iter(&ctrl->tag_set,
  642. nvme_cancel_request, &ctrl->ctrl);
  643. blk_mq_tagset_busy_iter(&ctrl->admin_tag_set,
  644. nvme_cancel_request, &ctrl->ctrl);
  645. dev_info(ctrl->ctrl.device, "reconnecting in %d seconds\n",
  646. ctrl->reconnect_delay);
  647. queue_delayed_work(nvme_rdma_wq, &ctrl->reconnect_work,
  648. ctrl->reconnect_delay * HZ);
  649. }
  650. static void nvme_rdma_error_recovery(struct nvme_rdma_ctrl *ctrl)
  651. {
  652. if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_RECONNECTING))
  653. return;
  654. queue_work(nvme_rdma_wq, &ctrl->err_work);
  655. }
  656. static void nvme_rdma_wr_error(struct ib_cq *cq, struct ib_wc *wc,
  657. const char *op)
  658. {
  659. struct nvme_rdma_queue *queue = cq->cq_context;
  660. struct nvme_rdma_ctrl *ctrl = queue->ctrl;
  661. if (ctrl->ctrl.state == NVME_CTRL_LIVE)
  662. dev_info(ctrl->ctrl.device,
  663. "%s for CQE 0x%p failed with status %s (%d)\n",
  664. op, wc->wr_cqe,
  665. ib_wc_status_msg(wc->status), wc->status);
  666. nvme_rdma_error_recovery(ctrl);
  667. }
  668. static void nvme_rdma_memreg_done(struct ib_cq *cq, struct ib_wc *wc)
  669. {
  670. if (unlikely(wc->status != IB_WC_SUCCESS))
  671. nvme_rdma_wr_error(cq, wc, "MEMREG");
  672. }
  673. static void nvme_rdma_inv_rkey_done(struct ib_cq *cq, struct ib_wc *wc)
  674. {
  675. if (unlikely(wc->status != IB_WC_SUCCESS))
  676. nvme_rdma_wr_error(cq, wc, "LOCAL_INV");
  677. }
  678. static int nvme_rdma_inv_rkey(struct nvme_rdma_queue *queue,
  679. struct nvme_rdma_request *req)
  680. {
  681. struct ib_send_wr *bad_wr;
  682. struct ib_send_wr wr = {
  683. .opcode = IB_WR_LOCAL_INV,
  684. .next = NULL,
  685. .num_sge = 0,
  686. .send_flags = 0,
  687. .ex.invalidate_rkey = req->mr->rkey,
  688. };
  689. req->reg_cqe.done = nvme_rdma_inv_rkey_done;
  690. wr.wr_cqe = &req->reg_cqe;
  691. return ib_post_send(queue->qp, &wr, &bad_wr);
  692. }
  693. static void nvme_rdma_unmap_data(struct nvme_rdma_queue *queue,
  694. struct request *rq)
  695. {
  696. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  697. struct nvme_rdma_ctrl *ctrl = queue->ctrl;
  698. struct nvme_rdma_device *dev = queue->device;
  699. struct ib_device *ibdev = dev->dev;
  700. int res;
  701. if (!blk_rq_bytes(rq))
  702. return;
  703. if (req->mr->need_inval) {
  704. res = nvme_rdma_inv_rkey(queue, req);
  705. if (res < 0) {
  706. dev_err(ctrl->ctrl.device,
  707. "Queueing INV WR for rkey %#x failed (%d)\n",
  708. req->mr->rkey, res);
  709. nvme_rdma_error_recovery(queue->ctrl);
  710. }
  711. }
  712. ib_dma_unmap_sg(ibdev, req->sg_table.sgl,
  713. req->nents, rq_data_dir(rq) ==
  714. WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
  715. nvme_cleanup_cmd(rq);
  716. sg_free_table_chained(&req->sg_table, true);
  717. }
  718. static int nvme_rdma_set_sg_null(struct nvme_command *c)
  719. {
  720. struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
  721. sg->addr = 0;
  722. put_unaligned_le24(0, sg->length);
  723. put_unaligned_le32(0, sg->key);
  724. sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
  725. return 0;
  726. }
  727. static int nvme_rdma_map_sg_inline(struct nvme_rdma_queue *queue,
  728. struct nvme_rdma_request *req, struct nvme_command *c)
  729. {
  730. struct nvme_sgl_desc *sg = &c->common.dptr.sgl;
  731. req->sge[1].addr = sg_dma_address(req->sg_table.sgl);
  732. req->sge[1].length = sg_dma_len(req->sg_table.sgl);
  733. req->sge[1].lkey = queue->device->pd->local_dma_lkey;
  734. sg->addr = cpu_to_le64(queue->ctrl->ctrl.icdoff);
  735. sg->length = cpu_to_le32(sg_dma_len(req->sg_table.sgl));
  736. sg->type = (NVME_SGL_FMT_DATA_DESC << 4) | NVME_SGL_FMT_OFFSET;
  737. req->inline_data = true;
  738. req->num_sge++;
  739. return 0;
  740. }
  741. static int nvme_rdma_map_sg_single(struct nvme_rdma_queue *queue,
  742. struct nvme_rdma_request *req, struct nvme_command *c)
  743. {
  744. struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
  745. sg->addr = cpu_to_le64(sg_dma_address(req->sg_table.sgl));
  746. put_unaligned_le24(sg_dma_len(req->sg_table.sgl), sg->length);
  747. put_unaligned_le32(queue->device->pd->unsafe_global_rkey, sg->key);
  748. sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
  749. return 0;
  750. }
  751. static int nvme_rdma_map_sg_fr(struct nvme_rdma_queue *queue,
  752. struct nvme_rdma_request *req, struct nvme_command *c,
  753. int count)
  754. {
  755. struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
  756. int nr;
  757. nr = ib_map_mr_sg(req->mr, req->sg_table.sgl, count, NULL, PAGE_SIZE);
  758. if (nr < count) {
  759. if (nr < 0)
  760. return nr;
  761. return -EINVAL;
  762. }
  763. ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey));
  764. req->reg_cqe.done = nvme_rdma_memreg_done;
  765. memset(&req->reg_wr, 0, sizeof(req->reg_wr));
  766. req->reg_wr.wr.opcode = IB_WR_REG_MR;
  767. req->reg_wr.wr.wr_cqe = &req->reg_cqe;
  768. req->reg_wr.wr.num_sge = 0;
  769. req->reg_wr.mr = req->mr;
  770. req->reg_wr.key = req->mr->rkey;
  771. req->reg_wr.access = IB_ACCESS_LOCAL_WRITE |
  772. IB_ACCESS_REMOTE_READ |
  773. IB_ACCESS_REMOTE_WRITE;
  774. req->mr->need_inval = true;
  775. sg->addr = cpu_to_le64(req->mr->iova);
  776. put_unaligned_le24(req->mr->length, sg->length);
  777. put_unaligned_le32(req->mr->rkey, sg->key);
  778. sg->type = (NVME_KEY_SGL_FMT_DATA_DESC << 4) |
  779. NVME_SGL_FMT_INVALIDATE;
  780. return 0;
  781. }
  782. static int nvme_rdma_map_data(struct nvme_rdma_queue *queue,
  783. struct request *rq, unsigned int map_len,
  784. struct nvme_command *c)
  785. {
  786. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  787. struct nvme_rdma_device *dev = queue->device;
  788. struct ib_device *ibdev = dev->dev;
  789. int nents, count;
  790. int ret;
  791. req->num_sge = 1;
  792. req->inline_data = false;
  793. req->mr->need_inval = false;
  794. c->common.flags |= NVME_CMD_SGL_METABUF;
  795. if (!blk_rq_bytes(rq))
  796. return nvme_rdma_set_sg_null(c);
  797. req->sg_table.sgl = req->first_sgl;
  798. ret = sg_alloc_table_chained(&req->sg_table, rq->nr_phys_segments,
  799. req->sg_table.sgl);
  800. if (ret)
  801. return -ENOMEM;
  802. nents = blk_rq_map_sg(rq->q, rq, req->sg_table.sgl);
  803. BUG_ON(nents > rq->nr_phys_segments);
  804. req->nents = nents;
  805. count = ib_dma_map_sg(ibdev, req->sg_table.sgl, nents,
  806. rq_data_dir(rq) == WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
  807. if (unlikely(count <= 0)) {
  808. sg_free_table_chained(&req->sg_table, true);
  809. return -EIO;
  810. }
  811. if (count == 1) {
  812. if (rq_data_dir(rq) == WRITE &&
  813. map_len <= nvme_rdma_inline_data_size(queue) &&
  814. nvme_rdma_queue_idx(queue))
  815. return nvme_rdma_map_sg_inline(queue, req, c);
  816. if (dev->pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY)
  817. return nvme_rdma_map_sg_single(queue, req, c);
  818. }
  819. return nvme_rdma_map_sg_fr(queue, req, c, count);
  820. }
  821. static void nvme_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc)
  822. {
  823. if (unlikely(wc->status != IB_WC_SUCCESS))
  824. nvme_rdma_wr_error(cq, wc, "SEND");
  825. }
  826. /*
  827. * We want to signal completion at least every queue depth/2. This returns the
  828. * largest power of two that is not above half of (queue size + 1) to optimize
  829. * (avoid divisions).
  830. */
  831. static inline bool nvme_rdma_queue_sig_limit(struct nvme_rdma_queue *queue)
  832. {
  833. int limit = 1 << ilog2((queue->queue_size + 1) / 2);
  834. return (atomic_inc_return(&queue->sig_count) & (limit - 1)) == 0;
  835. }
  836. static int nvme_rdma_post_send(struct nvme_rdma_queue *queue,
  837. struct nvme_rdma_qe *qe, struct ib_sge *sge, u32 num_sge,
  838. struct ib_send_wr *first, bool flush)
  839. {
  840. struct ib_send_wr wr, *bad_wr;
  841. int ret;
  842. sge->addr = qe->dma;
  843. sge->length = sizeof(struct nvme_command),
  844. sge->lkey = queue->device->pd->local_dma_lkey;
  845. qe->cqe.done = nvme_rdma_send_done;
  846. wr.next = NULL;
  847. wr.wr_cqe = &qe->cqe;
  848. wr.sg_list = sge;
  849. wr.num_sge = num_sge;
  850. wr.opcode = IB_WR_SEND;
  851. wr.send_flags = 0;
  852. /*
  853. * Unsignalled send completions are another giant desaster in the
  854. * IB Verbs spec: If we don't regularly post signalled sends
  855. * the send queue will fill up and only a QP reset will rescue us.
  856. * Would have been way to obvious to handle this in hardware or
  857. * at least the RDMA stack..
  858. *
  859. * Always signal the flushes. The magic request used for the flush
  860. * sequencer is not allocated in our driver's tagset and it's
  861. * triggered to be freed by blk_cleanup_queue(). So we need to
  862. * always mark it as signaled to ensure that the "wr_cqe", which is
  863. * embeded in request's payload, is not freed when __ib_process_cq()
  864. * calls wr_cqe->done().
  865. */
  866. if (nvme_rdma_queue_sig_limit(queue) || flush)
  867. wr.send_flags |= IB_SEND_SIGNALED;
  868. if (first)
  869. first->next = &wr;
  870. else
  871. first = &wr;
  872. ret = ib_post_send(queue->qp, first, &bad_wr);
  873. if (ret) {
  874. dev_err(queue->ctrl->ctrl.device,
  875. "%s failed with error code %d\n", __func__, ret);
  876. }
  877. return ret;
  878. }
  879. static int nvme_rdma_post_recv(struct nvme_rdma_queue *queue,
  880. struct nvme_rdma_qe *qe)
  881. {
  882. struct ib_recv_wr wr, *bad_wr;
  883. struct ib_sge list;
  884. int ret;
  885. list.addr = qe->dma;
  886. list.length = sizeof(struct nvme_completion);
  887. list.lkey = queue->device->pd->local_dma_lkey;
  888. qe->cqe.done = nvme_rdma_recv_done;
  889. wr.next = NULL;
  890. wr.wr_cqe = &qe->cqe;
  891. wr.sg_list = &list;
  892. wr.num_sge = 1;
  893. ret = ib_post_recv(queue->qp, &wr, &bad_wr);
  894. if (ret) {
  895. dev_err(queue->ctrl->ctrl.device,
  896. "%s failed with error code %d\n", __func__, ret);
  897. }
  898. return ret;
  899. }
  900. static struct blk_mq_tags *nvme_rdma_tagset(struct nvme_rdma_queue *queue)
  901. {
  902. u32 queue_idx = nvme_rdma_queue_idx(queue);
  903. if (queue_idx == 0)
  904. return queue->ctrl->admin_tag_set.tags[queue_idx];
  905. return queue->ctrl->tag_set.tags[queue_idx - 1];
  906. }
  907. static void nvme_rdma_submit_async_event(struct nvme_ctrl *arg, int aer_idx)
  908. {
  909. struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(arg);
  910. struct nvme_rdma_queue *queue = &ctrl->queues[0];
  911. struct ib_device *dev = queue->device->dev;
  912. struct nvme_rdma_qe *sqe = &ctrl->async_event_sqe;
  913. struct nvme_command *cmd = sqe->data;
  914. struct ib_sge sge;
  915. int ret;
  916. if (WARN_ON_ONCE(aer_idx != 0))
  917. return;
  918. ib_dma_sync_single_for_cpu(dev, sqe->dma, sizeof(*cmd), DMA_TO_DEVICE);
  919. memset(cmd, 0, sizeof(*cmd));
  920. cmd->common.opcode = nvme_admin_async_event;
  921. cmd->common.command_id = NVME_RDMA_AQ_BLKMQ_DEPTH;
  922. cmd->common.flags |= NVME_CMD_SGL_METABUF;
  923. nvme_rdma_set_sg_null(cmd);
  924. ib_dma_sync_single_for_device(dev, sqe->dma, sizeof(*cmd),
  925. DMA_TO_DEVICE);
  926. ret = nvme_rdma_post_send(queue, sqe, &sge, 1, NULL, false);
  927. WARN_ON_ONCE(ret);
  928. }
  929. static int nvme_rdma_process_nvme_rsp(struct nvme_rdma_queue *queue,
  930. struct nvme_completion *cqe, struct ib_wc *wc, int tag)
  931. {
  932. u16 status = le16_to_cpu(cqe->status);
  933. struct request *rq;
  934. struct nvme_rdma_request *req;
  935. int ret = 0;
  936. status >>= 1;
  937. rq = blk_mq_tag_to_rq(nvme_rdma_tagset(queue), cqe->command_id);
  938. if (!rq) {
  939. dev_err(queue->ctrl->ctrl.device,
  940. "tag 0x%x on QP %#x not found\n",
  941. cqe->command_id, queue->qp->qp_num);
  942. nvme_rdma_error_recovery(queue->ctrl);
  943. return ret;
  944. }
  945. req = blk_mq_rq_to_pdu(rq);
  946. if (rq->cmd_type == REQ_TYPE_DRV_PRIV && rq->special)
  947. memcpy(rq->special, cqe, sizeof(*cqe));
  948. if (rq->tag == tag)
  949. ret = 1;
  950. if ((wc->wc_flags & IB_WC_WITH_INVALIDATE) &&
  951. wc->ex.invalidate_rkey == req->mr->rkey)
  952. req->mr->need_inval = false;
  953. blk_mq_complete_request(rq, status);
  954. return ret;
  955. }
  956. static int __nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc, int tag)
  957. {
  958. struct nvme_rdma_qe *qe =
  959. container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe);
  960. struct nvme_rdma_queue *queue = cq->cq_context;
  961. struct ib_device *ibdev = queue->device->dev;
  962. struct nvme_completion *cqe = qe->data;
  963. const size_t len = sizeof(struct nvme_completion);
  964. int ret = 0;
  965. if (unlikely(wc->status != IB_WC_SUCCESS)) {
  966. nvme_rdma_wr_error(cq, wc, "RECV");
  967. return 0;
  968. }
  969. ib_dma_sync_single_for_cpu(ibdev, qe->dma, len, DMA_FROM_DEVICE);
  970. /*
  971. * AEN requests are special as they don't time out and can
  972. * survive any kind of queue freeze and often don't respond to
  973. * aborts. We don't even bother to allocate a struct request
  974. * for them but rather special case them here.
  975. */
  976. if (unlikely(nvme_rdma_queue_idx(queue) == 0 &&
  977. cqe->command_id >= NVME_RDMA_AQ_BLKMQ_DEPTH))
  978. nvme_complete_async_event(&queue->ctrl->ctrl, cqe);
  979. else
  980. ret = nvme_rdma_process_nvme_rsp(queue, cqe, wc, tag);
  981. ib_dma_sync_single_for_device(ibdev, qe->dma, len, DMA_FROM_DEVICE);
  982. nvme_rdma_post_recv(queue, qe);
  983. return ret;
  984. }
  985. static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc)
  986. {
  987. __nvme_rdma_recv_done(cq, wc, -1);
  988. }
  989. static int nvme_rdma_conn_established(struct nvme_rdma_queue *queue)
  990. {
  991. int ret, i;
  992. for (i = 0; i < queue->queue_size; i++) {
  993. ret = nvme_rdma_post_recv(queue, &queue->rsp_ring[i]);
  994. if (ret)
  995. goto out_destroy_queue_ib;
  996. }
  997. return 0;
  998. out_destroy_queue_ib:
  999. nvme_rdma_destroy_queue_ib(queue);
  1000. return ret;
  1001. }
  1002. static int nvme_rdma_conn_rejected(struct nvme_rdma_queue *queue,
  1003. struct rdma_cm_event *ev)
  1004. {
  1005. if (ev->param.conn.private_data_len) {
  1006. struct nvme_rdma_cm_rej *rej =
  1007. (struct nvme_rdma_cm_rej *)ev->param.conn.private_data;
  1008. dev_err(queue->ctrl->ctrl.device,
  1009. "Connect rejected, status %d.", le16_to_cpu(rej->sts));
  1010. /* XXX: Think of something clever to do here... */
  1011. } else {
  1012. dev_err(queue->ctrl->ctrl.device,
  1013. "Connect rejected, no private data.\n");
  1014. }
  1015. return -ECONNRESET;
  1016. }
  1017. static int nvme_rdma_addr_resolved(struct nvme_rdma_queue *queue)
  1018. {
  1019. struct nvme_rdma_device *dev;
  1020. int ret;
  1021. dev = nvme_rdma_find_get_device(queue->cm_id);
  1022. if (!dev) {
  1023. dev_err(queue->cm_id->device->dma_device,
  1024. "no client data found!\n");
  1025. return -ECONNREFUSED;
  1026. }
  1027. ret = nvme_rdma_create_queue_ib(queue, dev);
  1028. if (ret) {
  1029. nvme_rdma_dev_put(dev);
  1030. goto out;
  1031. }
  1032. ret = rdma_resolve_route(queue->cm_id, NVME_RDMA_CONNECT_TIMEOUT_MS);
  1033. if (ret) {
  1034. dev_err(queue->ctrl->ctrl.device,
  1035. "rdma_resolve_route failed (%d).\n",
  1036. queue->cm_error);
  1037. goto out_destroy_queue;
  1038. }
  1039. return 0;
  1040. out_destroy_queue:
  1041. nvme_rdma_destroy_queue_ib(queue);
  1042. out:
  1043. return ret;
  1044. }
  1045. static int nvme_rdma_route_resolved(struct nvme_rdma_queue *queue)
  1046. {
  1047. struct nvme_rdma_ctrl *ctrl = queue->ctrl;
  1048. struct rdma_conn_param param = { };
  1049. struct nvme_rdma_cm_req priv = { };
  1050. int ret;
  1051. param.qp_num = queue->qp->qp_num;
  1052. param.flow_control = 1;
  1053. param.responder_resources = queue->device->dev->attrs.max_qp_rd_atom;
  1054. /* maximum retry count */
  1055. param.retry_count = 7;
  1056. param.rnr_retry_count = 7;
  1057. param.private_data = &priv;
  1058. param.private_data_len = sizeof(priv);
  1059. priv.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0);
  1060. priv.qid = cpu_to_le16(nvme_rdma_queue_idx(queue));
  1061. /*
  1062. * set the admin queue depth to the minimum size
  1063. * specified by the Fabrics standard.
  1064. */
  1065. if (priv.qid == 0) {
  1066. priv.hrqsize = cpu_to_le16(NVMF_AQ_DEPTH);
  1067. priv.hsqsize = cpu_to_le16(NVMF_AQ_DEPTH - 1);
  1068. } else {
  1069. /*
  1070. * current interpretation of the fabrics spec
  1071. * is at minimum you make hrqsize sqsize+1, or a
  1072. * 1's based representation of sqsize.
  1073. */
  1074. priv.hrqsize = cpu_to_le16(queue->queue_size);
  1075. priv.hsqsize = cpu_to_le16(queue->ctrl->ctrl.sqsize);
  1076. }
  1077. ret = rdma_connect(queue->cm_id, &param);
  1078. if (ret) {
  1079. dev_err(ctrl->ctrl.device,
  1080. "rdma_connect failed (%d).\n", ret);
  1081. goto out_destroy_queue_ib;
  1082. }
  1083. return 0;
  1084. out_destroy_queue_ib:
  1085. nvme_rdma_destroy_queue_ib(queue);
  1086. return ret;
  1087. }
  1088. static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id,
  1089. struct rdma_cm_event *ev)
  1090. {
  1091. struct nvme_rdma_queue *queue = cm_id->context;
  1092. int cm_error = 0;
  1093. dev_dbg(queue->ctrl->ctrl.device, "%s (%d): status %d id %p\n",
  1094. rdma_event_msg(ev->event), ev->event,
  1095. ev->status, cm_id);
  1096. switch (ev->event) {
  1097. case RDMA_CM_EVENT_ADDR_RESOLVED:
  1098. cm_error = nvme_rdma_addr_resolved(queue);
  1099. break;
  1100. case RDMA_CM_EVENT_ROUTE_RESOLVED:
  1101. cm_error = nvme_rdma_route_resolved(queue);
  1102. break;
  1103. case RDMA_CM_EVENT_ESTABLISHED:
  1104. queue->cm_error = nvme_rdma_conn_established(queue);
  1105. /* complete cm_done regardless of success/failure */
  1106. complete(&queue->cm_done);
  1107. return 0;
  1108. case RDMA_CM_EVENT_REJECTED:
  1109. cm_error = nvme_rdma_conn_rejected(queue, ev);
  1110. break;
  1111. case RDMA_CM_EVENT_ADDR_ERROR:
  1112. case RDMA_CM_EVENT_ROUTE_ERROR:
  1113. case RDMA_CM_EVENT_CONNECT_ERROR:
  1114. case RDMA_CM_EVENT_UNREACHABLE:
  1115. dev_dbg(queue->ctrl->ctrl.device,
  1116. "CM error event %d\n", ev->event);
  1117. cm_error = -ECONNRESET;
  1118. break;
  1119. case RDMA_CM_EVENT_DISCONNECTED:
  1120. case RDMA_CM_EVENT_ADDR_CHANGE:
  1121. case RDMA_CM_EVENT_TIMEWAIT_EXIT:
  1122. dev_dbg(queue->ctrl->ctrl.device,
  1123. "disconnect received - connection closed\n");
  1124. nvme_rdma_error_recovery(queue->ctrl);
  1125. break;
  1126. case RDMA_CM_EVENT_DEVICE_REMOVAL:
  1127. /* device removal is handled via the ib_client API */
  1128. break;
  1129. default:
  1130. dev_err(queue->ctrl->ctrl.device,
  1131. "Unexpected RDMA CM event (%d)\n", ev->event);
  1132. nvme_rdma_error_recovery(queue->ctrl);
  1133. break;
  1134. }
  1135. if (cm_error) {
  1136. queue->cm_error = cm_error;
  1137. complete(&queue->cm_done);
  1138. }
  1139. return 0;
  1140. }
  1141. static enum blk_eh_timer_return
  1142. nvme_rdma_timeout(struct request *rq, bool reserved)
  1143. {
  1144. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  1145. /* queue error recovery */
  1146. nvme_rdma_error_recovery(req->queue->ctrl);
  1147. /* fail with DNR on cmd timeout */
  1148. rq->errors = NVME_SC_ABORT_REQ | NVME_SC_DNR;
  1149. return BLK_EH_HANDLED;
  1150. }
  1151. /*
  1152. * We cannot accept any other command until the Connect command has completed.
  1153. */
  1154. static inline bool nvme_rdma_queue_is_ready(struct nvme_rdma_queue *queue,
  1155. struct request *rq)
  1156. {
  1157. if (unlikely(!test_bit(NVME_RDMA_Q_LIVE, &queue->flags))) {
  1158. struct nvme_command *cmd = (struct nvme_command *)rq->cmd;
  1159. if (rq->cmd_type != REQ_TYPE_DRV_PRIV ||
  1160. cmd->common.opcode != nvme_fabrics_command ||
  1161. cmd->fabrics.fctype != nvme_fabrics_type_connect)
  1162. return false;
  1163. }
  1164. return true;
  1165. }
  1166. static int nvme_rdma_queue_rq(struct blk_mq_hw_ctx *hctx,
  1167. const struct blk_mq_queue_data *bd)
  1168. {
  1169. struct nvme_ns *ns = hctx->queue->queuedata;
  1170. struct nvme_rdma_queue *queue = hctx->driver_data;
  1171. struct request *rq = bd->rq;
  1172. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  1173. struct nvme_rdma_qe *sqe = &req->sqe;
  1174. struct nvme_command *c = sqe->data;
  1175. bool flush = false;
  1176. struct ib_device *dev;
  1177. unsigned int map_len;
  1178. int ret;
  1179. WARN_ON_ONCE(rq->tag < 0);
  1180. if (!nvme_rdma_queue_is_ready(queue, rq))
  1181. return BLK_MQ_RQ_QUEUE_BUSY;
  1182. dev = queue->device->dev;
  1183. ib_dma_sync_single_for_cpu(dev, sqe->dma,
  1184. sizeof(struct nvme_command), DMA_TO_DEVICE);
  1185. ret = nvme_setup_cmd(ns, rq, c);
  1186. if (ret)
  1187. return ret;
  1188. c->common.command_id = rq->tag;
  1189. blk_mq_start_request(rq);
  1190. map_len = nvme_map_len(rq);
  1191. ret = nvme_rdma_map_data(queue, rq, map_len, c);
  1192. if (ret < 0) {
  1193. dev_err(queue->ctrl->ctrl.device,
  1194. "Failed to map data (%d)\n", ret);
  1195. nvme_cleanup_cmd(rq);
  1196. goto err;
  1197. }
  1198. ib_dma_sync_single_for_device(dev, sqe->dma,
  1199. sizeof(struct nvme_command), DMA_TO_DEVICE);
  1200. if (rq->cmd_type == REQ_TYPE_FS && req_op(rq) == REQ_OP_FLUSH)
  1201. flush = true;
  1202. ret = nvme_rdma_post_send(queue, sqe, req->sge, req->num_sge,
  1203. req->mr->need_inval ? &req->reg_wr.wr : NULL, flush);
  1204. if (ret) {
  1205. nvme_rdma_unmap_data(queue, rq);
  1206. goto err;
  1207. }
  1208. return BLK_MQ_RQ_QUEUE_OK;
  1209. err:
  1210. return (ret == -ENOMEM || ret == -EAGAIN) ?
  1211. BLK_MQ_RQ_QUEUE_BUSY : BLK_MQ_RQ_QUEUE_ERROR;
  1212. }
  1213. static int nvme_rdma_poll(struct blk_mq_hw_ctx *hctx, unsigned int tag)
  1214. {
  1215. struct nvme_rdma_queue *queue = hctx->driver_data;
  1216. struct ib_cq *cq = queue->ib_cq;
  1217. struct ib_wc wc;
  1218. int found = 0;
  1219. ib_req_notify_cq(cq, IB_CQ_NEXT_COMP);
  1220. while (ib_poll_cq(cq, 1, &wc) > 0) {
  1221. struct ib_cqe *cqe = wc.wr_cqe;
  1222. if (cqe) {
  1223. if (cqe->done == nvme_rdma_recv_done)
  1224. found |= __nvme_rdma_recv_done(cq, &wc, tag);
  1225. else
  1226. cqe->done(cq, &wc);
  1227. }
  1228. }
  1229. return found;
  1230. }
  1231. static void nvme_rdma_complete_rq(struct request *rq)
  1232. {
  1233. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  1234. struct nvme_rdma_queue *queue = req->queue;
  1235. int error = 0;
  1236. nvme_rdma_unmap_data(queue, rq);
  1237. if (unlikely(rq->errors)) {
  1238. if (nvme_req_needs_retry(rq, rq->errors)) {
  1239. nvme_requeue_req(rq);
  1240. return;
  1241. }
  1242. if (rq->cmd_type == REQ_TYPE_DRV_PRIV)
  1243. error = rq->errors;
  1244. else
  1245. error = nvme_error_status(rq->errors);
  1246. }
  1247. blk_mq_end_request(rq, error);
  1248. }
  1249. static struct blk_mq_ops nvme_rdma_mq_ops = {
  1250. .queue_rq = nvme_rdma_queue_rq,
  1251. .complete = nvme_rdma_complete_rq,
  1252. .init_request = nvme_rdma_init_request,
  1253. .exit_request = nvme_rdma_exit_request,
  1254. .reinit_request = nvme_rdma_reinit_request,
  1255. .init_hctx = nvme_rdma_init_hctx,
  1256. .poll = nvme_rdma_poll,
  1257. .timeout = nvme_rdma_timeout,
  1258. };
  1259. static struct blk_mq_ops nvme_rdma_admin_mq_ops = {
  1260. .queue_rq = nvme_rdma_queue_rq,
  1261. .complete = nvme_rdma_complete_rq,
  1262. .init_request = nvme_rdma_init_admin_request,
  1263. .exit_request = nvme_rdma_exit_admin_request,
  1264. .reinit_request = nvme_rdma_reinit_request,
  1265. .init_hctx = nvme_rdma_init_admin_hctx,
  1266. .timeout = nvme_rdma_timeout,
  1267. };
  1268. static int nvme_rdma_configure_admin_queue(struct nvme_rdma_ctrl *ctrl)
  1269. {
  1270. int error;
  1271. error = nvme_rdma_init_queue(ctrl, 0, NVMF_AQ_DEPTH);
  1272. if (error)
  1273. return error;
  1274. ctrl->device = ctrl->queues[0].device;
  1275. /*
  1276. * We need a reference on the device as long as the tag_set is alive,
  1277. * as the MRs in the request structures need a valid ib_device.
  1278. */
  1279. error = -EINVAL;
  1280. if (!nvme_rdma_dev_get(ctrl->device))
  1281. goto out_free_queue;
  1282. ctrl->max_fr_pages = min_t(u32, NVME_RDMA_MAX_SEGMENTS,
  1283. ctrl->device->dev->attrs.max_fast_reg_page_list_len);
  1284. memset(&ctrl->admin_tag_set, 0, sizeof(ctrl->admin_tag_set));
  1285. ctrl->admin_tag_set.ops = &nvme_rdma_admin_mq_ops;
  1286. ctrl->admin_tag_set.queue_depth = NVME_RDMA_AQ_BLKMQ_DEPTH;
  1287. ctrl->admin_tag_set.reserved_tags = 2; /* connect + keep-alive */
  1288. ctrl->admin_tag_set.numa_node = NUMA_NO_NODE;
  1289. ctrl->admin_tag_set.cmd_size = sizeof(struct nvme_rdma_request) +
  1290. SG_CHUNK_SIZE * sizeof(struct scatterlist);
  1291. ctrl->admin_tag_set.driver_data = ctrl;
  1292. ctrl->admin_tag_set.nr_hw_queues = 1;
  1293. ctrl->admin_tag_set.timeout = ADMIN_TIMEOUT;
  1294. error = blk_mq_alloc_tag_set(&ctrl->admin_tag_set);
  1295. if (error)
  1296. goto out_put_dev;
  1297. ctrl->ctrl.admin_q = blk_mq_init_queue(&ctrl->admin_tag_set);
  1298. if (IS_ERR(ctrl->ctrl.admin_q)) {
  1299. error = PTR_ERR(ctrl->ctrl.admin_q);
  1300. goto out_free_tagset;
  1301. }
  1302. error = nvmf_connect_admin_queue(&ctrl->ctrl);
  1303. if (error)
  1304. goto out_cleanup_queue;
  1305. set_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[0].flags);
  1306. error = nvmf_reg_read64(&ctrl->ctrl, NVME_REG_CAP, &ctrl->cap);
  1307. if (error) {
  1308. dev_err(ctrl->ctrl.device,
  1309. "prop_get NVME_REG_CAP failed\n");
  1310. goto out_cleanup_queue;
  1311. }
  1312. ctrl->ctrl.sqsize =
  1313. min_t(int, NVME_CAP_MQES(ctrl->cap) + 1, ctrl->ctrl.sqsize);
  1314. error = nvme_enable_ctrl(&ctrl->ctrl, ctrl->cap);
  1315. if (error)
  1316. goto out_cleanup_queue;
  1317. ctrl->ctrl.max_hw_sectors =
  1318. (ctrl->max_fr_pages - 1) << (PAGE_SHIFT - 9);
  1319. error = nvme_init_identify(&ctrl->ctrl);
  1320. if (error)
  1321. goto out_cleanup_queue;
  1322. error = nvme_rdma_alloc_qe(ctrl->queues[0].device->dev,
  1323. &ctrl->async_event_sqe, sizeof(struct nvme_command),
  1324. DMA_TO_DEVICE);
  1325. if (error)
  1326. goto out_cleanup_queue;
  1327. nvme_start_keep_alive(&ctrl->ctrl);
  1328. return 0;
  1329. out_cleanup_queue:
  1330. blk_cleanup_queue(ctrl->ctrl.admin_q);
  1331. out_free_tagset:
  1332. /* disconnect and drain the queue before freeing the tagset */
  1333. nvme_rdma_stop_queue(&ctrl->queues[0]);
  1334. blk_mq_free_tag_set(&ctrl->admin_tag_set);
  1335. out_put_dev:
  1336. nvme_rdma_dev_put(ctrl->device);
  1337. out_free_queue:
  1338. nvme_rdma_free_queue(&ctrl->queues[0]);
  1339. return error;
  1340. }
  1341. static void nvme_rdma_shutdown_ctrl(struct nvme_rdma_ctrl *ctrl)
  1342. {
  1343. nvme_stop_keep_alive(&ctrl->ctrl);
  1344. cancel_work_sync(&ctrl->err_work);
  1345. cancel_delayed_work_sync(&ctrl->reconnect_work);
  1346. if (ctrl->queue_count > 1) {
  1347. nvme_stop_queues(&ctrl->ctrl);
  1348. blk_mq_tagset_busy_iter(&ctrl->tag_set,
  1349. nvme_cancel_request, &ctrl->ctrl);
  1350. nvme_rdma_free_io_queues(ctrl);
  1351. }
  1352. if (test_bit(NVME_RDMA_Q_CONNECTED, &ctrl->queues[0].flags))
  1353. nvme_shutdown_ctrl(&ctrl->ctrl);
  1354. blk_mq_stop_hw_queues(ctrl->ctrl.admin_q);
  1355. blk_mq_tagset_busy_iter(&ctrl->admin_tag_set,
  1356. nvme_cancel_request, &ctrl->ctrl);
  1357. nvme_rdma_destroy_admin_queue(ctrl);
  1358. }
  1359. static void __nvme_rdma_remove_ctrl(struct nvme_rdma_ctrl *ctrl, bool shutdown)
  1360. {
  1361. nvme_uninit_ctrl(&ctrl->ctrl);
  1362. if (shutdown)
  1363. nvme_rdma_shutdown_ctrl(ctrl);
  1364. if (ctrl->ctrl.tagset) {
  1365. blk_cleanup_queue(ctrl->ctrl.connect_q);
  1366. blk_mq_free_tag_set(&ctrl->tag_set);
  1367. nvme_rdma_dev_put(ctrl->device);
  1368. }
  1369. nvme_put_ctrl(&ctrl->ctrl);
  1370. }
  1371. static void nvme_rdma_del_ctrl_work(struct work_struct *work)
  1372. {
  1373. struct nvme_rdma_ctrl *ctrl = container_of(work,
  1374. struct nvme_rdma_ctrl, delete_work);
  1375. __nvme_rdma_remove_ctrl(ctrl, true);
  1376. }
  1377. static int __nvme_rdma_del_ctrl(struct nvme_rdma_ctrl *ctrl)
  1378. {
  1379. if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_DELETING))
  1380. return -EBUSY;
  1381. if (!queue_work(nvme_rdma_wq, &ctrl->delete_work))
  1382. return -EBUSY;
  1383. return 0;
  1384. }
  1385. static int nvme_rdma_del_ctrl(struct nvme_ctrl *nctrl)
  1386. {
  1387. struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
  1388. int ret = 0;
  1389. /*
  1390. * Keep a reference until all work is flushed since
  1391. * __nvme_rdma_del_ctrl can free the ctrl mem
  1392. */
  1393. if (!kref_get_unless_zero(&ctrl->ctrl.kref))
  1394. return -EBUSY;
  1395. ret = __nvme_rdma_del_ctrl(ctrl);
  1396. if (!ret)
  1397. flush_work(&ctrl->delete_work);
  1398. nvme_put_ctrl(&ctrl->ctrl);
  1399. return ret;
  1400. }
  1401. static void nvme_rdma_remove_ctrl_work(struct work_struct *work)
  1402. {
  1403. struct nvme_rdma_ctrl *ctrl = container_of(work,
  1404. struct nvme_rdma_ctrl, delete_work);
  1405. __nvme_rdma_remove_ctrl(ctrl, false);
  1406. }
  1407. static void nvme_rdma_reset_ctrl_work(struct work_struct *work)
  1408. {
  1409. struct nvme_rdma_ctrl *ctrl = container_of(work,
  1410. struct nvme_rdma_ctrl, reset_work);
  1411. int ret;
  1412. bool changed;
  1413. nvme_rdma_shutdown_ctrl(ctrl);
  1414. ret = nvme_rdma_configure_admin_queue(ctrl);
  1415. if (ret) {
  1416. /* ctrl is already shutdown, just remove the ctrl */
  1417. INIT_WORK(&ctrl->delete_work, nvme_rdma_remove_ctrl_work);
  1418. goto del_dead_ctrl;
  1419. }
  1420. if (ctrl->queue_count > 1) {
  1421. ret = blk_mq_reinit_tagset(&ctrl->tag_set);
  1422. if (ret)
  1423. goto del_dead_ctrl;
  1424. ret = nvme_rdma_init_io_queues(ctrl);
  1425. if (ret)
  1426. goto del_dead_ctrl;
  1427. ret = nvme_rdma_connect_io_queues(ctrl);
  1428. if (ret)
  1429. goto del_dead_ctrl;
  1430. }
  1431. changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE);
  1432. WARN_ON_ONCE(!changed);
  1433. if (ctrl->queue_count > 1) {
  1434. nvme_start_queues(&ctrl->ctrl);
  1435. nvme_queue_scan(&ctrl->ctrl);
  1436. nvme_queue_async_events(&ctrl->ctrl);
  1437. }
  1438. return;
  1439. del_dead_ctrl:
  1440. /* Deleting this dead controller... */
  1441. dev_warn(ctrl->ctrl.device, "Removing after reset failure\n");
  1442. WARN_ON(!queue_work(nvme_rdma_wq, &ctrl->delete_work));
  1443. }
  1444. static int nvme_rdma_reset_ctrl(struct nvme_ctrl *nctrl)
  1445. {
  1446. struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
  1447. if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_RESETTING))
  1448. return -EBUSY;
  1449. if (!queue_work(nvme_rdma_wq, &ctrl->reset_work))
  1450. return -EBUSY;
  1451. flush_work(&ctrl->reset_work);
  1452. return 0;
  1453. }
  1454. static const struct nvme_ctrl_ops nvme_rdma_ctrl_ops = {
  1455. .name = "rdma",
  1456. .module = THIS_MODULE,
  1457. .is_fabrics = true,
  1458. .reg_read32 = nvmf_reg_read32,
  1459. .reg_read64 = nvmf_reg_read64,
  1460. .reg_write32 = nvmf_reg_write32,
  1461. .reset_ctrl = nvme_rdma_reset_ctrl,
  1462. .free_ctrl = nvme_rdma_free_ctrl,
  1463. .submit_async_event = nvme_rdma_submit_async_event,
  1464. .delete_ctrl = nvme_rdma_del_ctrl,
  1465. .get_subsysnqn = nvmf_get_subsysnqn,
  1466. .get_address = nvmf_get_address,
  1467. };
  1468. static int nvme_rdma_create_io_queues(struct nvme_rdma_ctrl *ctrl)
  1469. {
  1470. int ret;
  1471. ret = nvme_rdma_init_io_queues(ctrl);
  1472. if (ret)
  1473. return ret;
  1474. /*
  1475. * We need a reference on the device as long as the tag_set is alive,
  1476. * as the MRs in the request structures need a valid ib_device.
  1477. */
  1478. ret = -EINVAL;
  1479. if (!nvme_rdma_dev_get(ctrl->device))
  1480. goto out_free_io_queues;
  1481. memset(&ctrl->tag_set, 0, sizeof(ctrl->tag_set));
  1482. ctrl->tag_set.ops = &nvme_rdma_mq_ops;
  1483. ctrl->tag_set.queue_depth = ctrl->ctrl.opts->queue_size;
  1484. ctrl->tag_set.reserved_tags = 1; /* fabric connect */
  1485. ctrl->tag_set.numa_node = NUMA_NO_NODE;
  1486. ctrl->tag_set.flags = BLK_MQ_F_SHOULD_MERGE;
  1487. ctrl->tag_set.cmd_size = sizeof(struct nvme_rdma_request) +
  1488. SG_CHUNK_SIZE * sizeof(struct scatterlist);
  1489. ctrl->tag_set.driver_data = ctrl;
  1490. ctrl->tag_set.nr_hw_queues = ctrl->queue_count - 1;
  1491. ctrl->tag_set.timeout = NVME_IO_TIMEOUT;
  1492. ret = blk_mq_alloc_tag_set(&ctrl->tag_set);
  1493. if (ret)
  1494. goto out_put_dev;
  1495. ctrl->ctrl.tagset = &ctrl->tag_set;
  1496. ctrl->ctrl.connect_q = blk_mq_init_queue(&ctrl->tag_set);
  1497. if (IS_ERR(ctrl->ctrl.connect_q)) {
  1498. ret = PTR_ERR(ctrl->ctrl.connect_q);
  1499. goto out_free_tag_set;
  1500. }
  1501. ret = nvme_rdma_connect_io_queues(ctrl);
  1502. if (ret)
  1503. goto out_cleanup_connect_q;
  1504. return 0;
  1505. out_cleanup_connect_q:
  1506. blk_cleanup_queue(ctrl->ctrl.connect_q);
  1507. out_free_tag_set:
  1508. blk_mq_free_tag_set(&ctrl->tag_set);
  1509. out_put_dev:
  1510. nvme_rdma_dev_put(ctrl->device);
  1511. out_free_io_queues:
  1512. nvme_rdma_free_io_queues(ctrl);
  1513. return ret;
  1514. }
  1515. static int nvme_rdma_parse_ipaddr(struct sockaddr_in *in_addr, char *p)
  1516. {
  1517. u8 *addr = (u8 *)&in_addr->sin_addr.s_addr;
  1518. size_t buflen = strlen(p);
  1519. /* XXX: handle IPv6 addresses */
  1520. if (buflen > INET_ADDRSTRLEN)
  1521. return -EINVAL;
  1522. if (in4_pton(p, buflen, addr, '\0', NULL) == 0)
  1523. return -EINVAL;
  1524. in_addr->sin_family = AF_INET;
  1525. return 0;
  1526. }
  1527. static struct nvme_ctrl *nvme_rdma_create_ctrl(struct device *dev,
  1528. struct nvmf_ctrl_options *opts)
  1529. {
  1530. struct nvme_rdma_ctrl *ctrl;
  1531. int ret;
  1532. bool changed;
  1533. ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL);
  1534. if (!ctrl)
  1535. return ERR_PTR(-ENOMEM);
  1536. ctrl->ctrl.opts = opts;
  1537. INIT_LIST_HEAD(&ctrl->list);
  1538. ret = nvme_rdma_parse_ipaddr(&ctrl->addr_in, opts->traddr);
  1539. if (ret) {
  1540. pr_err("malformed IP address passed: %s\n", opts->traddr);
  1541. goto out_free_ctrl;
  1542. }
  1543. if (opts->mask & NVMF_OPT_TRSVCID) {
  1544. u16 port;
  1545. ret = kstrtou16(opts->trsvcid, 0, &port);
  1546. if (ret)
  1547. goto out_free_ctrl;
  1548. ctrl->addr_in.sin_port = cpu_to_be16(port);
  1549. } else {
  1550. ctrl->addr_in.sin_port = cpu_to_be16(NVME_RDMA_IP_PORT);
  1551. }
  1552. ret = nvme_init_ctrl(&ctrl->ctrl, dev, &nvme_rdma_ctrl_ops,
  1553. 0 /* no quirks, we're perfect! */);
  1554. if (ret)
  1555. goto out_free_ctrl;
  1556. ctrl->reconnect_delay = opts->reconnect_delay;
  1557. INIT_DELAYED_WORK(&ctrl->reconnect_work,
  1558. nvme_rdma_reconnect_ctrl_work);
  1559. INIT_WORK(&ctrl->err_work, nvme_rdma_error_recovery_work);
  1560. INIT_WORK(&ctrl->delete_work, nvme_rdma_del_ctrl_work);
  1561. INIT_WORK(&ctrl->reset_work, nvme_rdma_reset_ctrl_work);
  1562. spin_lock_init(&ctrl->lock);
  1563. ctrl->queue_count = opts->nr_io_queues + 1; /* +1 for admin queue */
  1564. ctrl->ctrl.sqsize = opts->queue_size - 1;
  1565. ctrl->ctrl.kato = opts->kato;
  1566. ret = -ENOMEM;
  1567. ctrl->queues = kcalloc(ctrl->queue_count, sizeof(*ctrl->queues),
  1568. GFP_KERNEL);
  1569. if (!ctrl->queues)
  1570. goto out_uninit_ctrl;
  1571. ret = nvme_rdma_configure_admin_queue(ctrl);
  1572. if (ret)
  1573. goto out_kfree_queues;
  1574. /* sanity check icdoff */
  1575. if (ctrl->ctrl.icdoff) {
  1576. dev_err(ctrl->ctrl.device, "icdoff is not supported!\n");
  1577. goto out_remove_admin_queue;
  1578. }
  1579. /* sanity check keyed sgls */
  1580. if (!(ctrl->ctrl.sgls & (1 << 20))) {
  1581. dev_err(ctrl->ctrl.device, "Mandatory keyed sgls are not support\n");
  1582. goto out_remove_admin_queue;
  1583. }
  1584. if (opts->queue_size > ctrl->ctrl.maxcmd) {
  1585. /* warn if maxcmd is lower than queue_size */
  1586. dev_warn(ctrl->ctrl.device,
  1587. "queue_size %zu > ctrl maxcmd %u, clamping down\n",
  1588. opts->queue_size, ctrl->ctrl.maxcmd);
  1589. opts->queue_size = ctrl->ctrl.maxcmd;
  1590. }
  1591. if (opts->nr_io_queues) {
  1592. ret = nvme_rdma_create_io_queues(ctrl);
  1593. if (ret)
  1594. goto out_remove_admin_queue;
  1595. }
  1596. changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE);
  1597. WARN_ON_ONCE(!changed);
  1598. dev_info(ctrl->ctrl.device, "new ctrl: NQN \"%s\", addr %pISp\n",
  1599. ctrl->ctrl.opts->subsysnqn, &ctrl->addr);
  1600. kref_get(&ctrl->ctrl.kref);
  1601. mutex_lock(&nvme_rdma_ctrl_mutex);
  1602. list_add_tail(&ctrl->list, &nvme_rdma_ctrl_list);
  1603. mutex_unlock(&nvme_rdma_ctrl_mutex);
  1604. if (opts->nr_io_queues) {
  1605. nvme_queue_scan(&ctrl->ctrl);
  1606. nvme_queue_async_events(&ctrl->ctrl);
  1607. }
  1608. return &ctrl->ctrl;
  1609. out_remove_admin_queue:
  1610. nvme_stop_keep_alive(&ctrl->ctrl);
  1611. nvme_rdma_destroy_admin_queue(ctrl);
  1612. out_kfree_queues:
  1613. kfree(ctrl->queues);
  1614. out_uninit_ctrl:
  1615. nvme_uninit_ctrl(&ctrl->ctrl);
  1616. nvme_put_ctrl(&ctrl->ctrl);
  1617. if (ret > 0)
  1618. ret = -EIO;
  1619. return ERR_PTR(ret);
  1620. out_free_ctrl:
  1621. kfree(ctrl);
  1622. return ERR_PTR(ret);
  1623. }
  1624. static struct nvmf_transport_ops nvme_rdma_transport = {
  1625. .name = "rdma",
  1626. .required_opts = NVMF_OPT_TRADDR,
  1627. .allowed_opts = NVMF_OPT_TRSVCID | NVMF_OPT_RECONNECT_DELAY,
  1628. .create_ctrl = nvme_rdma_create_ctrl,
  1629. };
  1630. static void nvme_rdma_add_one(struct ib_device *ib_device)
  1631. {
  1632. }
  1633. static void nvme_rdma_remove_one(struct ib_device *ib_device, void *client_data)
  1634. {
  1635. struct nvme_rdma_ctrl *ctrl;
  1636. /* Delete all controllers using this device */
  1637. mutex_lock(&nvme_rdma_ctrl_mutex);
  1638. list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) {
  1639. if (ctrl->device->dev != ib_device)
  1640. continue;
  1641. dev_info(ctrl->ctrl.device,
  1642. "Removing ctrl: NQN \"%s\", addr %pISp\n",
  1643. ctrl->ctrl.opts->subsysnqn, &ctrl->addr);
  1644. __nvme_rdma_del_ctrl(ctrl);
  1645. }
  1646. mutex_unlock(&nvme_rdma_ctrl_mutex);
  1647. flush_workqueue(nvme_rdma_wq);
  1648. }
  1649. static struct ib_client nvme_rdma_ib_client = {
  1650. .name = "nvme_rdma",
  1651. .add = nvme_rdma_add_one,
  1652. .remove = nvme_rdma_remove_one
  1653. };
  1654. static int __init nvme_rdma_init_module(void)
  1655. {
  1656. int ret;
  1657. nvme_rdma_wq = create_workqueue("nvme_rdma_wq");
  1658. if (!nvme_rdma_wq)
  1659. return -ENOMEM;
  1660. ret = ib_register_client(&nvme_rdma_ib_client);
  1661. if (ret) {
  1662. destroy_workqueue(nvme_rdma_wq);
  1663. return ret;
  1664. }
  1665. nvmf_register_transport(&nvme_rdma_transport);
  1666. return 0;
  1667. }
  1668. static void __exit nvme_rdma_cleanup_module(void)
  1669. {
  1670. nvmf_unregister_transport(&nvme_rdma_transport);
  1671. ib_unregister_client(&nvme_rdma_ib_client);
  1672. destroy_workqueue(nvme_rdma_wq);
  1673. }
  1674. module_init(nvme_rdma_init_module);
  1675. module_exit(nvme_rdma_cleanup_module);
  1676. MODULE_LICENSE("GPL v2");