firmware.c 12 KB

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  1. /*
  2. * NCI based driver for Samsung S3FWRN5 NFC chip
  3. *
  4. * Copyright (C) 2015 Samsung Electrnoics
  5. * Robert Baldyga <r.baldyga@samsung.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms and conditions of the GNU General Public License,
  9. * version 2 or later, as published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #include <linux/completion.h>
  20. #include <linux/firmware.h>
  21. #include <crypto/hash.h>
  22. #include <crypto/sha.h>
  23. #include "s3fwrn5.h"
  24. #include "firmware.h"
  25. struct s3fwrn5_fw_version {
  26. __u8 major;
  27. __u8 build1;
  28. __u8 build2;
  29. __u8 target;
  30. };
  31. static int s3fwrn5_fw_send_msg(struct s3fwrn5_fw_info *fw_info,
  32. struct sk_buff *msg, struct sk_buff **rsp)
  33. {
  34. struct s3fwrn5_info *info =
  35. container_of(fw_info, struct s3fwrn5_info, fw_info);
  36. long ret;
  37. reinit_completion(&fw_info->completion);
  38. ret = s3fwrn5_write(info, msg);
  39. if (ret < 0)
  40. return ret;
  41. ret = wait_for_completion_interruptible_timeout(
  42. &fw_info->completion, msecs_to_jiffies(1000));
  43. if (ret < 0)
  44. return ret;
  45. else if (ret == 0)
  46. return -ENXIO;
  47. if (!fw_info->rsp)
  48. return -EINVAL;
  49. *rsp = fw_info->rsp;
  50. fw_info->rsp = NULL;
  51. return 0;
  52. }
  53. static int s3fwrn5_fw_prep_msg(struct s3fwrn5_fw_info *fw_info,
  54. struct sk_buff **msg, u8 type, u8 code, const void *data, u16 len)
  55. {
  56. struct s3fwrn5_fw_header hdr;
  57. struct sk_buff *skb;
  58. hdr.type = type | fw_info->parity;
  59. fw_info->parity ^= 0x80;
  60. hdr.code = code;
  61. hdr.len = len;
  62. skb = alloc_skb(S3FWRN5_FW_HDR_SIZE + len, GFP_KERNEL);
  63. if (!skb)
  64. return -ENOMEM;
  65. memcpy(skb_put(skb, S3FWRN5_FW_HDR_SIZE), &hdr, S3FWRN5_FW_HDR_SIZE);
  66. if (len)
  67. memcpy(skb_put(skb, len), data, len);
  68. *msg = skb;
  69. return 0;
  70. }
  71. static int s3fwrn5_fw_get_bootinfo(struct s3fwrn5_fw_info *fw_info,
  72. struct s3fwrn5_fw_cmd_get_bootinfo_rsp *bootinfo)
  73. {
  74. struct sk_buff *msg, *rsp = NULL;
  75. struct s3fwrn5_fw_header *hdr;
  76. int ret;
  77. /* Send GET_BOOTINFO command */
  78. ret = s3fwrn5_fw_prep_msg(fw_info, &msg, S3FWRN5_FW_MSG_CMD,
  79. S3FWRN5_FW_CMD_GET_BOOTINFO, NULL, 0);
  80. if (ret < 0)
  81. return ret;
  82. ret = s3fwrn5_fw_send_msg(fw_info, msg, &rsp);
  83. kfree_skb(msg);
  84. if (ret < 0)
  85. return ret;
  86. hdr = (struct s3fwrn5_fw_header *) rsp->data;
  87. if (hdr->code != S3FWRN5_FW_RET_SUCCESS) {
  88. ret = -EINVAL;
  89. goto out;
  90. }
  91. memcpy(bootinfo, rsp->data + S3FWRN5_FW_HDR_SIZE, 10);
  92. out:
  93. kfree_skb(rsp);
  94. return ret;
  95. }
  96. static int s3fwrn5_fw_enter_update_mode(struct s3fwrn5_fw_info *fw_info,
  97. const void *hash_data, u16 hash_size,
  98. const void *sig_data, u16 sig_size)
  99. {
  100. struct s3fwrn5_fw_cmd_enter_updatemode args;
  101. struct sk_buff *msg, *rsp = NULL;
  102. struct s3fwrn5_fw_header *hdr;
  103. int ret;
  104. /* Send ENTER_UPDATE_MODE command */
  105. args.hashcode_size = hash_size;
  106. args.signature_size = sig_size;
  107. ret = s3fwrn5_fw_prep_msg(fw_info, &msg, S3FWRN5_FW_MSG_CMD,
  108. S3FWRN5_FW_CMD_ENTER_UPDATE_MODE, &args, sizeof(args));
  109. if (ret < 0)
  110. return ret;
  111. ret = s3fwrn5_fw_send_msg(fw_info, msg, &rsp);
  112. kfree_skb(msg);
  113. if (ret < 0)
  114. return ret;
  115. hdr = (struct s3fwrn5_fw_header *) rsp->data;
  116. if (hdr->code != S3FWRN5_FW_RET_SUCCESS) {
  117. ret = -EPROTO;
  118. goto out;
  119. }
  120. kfree_skb(rsp);
  121. /* Send hashcode data */
  122. ret = s3fwrn5_fw_prep_msg(fw_info, &msg, S3FWRN5_FW_MSG_DATA, 0,
  123. hash_data, hash_size);
  124. if (ret < 0)
  125. return ret;
  126. ret = s3fwrn5_fw_send_msg(fw_info, msg, &rsp);
  127. kfree_skb(msg);
  128. if (ret < 0)
  129. return ret;
  130. hdr = (struct s3fwrn5_fw_header *) rsp->data;
  131. if (hdr->code != S3FWRN5_FW_RET_SUCCESS) {
  132. ret = -EPROTO;
  133. goto out;
  134. }
  135. kfree_skb(rsp);
  136. /* Send signature data */
  137. ret = s3fwrn5_fw_prep_msg(fw_info, &msg, S3FWRN5_FW_MSG_DATA, 0,
  138. sig_data, sig_size);
  139. if (ret < 0)
  140. return ret;
  141. ret = s3fwrn5_fw_send_msg(fw_info, msg, &rsp);
  142. kfree_skb(msg);
  143. if (ret < 0)
  144. return ret;
  145. hdr = (struct s3fwrn5_fw_header *) rsp->data;
  146. if (hdr->code != S3FWRN5_FW_RET_SUCCESS)
  147. ret = -EPROTO;
  148. out:
  149. kfree_skb(rsp);
  150. return ret;
  151. }
  152. static int s3fwrn5_fw_update_sector(struct s3fwrn5_fw_info *fw_info,
  153. u32 base_addr, const void *data)
  154. {
  155. struct s3fwrn5_fw_cmd_update_sector args;
  156. struct sk_buff *msg, *rsp = NULL;
  157. struct s3fwrn5_fw_header *hdr;
  158. int ret, i;
  159. /* Send UPDATE_SECTOR command */
  160. args.base_address = base_addr;
  161. ret = s3fwrn5_fw_prep_msg(fw_info, &msg, S3FWRN5_FW_MSG_CMD,
  162. S3FWRN5_FW_CMD_UPDATE_SECTOR, &args, sizeof(args));
  163. if (ret < 0)
  164. return ret;
  165. ret = s3fwrn5_fw_send_msg(fw_info, msg, &rsp);
  166. kfree_skb(msg);
  167. if (ret < 0)
  168. return ret;
  169. hdr = (struct s3fwrn5_fw_header *) rsp->data;
  170. if (hdr->code != S3FWRN5_FW_RET_SUCCESS) {
  171. ret = -EPROTO;
  172. goto err;
  173. }
  174. kfree_skb(rsp);
  175. /* Send data split into 256-byte packets */
  176. for (i = 0; i < 16; ++i) {
  177. ret = s3fwrn5_fw_prep_msg(fw_info, &msg,
  178. S3FWRN5_FW_MSG_DATA, 0, data+256*i, 256);
  179. if (ret < 0)
  180. break;
  181. ret = s3fwrn5_fw_send_msg(fw_info, msg, &rsp);
  182. kfree_skb(msg);
  183. if (ret < 0)
  184. break;
  185. hdr = (struct s3fwrn5_fw_header *) rsp->data;
  186. if (hdr->code != S3FWRN5_FW_RET_SUCCESS) {
  187. ret = -EPROTO;
  188. goto err;
  189. }
  190. kfree_skb(rsp);
  191. }
  192. return ret;
  193. err:
  194. kfree_skb(rsp);
  195. return ret;
  196. }
  197. static int s3fwrn5_fw_complete_update_mode(struct s3fwrn5_fw_info *fw_info)
  198. {
  199. struct sk_buff *msg, *rsp = NULL;
  200. struct s3fwrn5_fw_header *hdr;
  201. int ret;
  202. /* Send COMPLETE_UPDATE_MODE command */
  203. ret = s3fwrn5_fw_prep_msg(fw_info, &msg, S3FWRN5_FW_MSG_CMD,
  204. S3FWRN5_FW_CMD_COMPLETE_UPDATE_MODE, NULL, 0);
  205. if (ret < 0)
  206. return ret;
  207. ret = s3fwrn5_fw_send_msg(fw_info, msg, &rsp);
  208. kfree_skb(msg);
  209. if (ret < 0)
  210. return ret;
  211. hdr = (struct s3fwrn5_fw_header *) rsp->data;
  212. if (hdr->code != S3FWRN5_FW_RET_SUCCESS)
  213. ret = -EPROTO;
  214. kfree_skb(rsp);
  215. return ret;
  216. }
  217. /*
  218. * Firmware header stucture:
  219. *
  220. * 0x00 - 0x0B : Date and time string (w/o NUL termination)
  221. * 0x10 - 0x13 : Firmware version
  222. * 0x14 - 0x17 : Signature address
  223. * 0x18 - 0x1B : Signature size
  224. * 0x1C - 0x1F : Firmware image address
  225. * 0x20 - 0x23 : Firmware sectors count
  226. * 0x24 - 0x27 : Custom signature address
  227. * 0x28 - 0x2B : Custom signature size
  228. */
  229. #define S3FWRN5_FW_IMAGE_HEADER_SIZE 44
  230. static int s3fwrn5_fw_request_firmware(struct s3fwrn5_fw_info *fw_info)
  231. {
  232. struct s3fwrn5_fw_image *fw = &fw_info->fw;
  233. u32 sig_off;
  234. u32 image_off;
  235. u32 custom_sig_off;
  236. int ret;
  237. ret = reject_firmware(&fw->fw, fw_info->fw_name,
  238. &fw_info->ndev->nfc_dev->dev);
  239. if (ret < 0)
  240. return ret;
  241. if (fw->fw->size < S3FWRN5_FW_IMAGE_HEADER_SIZE)
  242. return -EINVAL;
  243. memcpy(fw->date, fw->fw->data + 0x00, 12);
  244. fw->date[12] = '\0';
  245. memcpy(&fw->version, fw->fw->data + 0x10, 4);
  246. memcpy(&sig_off, fw->fw->data + 0x14, 4);
  247. fw->sig = fw->fw->data + sig_off;
  248. memcpy(&fw->sig_size, fw->fw->data + 0x18, 4);
  249. memcpy(&image_off, fw->fw->data + 0x1C, 4);
  250. fw->image = fw->fw->data + image_off;
  251. memcpy(&fw->image_sectors, fw->fw->data + 0x20, 4);
  252. memcpy(&custom_sig_off, fw->fw->data + 0x24, 4);
  253. fw->custom_sig = fw->fw->data + custom_sig_off;
  254. memcpy(&fw->custom_sig_size, fw->fw->data + 0x28, 4);
  255. return 0;
  256. }
  257. static void s3fwrn5_fw_release_firmware(struct s3fwrn5_fw_info *fw_info)
  258. {
  259. release_firmware(fw_info->fw.fw);
  260. }
  261. static int s3fwrn5_fw_get_base_addr(
  262. struct s3fwrn5_fw_cmd_get_bootinfo_rsp *bootinfo, u32 *base_addr)
  263. {
  264. int i;
  265. struct {
  266. u8 version[4];
  267. u32 base_addr;
  268. } match[] = {
  269. {{0x05, 0x00, 0x00, 0x00}, 0x00005000},
  270. {{0x05, 0x00, 0x00, 0x01}, 0x00003000},
  271. {{0x05, 0x00, 0x00, 0x02}, 0x00003000},
  272. {{0x05, 0x00, 0x00, 0x03}, 0x00003000},
  273. {{0x05, 0x00, 0x00, 0x05}, 0x00003000}
  274. };
  275. for (i = 0; i < ARRAY_SIZE(match); ++i)
  276. if (bootinfo->hw_version[0] == match[i].version[0] &&
  277. bootinfo->hw_version[1] == match[i].version[1] &&
  278. bootinfo->hw_version[3] == match[i].version[3]) {
  279. *base_addr = match[i].base_addr;
  280. return 0;
  281. }
  282. return -EINVAL;
  283. }
  284. static inline bool
  285. s3fwrn5_fw_is_custom(struct s3fwrn5_fw_cmd_get_bootinfo_rsp *bootinfo)
  286. {
  287. return !!bootinfo->hw_version[2];
  288. }
  289. int s3fwrn5_fw_setup(struct s3fwrn5_fw_info *fw_info)
  290. {
  291. struct s3fwrn5_fw_cmd_get_bootinfo_rsp bootinfo;
  292. int ret;
  293. /* Get firmware data */
  294. ret = s3fwrn5_fw_request_firmware(fw_info);
  295. if (ret < 0) {
  296. dev_err(&fw_info->ndev->nfc_dev->dev,
  297. "Failed to get fw file, ret=%02x\n", ret);
  298. return ret;
  299. }
  300. /* Get bootloader info */
  301. ret = s3fwrn5_fw_get_bootinfo(fw_info, &bootinfo);
  302. if (ret < 0) {
  303. dev_err(&fw_info->ndev->nfc_dev->dev,
  304. "Failed to get bootinfo, ret=%02x\n", ret);
  305. goto err;
  306. }
  307. /* Match hardware version to obtain firmware base address */
  308. ret = s3fwrn5_fw_get_base_addr(&bootinfo, &fw_info->base_addr);
  309. if (ret < 0) {
  310. dev_err(&fw_info->ndev->nfc_dev->dev,
  311. "Unknown hardware version\n");
  312. goto err;
  313. }
  314. fw_info->sector_size = bootinfo.sector_size;
  315. fw_info->sig_size = s3fwrn5_fw_is_custom(&bootinfo) ?
  316. fw_info->fw.custom_sig_size : fw_info->fw.sig_size;
  317. fw_info->sig = s3fwrn5_fw_is_custom(&bootinfo) ?
  318. fw_info->fw.custom_sig : fw_info->fw.sig;
  319. return 0;
  320. err:
  321. s3fwrn5_fw_release_firmware(fw_info);
  322. return ret;
  323. }
  324. bool s3fwrn5_fw_check_version(struct s3fwrn5_fw_info *fw_info, u32 version)
  325. {
  326. struct s3fwrn5_fw_version *new = (void *) &fw_info->fw.version;
  327. struct s3fwrn5_fw_version *old = (void *) &version;
  328. if (new->major > old->major)
  329. return true;
  330. if (new->build1 > old->build1)
  331. return true;
  332. if (new->build2 > old->build2)
  333. return true;
  334. return false;
  335. }
  336. int s3fwrn5_fw_download(struct s3fwrn5_fw_info *fw_info)
  337. {
  338. struct s3fwrn5_fw_image *fw = &fw_info->fw;
  339. u8 hash_data[SHA1_DIGEST_SIZE];
  340. struct crypto_shash *tfm;
  341. u32 image_size, off;
  342. int ret;
  343. image_size = fw_info->sector_size * fw->image_sectors;
  344. /* Compute SHA of firmware data */
  345. tfm = crypto_alloc_shash("sha1", 0, 0);
  346. if (IS_ERR(tfm)) {
  347. ret = PTR_ERR(tfm);
  348. dev_err(&fw_info->ndev->nfc_dev->dev,
  349. "Cannot allocate shash (code=%d)\n", ret);
  350. goto out;
  351. }
  352. {
  353. SHASH_DESC_ON_STACK(desc, tfm);
  354. desc->tfm = tfm;
  355. desc->flags = CRYPTO_TFM_REQ_MAY_SLEEP;
  356. ret = crypto_shash_digest(desc, fw->image, image_size,
  357. hash_data);
  358. shash_desc_zero(desc);
  359. }
  360. crypto_free_shash(tfm);
  361. if (ret) {
  362. dev_err(&fw_info->ndev->nfc_dev->dev,
  363. "Cannot compute hash (code=%d)\n", ret);
  364. goto out;
  365. }
  366. /* Firmware update process */
  367. dev_info(&fw_info->ndev->nfc_dev->dev,
  368. "Firmware update: %s\n", fw_info->fw_name);
  369. ret = s3fwrn5_fw_enter_update_mode(fw_info, hash_data,
  370. SHA1_DIGEST_SIZE, fw_info->sig, fw_info->sig_size);
  371. if (ret < 0) {
  372. dev_err(&fw_info->ndev->nfc_dev->dev,
  373. "Unable to enter update mode\n");
  374. goto out;
  375. }
  376. for (off = 0; off < image_size; off += fw_info->sector_size) {
  377. ret = s3fwrn5_fw_update_sector(fw_info,
  378. fw_info->base_addr + off, fw->image + off);
  379. if (ret < 0) {
  380. dev_err(&fw_info->ndev->nfc_dev->dev,
  381. "Firmware update error (code=%d)\n", ret);
  382. goto out;
  383. }
  384. }
  385. ret = s3fwrn5_fw_complete_update_mode(fw_info);
  386. if (ret < 0) {
  387. dev_err(&fw_info->ndev->nfc_dev->dev,
  388. "Unable to complete update mode\n");
  389. goto out;
  390. }
  391. dev_info(&fw_info->ndev->nfc_dev->dev,
  392. "Firmware update: success\n");
  393. out:
  394. return ret;
  395. }
  396. void s3fwrn5_fw_init(struct s3fwrn5_fw_info *fw_info, const char *fw_name)
  397. {
  398. fw_info->parity = 0x00;
  399. fw_info->rsp = NULL;
  400. fw_info->fw.fw = NULL;
  401. strcpy(fw_info->fw_name, fw_name);
  402. init_completion(&fw_info->completion);
  403. }
  404. void s3fwrn5_fw_cleanup(struct s3fwrn5_fw_info *fw_info)
  405. {
  406. s3fwrn5_fw_release_firmware(fw_info);
  407. }
  408. int s3fwrn5_fw_recv_frame(struct nci_dev *ndev, struct sk_buff *skb)
  409. {
  410. struct s3fwrn5_info *info = nci_get_drvdata(ndev);
  411. struct s3fwrn5_fw_info *fw_info = &info->fw_info;
  412. BUG_ON(fw_info->rsp);
  413. fw_info->rsp = skb;
  414. complete(&fw_info->completion);
  415. return 0;
  416. }