venc_vp8_if.c 13 KB

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  1. /*
  2. * Copyright (c) 2016 MediaTek Inc.
  3. * Author: Daniel Hsiao <daniel.hsiao@mediatek.com>
  4. * PoChun Lin <pochun.lin@mediatek.com>
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. */
  16. #include <linux/interrupt.h>
  17. #include <linux/kernel.h>
  18. #include <linux/slab.h>
  19. #include "../mtk_vcodec_drv.h"
  20. #include "../mtk_vcodec_util.h"
  21. #include "../mtk_vcodec_intr.h"
  22. #include "../mtk_vcodec_enc.h"
  23. #include "../mtk_vcodec_enc_pm.h"
  24. #include "../venc_drv_base.h"
  25. #include "../venc_ipi_msg.h"
  26. #include "../venc_vpu_if.h"
  27. #include "mtk_vpu.h"
  28. #define VENC_BITSTREAM_FRAME_SIZE 0x0098
  29. #define VENC_BITSTREAM_HEADER_LEN 0x00e8
  30. /* This ac_tag is vp8 frame tag. */
  31. #define MAX_AC_TAG_SIZE 10
  32. /**
  33. * enum venc_vp8_vpu_work_buf - vp8 encoder buffer index
  34. */
  35. enum venc_vp8_vpu_work_buf {
  36. VENC_VP8_VPU_WORK_BUF_LUMA,
  37. VENC_VP8_VPU_WORK_BUF_LUMA2,
  38. VENC_VP8_VPU_WORK_BUF_LUMA3,
  39. VENC_VP8_VPU_WORK_BUF_CHROMA,
  40. VENC_VP8_VPU_WORK_BUF_CHROMA2,
  41. VENC_VP8_VPU_WORK_BUF_CHROMA3,
  42. VENC_VP8_VPU_WORK_BUF_MV_INFO,
  43. VENC_VP8_VPU_WORK_BUF_BS_HEADER,
  44. VENC_VP8_VPU_WORK_BUF_PROB_BUF,
  45. VENC_VP8_VPU_WORK_BUF_RC_INFO,
  46. VENC_VP8_VPU_WORK_BUF_RC_CODE,
  47. VENC_VP8_VPU_WORK_BUF_RC_CODE2,
  48. VENC_VP8_VPU_WORK_BUF_RC_CODE3,
  49. VENC_VP8_VPU_WORK_BUF_MAX,
  50. };
  51. /*
  52. * struct venc_vp8_vpu_config - Structure for vp8 encoder configuration
  53. * AP-W/R : AP is writer/reader on this item
  54. * VPU-W/R: VPU is write/reader on this item
  55. * @input_fourcc: input fourcc
  56. * @bitrate: target bitrate (in bps)
  57. * @pic_w: picture width. Picture size is visible stream resolution, in pixels,
  58. * to be used for display purposes; must be smaller or equal to buffer
  59. * size.
  60. * @pic_h: picture height
  61. * @buf_w: buffer width (with 16 alignment). Buffer size is stream resolution
  62. * in pixels aligned to hardware requirements.
  63. * @buf_h: buffer height (with 16 alignment)
  64. * @gop_size: group of picture size (key frame)
  65. * @framerate: frame rate in fps
  66. * @ts_mode: temporal scalability mode (0: disable, 1: enable)
  67. * support three temporal layers - 0: 7.5fps 1: 7.5fps 2: 15fps.
  68. */
  69. struct venc_vp8_vpu_config {
  70. u32 input_fourcc;
  71. u32 bitrate;
  72. u32 pic_w;
  73. u32 pic_h;
  74. u32 buf_w;
  75. u32 buf_h;
  76. u32 gop_size;
  77. u32 framerate;
  78. u32 ts_mode;
  79. };
  80. /*
  81. * struct venc_vp8_vpu_buf - Structure for buffer information
  82. * AP-W/R : AP is writer/reader on this item
  83. * VPU-W/R: VPU is write/reader on this item
  84. * @iova: IO virtual address
  85. * @vpua: VPU side memory addr which is used by RC_CODE
  86. * @size: buffer size (in bytes)
  87. */
  88. struct venc_vp8_vpu_buf {
  89. u32 iova;
  90. u32 vpua;
  91. u32 size;
  92. };
  93. /*
  94. * struct venc_vp8_vsi - Structure for VPU driver control and info share
  95. * AP-W/R : AP is writer/reader on this item
  96. * VPU-W/R: VPU is write/reader on this item
  97. * This structure is allocated in VPU side and shared to AP side.
  98. * @config: vp8 encoder configuration
  99. * @work_bufs: working buffer information in VPU side
  100. * The work_bufs here is for storing the 'size' info shared to AP side.
  101. * The similar item in struct venc_vp8_inst is for memory allocation
  102. * in AP side. The AP driver will copy the 'size' from here to the one in
  103. * struct mtk_vcodec_mem, then invoke mtk_vcodec_mem_alloc to allocate
  104. * the buffer. After that, bypass the 'dma_addr' to the 'iova' field here for
  105. * register setting in VPU side.
  106. */
  107. struct venc_vp8_vsi {
  108. struct venc_vp8_vpu_config config;
  109. struct venc_vp8_vpu_buf work_bufs[VENC_VP8_VPU_WORK_BUF_MAX];
  110. };
  111. /*
  112. * struct venc_vp8_inst - vp8 encoder AP driver instance
  113. * @hw_base: vp8 encoder hardware register base
  114. * @work_bufs: working buffer
  115. * @work_buf_allocated: working buffer allocated flag
  116. * @frm_cnt: encoded frame count, it's used for I-frame judgement and
  117. * reset when force intra cmd received.
  118. * @ts_mode: temporal scalability mode (0: disable, 1: enable)
  119. * support three temporal layers - 0: 7.5fps 1: 7.5fps 2: 15fps.
  120. * @vpu_inst: VPU instance to exchange information between AP and VPU
  121. * @vsi: driver structure allocated by VPU side and shared to AP side for
  122. * control and info share
  123. * @ctx: context for v4l2 layer integration
  124. */
  125. struct venc_vp8_inst {
  126. void __iomem *hw_base;
  127. struct mtk_vcodec_mem work_bufs[VENC_VP8_VPU_WORK_BUF_MAX];
  128. bool work_buf_allocated;
  129. unsigned int frm_cnt;
  130. unsigned int ts_mode;
  131. struct venc_vpu_inst vpu_inst;
  132. struct venc_vp8_vsi *vsi;
  133. struct mtk_vcodec_ctx *ctx;
  134. };
  135. static inline u32 vp8_enc_read_reg(struct venc_vp8_inst *inst, u32 addr)
  136. {
  137. return readl(inst->hw_base + addr);
  138. }
  139. static void vp8_enc_free_work_buf(struct venc_vp8_inst *inst)
  140. {
  141. int i;
  142. mtk_vcodec_debug_enter(inst);
  143. /* Buffers need to be freed by AP. */
  144. for (i = 0; i < VENC_VP8_VPU_WORK_BUF_MAX; i++) {
  145. if ((inst->work_bufs[i].size == 0))
  146. continue;
  147. mtk_vcodec_mem_free(inst->ctx, &inst->work_bufs[i]);
  148. }
  149. mtk_vcodec_debug_leave(inst);
  150. }
  151. static int vp8_enc_alloc_work_buf(struct venc_vp8_inst *inst)
  152. {
  153. int i;
  154. int ret = 0;
  155. struct venc_vp8_vpu_buf *wb = inst->vsi->work_bufs;
  156. mtk_vcodec_debug_enter(inst);
  157. for (i = 0; i < VENC_VP8_VPU_WORK_BUF_MAX; i++) {
  158. if ((wb[i].size == 0))
  159. continue;
  160. /*
  161. * This 'wb' structure is set by VPU side and shared to AP for
  162. * buffer allocation and IO virtual addr mapping. For most of
  163. * the buffers, AP will allocate the buffer according to 'size'
  164. * field and store the IO virtual addr in 'iova' field. For the
  165. * RC_CODEx buffers, they are pre-allocated in the VPU side
  166. * because they are inside VPU SRAM, and save the VPU addr in
  167. * the 'vpua' field. The AP will translate the VPU addr to the
  168. * corresponding IO virtual addr and store in 'iova' field.
  169. */
  170. inst->work_bufs[i].size = wb[i].size;
  171. ret = mtk_vcodec_mem_alloc(inst->ctx, &inst->work_bufs[i]);
  172. if (ret) {
  173. mtk_vcodec_err(inst,
  174. "cannot alloc work_bufs[%d]", i);
  175. goto err_alloc;
  176. }
  177. /*
  178. * This RC_CODEx is pre-allocated by VPU and saved in VPU addr.
  179. * So we need use memcpy to copy RC_CODEx from VPU addr into IO
  180. * virtual addr in 'iova' field for reg setting in VPU side.
  181. */
  182. if (i == VENC_VP8_VPU_WORK_BUF_RC_CODE ||
  183. i == VENC_VP8_VPU_WORK_BUF_RC_CODE2 ||
  184. i == VENC_VP8_VPU_WORK_BUF_RC_CODE3) {
  185. void *tmp_va;
  186. tmp_va = vpu_mapping_dm_addr(inst->vpu_inst.dev,
  187. wb[i].vpua);
  188. memcpy(inst->work_bufs[i].va, tmp_va, wb[i].size);
  189. }
  190. wb[i].iova = inst->work_bufs[i].dma_addr;
  191. mtk_vcodec_debug(inst,
  192. "work_bufs[%d] va=0x%p,iova=%pad,size=%zu",
  193. i, inst->work_bufs[i].va,
  194. &inst->work_bufs[i].dma_addr,
  195. inst->work_bufs[i].size);
  196. }
  197. mtk_vcodec_debug_leave(inst);
  198. return ret;
  199. err_alloc:
  200. vp8_enc_free_work_buf(inst);
  201. return ret;
  202. }
  203. static unsigned int vp8_enc_wait_venc_done(struct venc_vp8_inst *inst)
  204. {
  205. unsigned int irq_status = 0;
  206. struct mtk_vcodec_ctx *ctx = (struct mtk_vcodec_ctx *)inst->ctx;
  207. if (!mtk_vcodec_wait_for_done_ctx(ctx, MTK_INST_IRQ_RECEIVED,
  208. WAIT_INTR_TIMEOUT_MS)) {
  209. irq_status = ctx->irq_status;
  210. mtk_vcodec_debug(inst, "isr return %x", irq_status);
  211. }
  212. return irq_status;
  213. }
  214. /*
  215. * Compose ac_tag, bitstream header and bitstream payload into
  216. * one bitstream buffer.
  217. */
  218. static int vp8_enc_compose_one_frame(struct venc_vp8_inst *inst,
  219. struct mtk_vcodec_mem *bs_buf,
  220. unsigned int *bs_size)
  221. {
  222. unsigned int not_key;
  223. u32 bs_frm_size;
  224. u32 bs_hdr_len;
  225. unsigned int ac_tag_size;
  226. u8 ac_tag[MAX_AC_TAG_SIZE];
  227. u32 tag;
  228. bs_frm_size = vp8_enc_read_reg(inst, VENC_BITSTREAM_FRAME_SIZE);
  229. bs_hdr_len = vp8_enc_read_reg(inst, VENC_BITSTREAM_HEADER_LEN);
  230. /* if a frame is key frame, not_key is 0 */
  231. not_key = !inst->vpu_inst.is_key_frm;
  232. tag = (bs_hdr_len << 5) | 0x10 | not_key;
  233. ac_tag[0] = tag & 0xff;
  234. ac_tag[1] = (tag >> 8) & 0xff;
  235. ac_tag[2] = (tag >> 16) & 0xff;
  236. /* key frame */
  237. if (not_key == 0) {
  238. ac_tag_size = MAX_AC_TAG_SIZE;
  239. ac_tag[3] = 0x9d;
  240. ac_tag[4] = 0x01;
  241. ac_tag[5] = 0x2a;
  242. ac_tag[6] = inst->vsi->config.pic_w;
  243. ac_tag[7] = inst->vsi->config.pic_w >> 8;
  244. ac_tag[8] = inst->vsi->config.pic_h;
  245. ac_tag[9] = inst->vsi->config.pic_h >> 8;
  246. } else {
  247. ac_tag_size = 3;
  248. }
  249. if (bs_buf->size < bs_hdr_len + bs_frm_size + ac_tag_size) {
  250. mtk_vcodec_err(inst, "bitstream buf size is too small(%zu)",
  251. bs_buf->size);
  252. return -EINVAL;
  253. }
  254. /*
  255. * (1) The vp8 bitstream header and body are generated by the HW vp8
  256. * encoder separately at the same time. We cannot know the bitstream
  257. * header length in advance.
  258. * (2) From the vp8 spec, there is no stuffing byte allowed between the
  259. * ac tag, bitstream header and bitstream body.
  260. */
  261. memmove(bs_buf->va + bs_hdr_len + ac_tag_size,
  262. bs_buf->va, bs_frm_size);
  263. memcpy(bs_buf->va + ac_tag_size,
  264. inst->work_bufs[VENC_VP8_VPU_WORK_BUF_BS_HEADER].va,
  265. bs_hdr_len);
  266. memcpy(bs_buf->va, ac_tag, ac_tag_size);
  267. *bs_size = bs_frm_size + bs_hdr_len + ac_tag_size;
  268. return 0;
  269. }
  270. static int vp8_enc_encode_frame(struct venc_vp8_inst *inst,
  271. struct venc_frm_buf *frm_buf,
  272. struct mtk_vcodec_mem *bs_buf,
  273. unsigned int *bs_size)
  274. {
  275. int ret = 0;
  276. unsigned int irq_status;
  277. mtk_vcodec_debug(inst, "->frm_cnt=%d", inst->frm_cnt);
  278. ret = vpu_enc_encode(&inst->vpu_inst, 0, frm_buf, bs_buf, bs_size);
  279. if (ret)
  280. return ret;
  281. irq_status = vp8_enc_wait_venc_done(inst);
  282. if (irq_status != MTK_VENC_IRQ_STATUS_FRM) {
  283. mtk_vcodec_err(inst, "irq_status=%d failed", irq_status);
  284. return -EIO;
  285. }
  286. if (vp8_enc_compose_one_frame(inst, bs_buf, bs_size)) {
  287. mtk_vcodec_err(inst, "vp8_enc_compose_one_frame failed");
  288. return -EINVAL;
  289. }
  290. inst->frm_cnt++;
  291. mtk_vcodec_debug(inst, "<-size=%d key_frm=%d", *bs_size,
  292. inst->vpu_inst.is_key_frm);
  293. return ret;
  294. }
  295. static int vp8_enc_init(struct mtk_vcodec_ctx *ctx, unsigned long *handle)
  296. {
  297. int ret = 0;
  298. struct venc_vp8_inst *inst;
  299. inst = kzalloc(sizeof(*inst), GFP_KERNEL);
  300. if (!inst)
  301. return -ENOMEM;
  302. inst->ctx = ctx;
  303. inst->vpu_inst.ctx = ctx;
  304. inst->vpu_inst.dev = ctx->dev->vpu_plat_dev;
  305. inst->vpu_inst.id = IPI_VENC_VP8;
  306. inst->hw_base = mtk_vcodec_get_reg_addr(inst->ctx, VENC_LT_SYS);
  307. mtk_vcodec_debug_enter(inst);
  308. ret = vpu_enc_init(&inst->vpu_inst);
  309. inst->vsi = (struct venc_vp8_vsi *)inst->vpu_inst.vsi;
  310. mtk_vcodec_debug_leave(inst);
  311. if (ret)
  312. kfree(inst);
  313. else
  314. (*handle) = (unsigned long)inst;
  315. return ret;
  316. }
  317. static int vp8_enc_encode(unsigned long handle,
  318. enum venc_start_opt opt,
  319. struct venc_frm_buf *frm_buf,
  320. struct mtk_vcodec_mem *bs_buf,
  321. struct venc_done_result *result)
  322. {
  323. int ret = 0;
  324. struct venc_vp8_inst *inst = (struct venc_vp8_inst *)handle;
  325. struct mtk_vcodec_ctx *ctx = inst->ctx;
  326. mtk_vcodec_debug_enter(inst);
  327. enable_irq(ctx->dev->enc_lt_irq);
  328. switch (opt) {
  329. case VENC_START_OPT_ENCODE_FRAME:
  330. ret = vp8_enc_encode_frame(inst, frm_buf, bs_buf,
  331. &result->bs_size);
  332. if (ret)
  333. goto encode_err;
  334. result->is_key_frm = inst->vpu_inst.is_key_frm;
  335. break;
  336. default:
  337. mtk_vcodec_err(inst, "opt not support:%d", opt);
  338. ret = -EINVAL;
  339. break;
  340. }
  341. encode_err:
  342. disable_irq(ctx->dev->enc_lt_irq);
  343. mtk_vcodec_debug_leave(inst);
  344. return ret;
  345. }
  346. static int vp8_enc_set_param(unsigned long handle,
  347. enum venc_set_param_type type,
  348. struct venc_enc_param *enc_prm)
  349. {
  350. int ret = 0;
  351. struct venc_vp8_inst *inst = (struct venc_vp8_inst *)handle;
  352. mtk_vcodec_debug(inst, "->type=%d", type);
  353. switch (type) {
  354. case VENC_SET_PARAM_ENC:
  355. inst->vsi->config.input_fourcc = enc_prm->input_yuv_fmt;
  356. inst->vsi->config.bitrate = enc_prm->bitrate;
  357. inst->vsi->config.pic_w = enc_prm->width;
  358. inst->vsi->config.pic_h = enc_prm->height;
  359. inst->vsi->config.buf_w = enc_prm->buf_width;
  360. inst->vsi->config.buf_h = enc_prm->buf_height;
  361. inst->vsi->config.gop_size = enc_prm->gop_size;
  362. inst->vsi->config.framerate = enc_prm->frm_rate;
  363. inst->vsi->config.ts_mode = inst->ts_mode;
  364. ret = vpu_enc_set_param(&inst->vpu_inst, type, enc_prm);
  365. if (ret)
  366. break;
  367. if (inst->work_buf_allocated) {
  368. vp8_enc_free_work_buf(inst);
  369. inst->work_buf_allocated = false;
  370. }
  371. ret = vp8_enc_alloc_work_buf(inst);
  372. if (ret)
  373. break;
  374. inst->work_buf_allocated = true;
  375. break;
  376. /*
  377. * VENC_SET_PARAM_TS_MODE must be called before VENC_SET_PARAM_ENC
  378. */
  379. case VENC_SET_PARAM_TS_MODE:
  380. inst->ts_mode = 1;
  381. mtk_vcodec_debug(inst, "set ts_mode");
  382. break;
  383. default:
  384. ret = vpu_enc_set_param(&inst->vpu_inst, type, enc_prm);
  385. break;
  386. }
  387. mtk_vcodec_debug_leave(inst);
  388. return ret;
  389. }
  390. static int vp8_enc_deinit(unsigned long handle)
  391. {
  392. int ret = 0;
  393. struct venc_vp8_inst *inst = (struct venc_vp8_inst *)handle;
  394. mtk_vcodec_debug_enter(inst);
  395. ret = vpu_enc_deinit(&inst->vpu_inst);
  396. if (inst->work_buf_allocated)
  397. vp8_enc_free_work_buf(inst);
  398. mtk_vcodec_debug_leave(inst);
  399. kfree(inst);
  400. return ret;
  401. }
  402. static const struct venc_common_if venc_vp8_if = {
  403. vp8_enc_init,
  404. vp8_enc_encode,
  405. vp8_enc_set_param,
  406. vp8_enc_deinit,
  407. };
  408. const struct venc_common_if *get_vp8_enc_comm_if(void);
  409. const struct venc_common_if *get_vp8_enc_comm_if(void)
  410. {
  411. return &venc_vp8_if;
  412. }