ti-msgmgr.c 18 KB

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  1. /*
  2. * Texas Instruments' Message Manager Driver
  3. *
  4. * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
  5. * Nishanth Menon
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  12. * kind, whether express or implied; without even the implied warranty
  13. * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. */
  16. #define pr_fmt(fmt) "%s: " fmt, __func__
  17. #include <linux/device.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/io.h>
  20. #include <linux/kernel.h>
  21. #include <linux/mailbox_controller.h>
  22. #include <linux/module.h>
  23. #include <linux/of_device.h>
  24. #include <linux/of.h>
  25. #include <linux/of_irq.h>
  26. #include <linux/platform_device.h>
  27. #include <linux/soc/ti/ti-msgmgr.h>
  28. #define Q_DATA_OFFSET(proxy, queue, reg) \
  29. ((0x10000 * (proxy)) + (0x80 * (queue)) + ((reg) * 4))
  30. #define Q_STATE_OFFSET(queue) ((queue) * 0x4)
  31. #define Q_STATE_ENTRY_COUNT_MASK (0xFFF000)
  32. /**
  33. * struct ti_msgmgr_valid_queue_desc - SoC valid queues meant for this processor
  34. * @queue_id: Queue Number for this path
  35. * @proxy_id: Proxy ID representing the processor in SoC
  36. * @is_tx: Is this a receive path?
  37. */
  38. struct ti_msgmgr_valid_queue_desc {
  39. u8 queue_id;
  40. u8 proxy_id;
  41. bool is_tx;
  42. };
  43. /**
  44. * struct ti_msgmgr_desc - Description of message manager integration
  45. * @queue_count: Number of Queues
  46. * @max_message_size: Message size in bytes
  47. * @max_messages: Number of messages
  48. * @q_slices: Number of queue engines
  49. * @q_proxies: Number of queue proxies per page
  50. * @data_first_reg: First data register for proxy data region
  51. * @data_last_reg: Last data register for proxy data region
  52. * @tx_polled: Do I need to use polled mechanism for tx
  53. * @tx_poll_timeout_ms: Timeout in ms if polled
  54. * @valid_queues: List of Valid queues that the processor can access
  55. * @num_valid_queues: Number of valid queues
  56. *
  57. * This structure is used in of match data to describe how integration
  58. * for a specific compatible SoC is done.
  59. */
  60. struct ti_msgmgr_desc {
  61. u8 queue_count;
  62. u8 max_message_size;
  63. u8 max_messages;
  64. u8 q_slices;
  65. u8 q_proxies;
  66. u8 data_first_reg;
  67. u8 data_last_reg;
  68. bool tx_polled;
  69. int tx_poll_timeout_ms;
  70. const struct ti_msgmgr_valid_queue_desc *valid_queues;
  71. int num_valid_queues;
  72. };
  73. /**
  74. * struct ti_queue_inst - Description of a queue instance
  75. * @name: Queue Name
  76. * @queue_id: Queue Identifier as mapped on SoC
  77. * @proxy_id: Proxy Identifier as mapped on SoC
  78. * @irq: IRQ for Rx Queue
  79. * @is_tx: 'true' if transmit queue, else, 'false'
  80. * @queue_buff_start: First register of Data Buffer
  81. * @queue_buff_end: Last (or confirmation) register of Data buffer
  82. * @queue_state: Queue status register
  83. * @chan: Mailbox channel
  84. * @rx_buff: Receive buffer pointer allocated at probe, max_message_size
  85. */
  86. struct ti_queue_inst {
  87. char name[30];
  88. u8 queue_id;
  89. u8 proxy_id;
  90. int irq;
  91. bool is_tx;
  92. void __iomem *queue_buff_start;
  93. void __iomem *queue_buff_end;
  94. void __iomem *queue_state;
  95. struct mbox_chan *chan;
  96. u32 *rx_buff;
  97. };
  98. /**
  99. * struct ti_msgmgr_inst - Description of a Message Manager Instance
  100. * @dev: device pointer corresponding to the Message Manager instance
  101. * @desc: Description of the SoC integration
  102. * @queue_proxy_region: Queue proxy region where queue buffers are located
  103. * @queue_state_debug_region: Queue status register regions
  104. * @num_valid_queues: Number of valid queues defined for the processor
  105. * Note: other queues are probably reserved for other processors
  106. * in the SoC.
  107. * @qinsts: Array of valid Queue Instances for the Processor
  108. * @mbox: Mailbox Controller
  109. * @chans: Array for channels corresponding to the Queue Instances.
  110. */
  111. struct ti_msgmgr_inst {
  112. struct device *dev;
  113. const struct ti_msgmgr_desc *desc;
  114. void __iomem *queue_proxy_region;
  115. void __iomem *queue_state_debug_region;
  116. u8 num_valid_queues;
  117. struct ti_queue_inst *qinsts;
  118. struct mbox_controller mbox;
  119. struct mbox_chan *chans;
  120. };
  121. /**
  122. * ti_msgmgr_queue_get_num_messages() - Get the number of pending messages
  123. * @qinst: Queue instance for which we check the number of pending messages
  124. *
  125. * Return: number of messages pending in the queue (0 == no pending messages)
  126. */
  127. static inline int ti_msgmgr_queue_get_num_messages(struct ti_queue_inst *qinst)
  128. {
  129. u32 val;
  130. /*
  131. * We cannot use relaxed operation here - update may happen
  132. * real-time.
  133. */
  134. val = readl(qinst->queue_state) & Q_STATE_ENTRY_COUNT_MASK;
  135. val >>= __ffs(Q_STATE_ENTRY_COUNT_MASK);
  136. return val;
  137. }
  138. /**
  139. * ti_msgmgr_queue_rx_interrupt() - Interrupt handler for receive Queue
  140. * @irq: Interrupt number
  141. * @p: Channel Pointer
  142. *
  143. * Return: -EINVAL if there is no instance
  144. * IRQ_NONE if the interrupt is not ours.
  145. * IRQ_HANDLED if the rx interrupt was successfully handled.
  146. */
  147. static irqreturn_t ti_msgmgr_queue_rx_interrupt(int irq, void *p)
  148. {
  149. struct mbox_chan *chan = p;
  150. struct device *dev = chan->mbox->dev;
  151. struct ti_msgmgr_inst *inst = dev_get_drvdata(dev);
  152. struct ti_queue_inst *qinst = chan->con_priv;
  153. const struct ti_msgmgr_desc *desc;
  154. int msg_count, num_words;
  155. struct ti_msgmgr_message message;
  156. void __iomem *data_reg;
  157. u32 *word_data;
  158. if (WARN_ON(!inst)) {
  159. dev_err(dev, "no platform drv data??\n");
  160. return -EINVAL;
  161. }
  162. /* Do I have an invalid interrupt source? */
  163. if (qinst->is_tx) {
  164. dev_err(dev, "Cannot handle rx interrupt on tx channel %s\n",
  165. qinst->name);
  166. return IRQ_NONE;
  167. }
  168. /* Do I actually have messages to read? */
  169. msg_count = ti_msgmgr_queue_get_num_messages(qinst);
  170. if (!msg_count) {
  171. /* Shared IRQ? */
  172. dev_dbg(dev, "Spurious event - 0 pending data!\n");
  173. return IRQ_NONE;
  174. }
  175. /*
  176. * I have no idea about the protocol being used to communicate with the
  177. * remote producer - 0 could be valid data, so I wont make a judgement
  178. * of how many bytes I should be reading. Let the client figure this
  179. * out.. I just read the full message and pass it on..
  180. */
  181. desc = inst->desc;
  182. message.len = desc->max_message_size;
  183. message.buf = (u8 *)qinst->rx_buff;
  184. /*
  185. * NOTE about register access involved here:
  186. * the hardware block is implemented with 32bit access operations and no
  187. * support for data splitting. We don't want the hardware to misbehave
  188. * with sub 32bit access - For example: if the last register read is
  189. * split into byte wise access, it can result in the queue getting
  190. * stuck or indeterminate behavior. An out of order read operation may
  191. * result in weird data results as well.
  192. * Hence, we do not use memcpy_fromio or __ioread32_copy here, instead
  193. * we depend on readl for the purpose.
  194. *
  195. * Also note that the final register read automatically marks the
  196. * queue message as read.
  197. */
  198. for (data_reg = qinst->queue_buff_start, word_data = qinst->rx_buff,
  199. num_words = (desc->max_message_size / sizeof(u32));
  200. num_words; num_words--, data_reg += sizeof(u32), word_data++)
  201. *word_data = readl(data_reg);
  202. /*
  203. * Last register read automatically clears the IRQ if only 1 message
  204. * is pending - so send the data up the stack..
  205. * NOTE: Client is expected to be as optimal as possible, since
  206. * we invoke the handler in IRQ context.
  207. */
  208. mbox_chan_received_data(chan, (void *)&message);
  209. return IRQ_HANDLED;
  210. }
  211. /**
  212. * ti_msgmgr_queue_peek_data() - Peek to see if there are any rx messages.
  213. * @chan: Channel Pointer
  214. *
  215. * Return: 'true' if there is pending rx data, 'false' if there is none.
  216. */
  217. static bool ti_msgmgr_queue_peek_data(struct mbox_chan *chan)
  218. {
  219. struct ti_queue_inst *qinst = chan->con_priv;
  220. int msg_count;
  221. if (qinst->is_tx)
  222. return false;
  223. msg_count = ti_msgmgr_queue_get_num_messages(qinst);
  224. return msg_count ? true : false;
  225. }
  226. /**
  227. * ti_msgmgr_last_tx_done() - See if all the tx messages are sent
  228. * @chan: Channel pointer
  229. *
  230. * Return: 'true' is no pending tx data, 'false' if there are any.
  231. */
  232. static bool ti_msgmgr_last_tx_done(struct mbox_chan *chan)
  233. {
  234. struct ti_queue_inst *qinst = chan->con_priv;
  235. int msg_count;
  236. if (!qinst->is_tx)
  237. return false;
  238. msg_count = ti_msgmgr_queue_get_num_messages(qinst);
  239. /* if we have any messages pending.. */
  240. return msg_count ? false : true;
  241. }
  242. /**
  243. * ti_msgmgr_send_data() - Send data
  244. * @chan: Channel Pointer
  245. * @data: ti_msgmgr_message * Message Pointer
  246. *
  247. * Return: 0 if all goes good, else appropriate error messages.
  248. */
  249. static int ti_msgmgr_send_data(struct mbox_chan *chan, void *data)
  250. {
  251. struct device *dev = chan->mbox->dev;
  252. struct ti_msgmgr_inst *inst = dev_get_drvdata(dev);
  253. const struct ti_msgmgr_desc *desc;
  254. struct ti_queue_inst *qinst = chan->con_priv;
  255. int num_words, trail_bytes;
  256. struct ti_msgmgr_message *message = data;
  257. void __iomem *data_reg;
  258. u32 *word_data;
  259. if (WARN_ON(!inst)) {
  260. dev_err(dev, "no platform drv data??\n");
  261. return -EINVAL;
  262. }
  263. desc = inst->desc;
  264. if (desc->max_message_size < message->len) {
  265. dev_err(dev, "Queue %s message length %d > max %d\n",
  266. qinst->name, message->len, desc->max_message_size);
  267. return -EINVAL;
  268. }
  269. /* NOTE: Constraints similar to rx path exists here as well */
  270. for (data_reg = qinst->queue_buff_start,
  271. num_words = message->len / sizeof(u32),
  272. word_data = (u32 *)message->buf;
  273. num_words; num_words--, data_reg += sizeof(u32), word_data++)
  274. writel(*word_data, data_reg);
  275. trail_bytes = message->len % sizeof(u32);
  276. if (trail_bytes) {
  277. u32 data_trail = *word_data;
  278. /* Ensure all unused data is 0 */
  279. data_trail &= 0xFFFFFFFF >> (8 * (sizeof(u32) - trail_bytes));
  280. writel(data_trail, data_reg);
  281. data_reg++;
  282. }
  283. /*
  284. * 'data_reg' indicates next register to write. If we did not already
  285. * write on tx complete reg(last reg), we must do so for transmit
  286. */
  287. if (data_reg <= qinst->queue_buff_end)
  288. writel(0, qinst->queue_buff_end);
  289. return 0;
  290. }
  291. /**
  292. * ti_msgmgr_queue_startup() - Startup queue
  293. * @chan: Channel pointer
  294. *
  295. * Return: 0 if all goes good, else return corresponding error message
  296. */
  297. static int ti_msgmgr_queue_startup(struct mbox_chan *chan)
  298. {
  299. struct ti_queue_inst *qinst = chan->con_priv;
  300. struct device *dev = chan->mbox->dev;
  301. int ret;
  302. if (!qinst->is_tx) {
  303. /*
  304. * With the expectation that the IRQ might be shared in SoC
  305. */
  306. ret = request_irq(qinst->irq, ti_msgmgr_queue_rx_interrupt,
  307. IRQF_SHARED, qinst->name, chan);
  308. if (ret) {
  309. dev_err(dev, "Unable to get IRQ %d on %s(res=%d)\n",
  310. qinst->irq, qinst->name, ret);
  311. return ret;
  312. }
  313. }
  314. return 0;
  315. }
  316. /**
  317. * ti_msgmgr_queue_shutdown() - Shutdown the queue
  318. * @chan: Channel pointer
  319. */
  320. static void ti_msgmgr_queue_shutdown(struct mbox_chan *chan)
  321. {
  322. struct ti_queue_inst *qinst = chan->con_priv;
  323. if (!qinst->is_tx)
  324. free_irq(qinst->irq, chan);
  325. }
  326. /**
  327. * ti_msgmgr_of_xlate() - Translation of phandle to queue
  328. * @mbox: Mailbox controller
  329. * @p: phandle pointer
  330. *
  331. * Return: Mailbox channel corresponding to the queue, else return error
  332. * pointer.
  333. */
  334. static struct mbox_chan *ti_msgmgr_of_xlate(struct mbox_controller *mbox,
  335. const struct of_phandle_args *p)
  336. {
  337. struct ti_msgmgr_inst *inst;
  338. int req_qid, req_pid;
  339. struct ti_queue_inst *qinst;
  340. int i;
  341. inst = container_of(mbox, struct ti_msgmgr_inst, mbox);
  342. if (WARN_ON(!inst))
  343. return ERR_PTR(-EINVAL);
  344. /* #mbox-cells is 2 */
  345. if (p->args_count != 2) {
  346. dev_err(inst->dev, "Invalid arguments in dt[%d] instead of 2\n",
  347. p->args_count);
  348. return ERR_PTR(-EINVAL);
  349. }
  350. req_qid = p->args[0];
  351. req_pid = p->args[1];
  352. for (qinst = inst->qinsts, i = 0; i < inst->num_valid_queues;
  353. i++, qinst++) {
  354. if (req_qid == qinst->queue_id && req_pid == qinst->proxy_id)
  355. return qinst->chan;
  356. }
  357. dev_err(inst->dev, "Queue ID %d, Proxy ID %d is wrong on %s\n",
  358. req_qid, req_pid, p->np->name);
  359. return ERR_PTR(-ENOENT);
  360. }
  361. /**
  362. * ti_msgmgr_queue_setup() - Setup data structures for each queue instance
  363. * @idx: index of the queue
  364. * @dev: pointer to the message manager device
  365. * @np: pointer to the of node
  366. * @inst: Queue instance pointer
  367. * @d: Message Manager instance description data
  368. * @qd: Queue description data
  369. * @qinst: Queue instance pointer
  370. * @chan: pointer to mailbox channel
  371. *
  372. * Return: 0 if all went well, else return corresponding error
  373. */
  374. static int ti_msgmgr_queue_setup(int idx, struct device *dev,
  375. struct device_node *np,
  376. struct ti_msgmgr_inst *inst,
  377. const struct ti_msgmgr_desc *d,
  378. const struct ti_msgmgr_valid_queue_desc *qd,
  379. struct ti_queue_inst *qinst,
  380. struct mbox_chan *chan)
  381. {
  382. qinst->proxy_id = qd->proxy_id;
  383. qinst->queue_id = qd->queue_id;
  384. if (qinst->queue_id > d->queue_count) {
  385. dev_err(dev, "Queue Data [idx=%d] queuid %d > %d\n",
  386. idx, qinst->queue_id, d->queue_count);
  387. return -ERANGE;
  388. }
  389. qinst->is_tx = qd->is_tx;
  390. snprintf(qinst->name, sizeof(qinst->name), "%s %s_%03d_%03d",
  391. dev_name(dev), qinst->is_tx ? "tx" : "rx", qinst->queue_id,
  392. qinst->proxy_id);
  393. if (!qinst->is_tx) {
  394. char of_rx_irq_name[7];
  395. snprintf(of_rx_irq_name, sizeof(of_rx_irq_name),
  396. "rx_%03d", qinst->queue_id);
  397. qinst->irq = of_irq_get_byname(np, of_rx_irq_name);
  398. if (qinst->irq < 0) {
  399. dev_crit(dev,
  400. "[%d]QID %d PID %d:No IRQ[%s]: %d\n",
  401. idx, qinst->queue_id, qinst->proxy_id,
  402. of_rx_irq_name, qinst->irq);
  403. return qinst->irq;
  404. }
  405. /* Allocate usage buffer for rx */
  406. qinst->rx_buff = devm_kzalloc(dev,
  407. d->max_message_size, GFP_KERNEL);
  408. if (!qinst->rx_buff)
  409. return -ENOMEM;
  410. }
  411. qinst->queue_buff_start = inst->queue_proxy_region +
  412. Q_DATA_OFFSET(qinst->proxy_id, qinst->queue_id, d->data_first_reg);
  413. qinst->queue_buff_end = inst->queue_proxy_region +
  414. Q_DATA_OFFSET(qinst->proxy_id, qinst->queue_id, d->data_last_reg);
  415. qinst->queue_state = inst->queue_state_debug_region +
  416. Q_STATE_OFFSET(qinst->queue_id);
  417. qinst->chan = chan;
  418. chan->con_priv = qinst;
  419. dev_dbg(dev, "[%d] qidx=%d pidx=%d irq=%d q_s=%p q_e = %p\n",
  420. idx, qinst->queue_id, qinst->proxy_id, qinst->irq,
  421. qinst->queue_buff_start, qinst->queue_buff_end);
  422. return 0;
  423. }
  424. /* Queue operations */
  425. static const struct mbox_chan_ops ti_msgmgr_chan_ops = {
  426. .startup = ti_msgmgr_queue_startup,
  427. .shutdown = ti_msgmgr_queue_shutdown,
  428. .peek_data = ti_msgmgr_queue_peek_data,
  429. .last_tx_done = ti_msgmgr_last_tx_done,
  430. .send_data = ti_msgmgr_send_data,
  431. };
  432. /* Keystone K2G SoC integration details */
  433. static const struct ti_msgmgr_valid_queue_desc k2g_valid_queues[] = {
  434. {.queue_id = 0, .proxy_id = 0, .is_tx = true,},
  435. {.queue_id = 1, .proxy_id = 0, .is_tx = true,},
  436. {.queue_id = 2, .proxy_id = 0, .is_tx = true,},
  437. {.queue_id = 3, .proxy_id = 0, .is_tx = true,},
  438. {.queue_id = 5, .proxy_id = 2, .is_tx = false,},
  439. {.queue_id = 56, .proxy_id = 1, .is_tx = true,},
  440. {.queue_id = 57, .proxy_id = 2, .is_tx = false,},
  441. {.queue_id = 58, .proxy_id = 3, .is_tx = true,},
  442. {.queue_id = 59, .proxy_id = 4, .is_tx = true,},
  443. {.queue_id = 60, .proxy_id = 5, .is_tx = true,},
  444. {.queue_id = 61, .proxy_id = 6, .is_tx = true,},
  445. };
  446. static const struct ti_msgmgr_desc k2g_desc = {
  447. .queue_count = 64,
  448. .max_message_size = 64,
  449. .max_messages = 128,
  450. .q_slices = 1,
  451. .q_proxies = 1,
  452. .data_first_reg = 16,
  453. .data_last_reg = 31,
  454. .tx_polled = false,
  455. .valid_queues = k2g_valid_queues,
  456. .num_valid_queues = ARRAY_SIZE(k2g_valid_queues),
  457. };
  458. static const struct of_device_id ti_msgmgr_of_match[] = {
  459. {.compatible = "ti,k2g-message-manager", .data = &k2g_desc},
  460. { /* Sentinel */ }
  461. };
  462. MODULE_DEVICE_TABLE(of, ti_msgmgr_of_match);
  463. static int ti_msgmgr_probe(struct platform_device *pdev)
  464. {
  465. struct device *dev = &pdev->dev;
  466. const struct of_device_id *of_id;
  467. struct device_node *np;
  468. struct resource *res;
  469. const struct ti_msgmgr_desc *desc;
  470. struct ti_msgmgr_inst *inst;
  471. struct ti_queue_inst *qinst;
  472. struct mbox_controller *mbox;
  473. struct mbox_chan *chans;
  474. int queue_count;
  475. int i;
  476. int ret = -EINVAL;
  477. const struct ti_msgmgr_valid_queue_desc *queue_desc;
  478. if (!dev->of_node) {
  479. dev_err(dev, "no OF information\n");
  480. return -EINVAL;
  481. }
  482. np = dev->of_node;
  483. of_id = of_match_device(ti_msgmgr_of_match, dev);
  484. if (!of_id) {
  485. dev_err(dev, "OF data missing\n");
  486. return -EINVAL;
  487. }
  488. desc = of_id->data;
  489. inst = devm_kzalloc(dev, sizeof(*inst), GFP_KERNEL);
  490. if (!inst)
  491. return -ENOMEM;
  492. inst->dev = dev;
  493. inst->desc = desc;
  494. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  495. "queue_proxy_region");
  496. inst->queue_proxy_region = devm_ioremap_resource(dev, res);
  497. if (IS_ERR(inst->queue_proxy_region))
  498. return PTR_ERR(inst->queue_proxy_region);
  499. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  500. "queue_state_debug_region");
  501. inst->queue_state_debug_region = devm_ioremap_resource(dev, res);
  502. if (IS_ERR(inst->queue_state_debug_region))
  503. return PTR_ERR(inst->queue_state_debug_region);
  504. dev_dbg(dev, "proxy region=%p, queue_state=%p\n",
  505. inst->queue_proxy_region, inst->queue_state_debug_region);
  506. queue_count = desc->num_valid_queues;
  507. if (!queue_count || queue_count > desc->queue_count) {
  508. dev_crit(dev, "Invalid Number of queues %d. Max %d\n",
  509. queue_count, desc->queue_count);
  510. return -ERANGE;
  511. }
  512. inst->num_valid_queues = queue_count;
  513. qinst = devm_kzalloc(dev, sizeof(*qinst) * queue_count, GFP_KERNEL);
  514. if (!qinst)
  515. return -ENOMEM;
  516. inst->qinsts = qinst;
  517. chans = devm_kzalloc(dev, sizeof(*chans) * queue_count, GFP_KERNEL);
  518. if (!chans)
  519. return -ENOMEM;
  520. inst->chans = chans;
  521. for (i = 0, queue_desc = desc->valid_queues;
  522. i < queue_count; i++, qinst++, chans++, queue_desc++) {
  523. ret = ti_msgmgr_queue_setup(i, dev, np, inst,
  524. desc, queue_desc, qinst, chans);
  525. if (ret)
  526. return ret;
  527. }
  528. mbox = &inst->mbox;
  529. mbox->dev = dev;
  530. mbox->ops = &ti_msgmgr_chan_ops;
  531. mbox->chans = inst->chans;
  532. mbox->num_chans = inst->num_valid_queues;
  533. mbox->txdone_irq = false;
  534. mbox->txdone_poll = desc->tx_polled;
  535. if (desc->tx_polled)
  536. mbox->txpoll_period = desc->tx_poll_timeout_ms;
  537. mbox->of_xlate = ti_msgmgr_of_xlate;
  538. platform_set_drvdata(pdev, inst);
  539. ret = mbox_controller_register(mbox);
  540. if (ret)
  541. dev_err(dev, "Failed to register mbox_controller(%d)\n", ret);
  542. return ret;
  543. }
  544. static int ti_msgmgr_remove(struct platform_device *pdev)
  545. {
  546. struct ti_msgmgr_inst *inst;
  547. inst = platform_get_drvdata(pdev);
  548. mbox_controller_unregister(&inst->mbox);
  549. return 0;
  550. }
  551. static struct platform_driver ti_msgmgr_driver = {
  552. .probe = ti_msgmgr_probe,
  553. .remove = ti_msgmgr_remove,
  554. .driver = {
  555. .name = "ti-msgmgr",
  556. .of_match_table = of_match_ptr(ti_msgmgr_of_match),
  557. },
  558. };
  559. module_platform_driver(ti_msgmgr_driver);
  560. MODULE_LICENSE("GPL v2");
  561. MODULE_DESCRIPTION("TI message manager driver");
  562. MODULE_AUTHOR("Nishanth Menon");
  563. MODULE_ALIAS("platform:ti-msgmgr");