cyapa_gen3.c 37 KB

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  1. /*
  2. * Cypress APA trackpad with I2C interface
  3. *
  4. * Author: Dudley Du <dudl@cypress.com>
  5. * Further cleanup and restructuring by:
  6. * Daniel Kurtz <djkurtz@chromium.org>
  7. * Benson Leung <bleung@chromium.org>
  8. *
  9. * Copyright (C) 2011-2015 Cypress Semiconductor, Inc.
  10. * Copyright (C) 2011-2012 Google, Inc.
  11. *
  12. * This file is subject to the terms and conditions of the GNU General Public
  13. * License. See the file COPYING in the main directory of this archive for
  14. * more details.
  15. */
  16. #include <linux/delay.h>
  17. #include <linux/i2c.h>
  18. #include <linux/input.h>
  19. #include <linux/input/mt.h>
  20. #include <linux/module.h>
  21. #include <linux/slab.h>
  22. #include <asm/unaligned.h>
  23. #include "cyapa.h"
  24. #define GEN3_MAX_FINGERS 5
  25. #define GEN3_FINGER_NUM(x) (((x) >> 4) & 0x07)
  26. #define BLK_HEAD_BYTES 32
  27. /* Macro for register map group offset. */
  28. #define PRODUCT_ID_SIZE 16
  29. #define QUERY_DATA_SIZE 27
  30. #define REG_PROTOCOL_GEN_QUERY_OFFSET 20
  31. #define REG_OFFSET_DATA_BASE 0x0000
  32. #define REG_OFFSET_COMMAND_BASE 0x0028
  33. #define REG_OFFSET_QUERY_BASE 0x002a
  34. #define CYAPA_OFFSET_SOFT_RESET REG_OFFSET_COMMAND_BASE
  35. #define OP_RECALIBRATION_MASK 0x80
  36. #define OP_REPORT_BASELINE_MASK 0x40
  37. #define REG_OFFSET_MAX_BASELINE 0x0026
  38. #define REG_OFFSET_MIN_BASELINE 0x0027
  39. #define REG_OFFSET_POWER_MODE (REG_OFFSET_COMMAND_BASE + 1)
  40. #define SET_POWER_MODE_DELAY 10000 /* Unit: us */
  41. #define SET_POWER_MODE_TRIES 5
  42. #define GEN3_BL_CMD_CHECKSUM_SEED 0xff
  43. #define GEN3_BL_CMD_INITIATE_BL 0x38
  44. #define GEN3_BL_CMD_WRITE_BLOCK 0x39
  45. #define GEN3_BL_CMD_VERIFY_BLOCK 0x3a
  46. #define GEN3_BL_CMD_TERMINATE_BL 0x3b
  47. #define GEN3_BL_CMD_LAUNCH_APP 0xa5
  48. /*
  49. * CYAPA trackpad device states.
  50. * Used in register 0x00, bit1-0, DeviceStatus field.
  51. * Other values indicate device is in an abnormal state and must be reset.
  52. */
  53. #define CYAPA_DEV_NORMAL 0x03
  54. #define CYAPA_DEV_BUSY 0x01
  55. #define CYAPA_FW_BLOCK_SIZE 64
  56. #define CYAPA_FW_READ_SIZE 16
  57. #define CYAPA_FW_HDR_START 0x0780
  58. #define CYAPA_FW_HDR_BLOCK_COUNT 2
  59. #define CYAPA_FW_HDR_BLOCK_START (CYAPA_FW_HDR_START / CYAPA_FW_BLOCK_SIZE)
  60. #define CYAPA_FW_HDR_SIZE (CYAPA_FW_HDR_BLOCK_COUNT * \
  61. CYAPA_FW_BLOCK_SIZE)
  62. #define CYAPA_FW_DATA_START 0x0800
  63. #define CYAPA_FW_DATA_BLOCK_COUNT 480
  64. #define CYAPA_FW_DATA_BLOCK_START (CYAPA_FW_DATA_START / CYAPA_FW_BLOCK_SIZE)
  65. #define CYAPA_FW_DATA_SIZE (CYAPA_FW_DATA_BLOCK_COUNT * \
  66. CYAPA_FW_BLOCK_SIZE)
  67. #define CYAPA_FW_SIZE (CYAPA_FW_HDR_SIZE + CYAPA_FW_DATA_SIZE)
  68. #define CYAPA_CMD_LEN 16
  69. #define GEN3_BL_IDLE_FW_MAJ_VER_OFFSET 0x0b
  70. #define GEN3_BL_IDLE_FW_MIN_VER_OFFSET (GEN3_BL_IDLE_FW_MAJ_VER_OFFSET + 1)
  71. struct cyapa_touch {
  72. /*
  73. * high bits or x/y position value
  74. * bit 7 - 4: high 4 bits of x position value
  75. * bit 3 - 0: high 4 bits of y position value
  76. */
  77. u8 xy_hi;
  78. u8 x_lo; /* low 8 bits of x position value. */
  79. u8 y_lo; /* low 8 bits of y position value. */
  80. u8 pressure;
  81. /* id range is 1 - 15. It is incremented with every new touch. */
  82. u8 id;
  83. } __packed;
  84. struct cyapa_reg_data {
  85. /*
  86. * bit 0 - 1: device status
  87. * bit 3 - 2: power mode
  88. * bit 6 - 4: reserved
  89. * bit 7: interrupt valid bit
  90. */
  91. u8 device_status;
  92. /*
  93. * bit 7 - 4: number of fingers currently touching pad
  94. * bit 3: valid data check bit
  95. * bit 2: middle mechanism button state if exists
  96. * bit 1: right mechanism button state if exists
  97. * bit 0: left mechanism button state if exists
  98. */
  99. u8 finger_btn;
  100. /* CYAPA reports up to 5 touches per packet. */
  101. struct cyapa_touch touches[5];
  102. } __packed;
  103. struct gen3_write_block_cmd {
  104. u8 checksum_seed; /* Always be 0xff */
  105. u8 cmd_code; /* command code: 0x39 */
  106. u8 key[8]; /* 8-byte security key */
  107. __be16 block_num;
  108. u8 block_data[CYAPA_FW_BLOCK_SIZE];
  109. u8 block_checksum; /* Calculated using bytes 12 - 75 */
  110. u8 cmd_checksum; /* Calculated using bytes 0-76 */
  111. } __packed;
  112. static const u8 security_key[] = {
  113. 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07 };
  114. static const u8 bl_activate[] = { 0x00, 0xff, 0x38, 0x00, 0x01, 0x02, 0x03,
  115. 0x04, 0x05, 0x06, 0x07 };
  116. static const u8 bl_deactivate[] = { 0x00, 0xff, 0x3b, 0x00, 0x01, 0x02, 0x03,
  117. 0x04, 0x05, 0x06, 0x07 };
  118. static const u8 bl_exit[] = { 0x00, 0xff, 0xa5, 0x00, 0x01, 0x02, 0x03, 0x04,
  119. 0x05, 0x06, 0x07 };
  120. /* for byte read/write command */
  121. #define CMD_RESET 0
  122. #define CMD_POWER_MODE 1
  123. #define CMD_DEV_STATUS 2
  124. #define CMD_REPORT_MAX_BASELINE 3
  125. #define CMD_REPORT_MIN_BASELINE 4
  126. #define SMBUS_BYTE_CMD(cmd) (((cmd) & 0x3f) << 1)
  127. #define CYAPA_SMBUS_RESET SMBUS_BYTE_CMD(CMD_RESET)
  128. #define CYAPA_SMBUS_POWER_MODE SMBUS_BYTE_CMD(CMD_POWER_MODE)
  129. #define CYAPA_SMBUS_DEV_STATUS SMBUS_BYTE_CMD(CMD_DEV_STATUS)
  130. #define CYAPA_SMBUS_MAX_BASELINE SMBUS_BYTE_CMD(CMD_REPORT_MAX_BASELINE)
  131. #define CYAPA_SMBUS_MIN_BASELINE SMBUS_BYTE_CMD(CMD_REPORT_MIN_BASELINE)
  132. /* for group registers read/write command */
  133. #define REG_GROUP_DATA 0
  134. #define REG_GROUP_CMD 2
  135. #define REG_GROUP_QUERY 3
  136. #define SMBUS_GROUP_CMD(grp) (0x80 | (((grp) & 0x07) << 3))
  137. #define CYAPA_SMBUS_GROUP_DATA SMBUS_GROUP_CMD(REG_GROUP_DATA)
  138. #define CYAPA_SMBUS_GROUP_CMD SMBUS_GROUP_CMD(REG_GROUP_CMD)
  139. #define CYAPA_SMBUS_GROUP_QUERY SMBUS_GROUP_CMD(REG_GROUP_QUERY)
  140. /* for register block read/write command */
  141. #define CMD_BL_STATUS 0
  142. #define CMD_BL_HEAD 1
  143. #define CMD_BL_CMD 2
  144. #define CMD_BL_DATA 3
  145. #define CMD_BL_ALL 4
  146. #define CMD_BLK_PRODUCT_ID 5
  147. #define CMD_BLK_HEAD 6
  148. #define SMBUS_BLOCK_CMD(cmd) (0xc0 | (((cmd) & 0x1f) << 1))
  149. /* register block read/write command in bootloader mode */
  150. #define CYAPA_SMBUS_BL_STATUS SMBUS_BLOCK_CMD(CMD_BL_STATUS)
  151. #define CYAPA_SMBUS_BL_HEAD SMBUS_BLOCK_CMD(CMD_BL_HEAD)
  152. #define CYAPA_SMBUS_BL_CMD SMBUS_BLOCK_CMD(CMD_BL_CMD)
  153. #define CYAPA_SMBUS_BL_DATA SMBUS_BLOCK_CMD(CMD_BL_DATA)
  154. #define CYAPA_SMBUS_BL_ALL SMBUS_BLOCK_CMD(CMD_BL_ALL)
  155. /* register block read/write command in operational mode */
  156. #define CYAPA_SMBUS_BLK_PRODUCT_ID SMBUS_BLOCK_CMD(CMD_BLK_PRODUCT_ID)
  157. #define CYAPA_SMBUS_BLK_HEAD SMBUS_BLOCK_CMD(CMD_BLK_HEAD)
  158. /* for byte read/write command */
  159. #define CMD_RESET 0
  160. #define CMD_POWER_MODE 1
  161. #define CMD_DEV_STATUS 2
  162. #define CMD_REPORT_MAX_BASELINE 3
  163. #define CMD_REPORT_MIN_BASELINE 4
  164. #define SMBUS_BYTE_CMD(cmd) (((cmd) & 0x3f) << 1)
  165. #define CYAPA_SMBUS_RESET SMBUS_BYTE_CMD(CMD_RESET)
  166. #define CYAPA_SMBUS_POWER_MODE SMBUS_BYTE_CMD(CMD_POWER_MODE)
  167. #define CYAPA_SMBUS_DEV_STATUS SMBUS_BYTE_CMD(CMD_DEV_STATUS)
  168. #define CYAPA_SMBUS_MAX_BASELINE SMBUS_BYTE_CMD(CMD_REPORT_MAX_BASELINE)
  169. #define CYAPA_SMBUS_MIN_BASELINE SMBUS_BYTE_CMD(CMD_REPORT_MIN_BASELINE)
  170. /* for group registers read/write command */
  171. #define REG_GROUP_DATA 0
  172. #define REG_GROUP_CMD 2
  173. #define REG_GROUP_QUERY 3
  174. #define SMBUS_GROUP_CMD(grp) (0x80 | (((grp) & 0x07) << 3))
  175. #define CYAPA_SMBUS_GROUP_DATA SMBUS_GROUP_CMD(REG_GROUP_DATA)
  176. #define CYAPA_SMBUS_GROUP_CMD SMBUS_GROUP_CMD(REG_GROUP_CMD)
  177. #define CYAPA_SMBUS_GROUP_QUERY SMBUS_GROUP_CMD(REG_GROUP_QUERY)
  178. /* for register block read/write command */
  179. #define CMD_BL_STATUS 0
  180. #define CMD_BL_HEAD 1
  181. #define CMD_BL_CMD 2
  182. #define CMD_BL_DATA 3
  183. #define CMD_BL_ALL 4
  184. #define CMD_BLK_PRODUCT_ID 5
  185. #define CMD_BLK_HEAD 6
  186. #define SMBUS_BLOCK_CMD(cmd) (0xc0 | (((cmd) & 0x1f) << 1))
  187. /* register block read/write command in bootloader mode */
  188. #define CYAPA_SMBUS_BL_STATUS SMBUS_BLOCK_CMD(CMD_BL_STATUS)
  189. #define CYAPA_SMBUS_BL_HEAD SMBUS_BLOCK_CMD(CMD_BL_HEAD)
  190. #define CYAPA_SMBUS_BL_CMD SMBUS_BLOCK_CMD(CMD_BL_CMD)
  191. #define CYAPA_SMBUS_BL_DATA SMBUS_BLOCK_CMD(CMD_BL_DATA)
  192. #define CYAPA_SMBUS_BL_ALL SMBUS_BLOCK_CMD(CMD_BL_ALL)
  193. /* register block read/write command in operational mode */
  194. #define CYAPA_SMBUS_BLK_PRODUCT_ID SMBUS_BLOCK_CMD(CMD_BLK_PRODUCT_ID)
  195. #define CYAPA_SMBUS_BLK_HEAD SMBUS_BLOCK_CMD(CMD_BLK_HEAD)
  196. struct cyapa_cmd_len {
  197. u8 cmd;
  198. u8 len;
  199. };
  200. /* maps generic CYAPA_CMD_* code to the I2C equivalent */
  201. static const struct cyapa_cmd_len cyapa_i2c_cmds[] = {
  202. { CYAPA_OFFSET_SOFT_RESET, 1 }, /* CYAPA_CMD_SOFT_RESET */
  203. { REG_OFFSET_COMMAND_BASE + 1, 1 }, /* CYAPA_CMD_POWER_MODE */
  204. { REG_OFFSET_DATA_BASE, 1 }, /* CYAPA_CMD_DEV_STATUS */
  205. { REG_OFFSET_DATA_BASE, sizeof(struct cyapa_reg_data) },
  206. /* CYAPA_CMD_GROUP_DATA */
  207. { REG_OFFSET_COMMAND_BASE, 0 }, /* CYAPA_CMD_GROUP_CMD */
  208. { REG_OFFSET_QUERY_BASE, QUERY_DATA_SIZE }, /* CYAPA_CMD_GROUP_QUERY */
  209. { BL_HEAD_OFFSET, 3 }, /* CYAPA_CMD_BL_STATUS */
  210. { BL_HEAD_OFFSET, 16 }, /* CYAPA_CMD_BL_HEAD */
  211. { BL_HEAD_OFFSET, 16 }, /* CYAPA_CMD_BL_CMD */
  212. { BL_DATA_OFFSET, 16 }, /* CYAPA_CMD_BL_DATA */
  213. { BL_HEAD_OFFSET, 32 }, /* CYAPA_CMD_BL_ALL */
  214. { REG_OFFSET_QUERY_BASE, PRODUCT_ID_SIZE },
  215. /* CYAPA_CMD_BLK_PRODUCT_ID */
  216. { REG_OFFSET_DATA_BASE, 32 }, /* CYAPA_CMD_BLK_HEAD */
  217. { REG_OFFSET_MAX_BASELINE, 1 }, /* CYAPA_CMD_MAX_BASELINE */
  218. { REG_OFFSET_MIN_BASELINE, 1 }, /* CYAPA_CMD_MIN_BASELINE */
  219. };
  220. static const struct cyapa_cmd_len cyapa_smbus_cmds[] = {
  221. { CYAPA_SMBUS_RESET, 1 }, /* CYAPA_CMD_SOFT_RESET */
  222. { CYAPA_SMBUS_POWER_MODE, 1 }, /* CYAPA_CMD_POWER_MODE */
  223. { CYAPA_SMBUS_DEV_STATUS, 1 }, /* CYAPA_CMD_DEV_STATUS */
  224. { CYAPA_SMBUS_GROUP_DATA, sizeof(struct cyapa_reg_data) },
  225. /* CYAPA_CMD_GROUP_DATA */
  226. { CYAPA_SMBUS_GROUP_CMD, 2 }, /* CYAPA_CMD_GROUP_CMD */
  227. { CYAPA_SMBUS_GROUP_QUERY, QUERY_DATA_SIZE },
  228. /* CYAPA_CMD_GROUP_QUERY */
  229. { CYAPA_SMBUS_BL_STATUS, 3 }, /* CYAPA_CMD_BL_STATUS */
  230. { CYAPA_SMBUS_BL_HEAD, 16 }, /* CYAPA_CMD_BL_HEAD */
  231. { CYAPA_SMBUS_BL_CMD, 16 }, /* CYAPA_CMD_BL_CMD */
  232. { CYAPA_SMBUS_BL_DATA, 16 }, /* CYAPA_CMD_BL_DATA */
  233. { CYAPA_SMBUS_BL_ALL, 32 }, /* CYAPA_CMD_BL_ALL */
  234. { CYAPA_SMBUS_BLK_PRODUCT_ID, PRODUCT_ID_SIZE },
  235. /* CYAPA_CMD_BLK_PRODUCT_ID */
  236. { CYAPA_SMBUS_BLK_HEAD, 16 }, /* CYAPA_CMD_BLK_HEAD */
  237. { CYAPA_SMBUS_MAX_BASELINE, 1 }, /* CYAPA_CMD_MAX_BASELINE */
  238. { CYAPA_SMBUS_MIN_BASELINE, 1 }, /* CYAPA_CMD_MIN_BASELINE */
  239. };
  240. static int cyapa_gen3_try_poll_handler(struct cyapa *cyapa);
  241. /*
  242. * cyapa_smbus_read_block - perform smbus block read command
  243. * @cyapa - private data structure of the driver
  244. * @cmd - the properly encoded smbus command
  245. * @len - expected length of smbus command result
  246. * @values - buffer to store smbus command result
  247. *
  248. * Returns negative errno, else the number of bytes written.
  249. *
  250. * Note:
  251. * In trackpad device, the memory block allocated for I2C register map
  252. * is 256 bytes, so the max read block for I2C bus is 256 bytes.
  253. */
  254. ssize_t cyapa_smbus_read_block(struct cyapa *cyapa, u8 cmd, size_t len,
  255. u8 *values)
  256. {
  257. ssize_t ret;
  258. u8 index;
  259. u8 smbus_cmd;
  260. u8 *buf;
  261. struct i2c_client *client = cyapa->client;
  262. if (!(SMBUS_BYTE_BLOCK_CMD_MASK & cmd))
  263. return -EINVAL;
  264. if (SMBUS_GROUP_BLOCK_CMD_MASK & cmd) {
  265. /* read specific block registers command. */
  266. smbus_cmd = SMBUS_ENCODE_RW(cmd, SMBUS_READ);
  267. ret = i2c_smbus_read_block_data(client, smbus_cmd, values);
  268. goto out;
  269. }
  270. ret = 0;
  271. for (index = 0; index * I2C_SMBUS_BLOCK_MAX < len; index++) {
  272. smbus_cmd = SMBUS_ENCODE_IDX(cmd, index);
  273. smbus_cmd = SMBUS_ENCODE_RW(smbus_cmd, SMBUS_READ);
  274. buf = values + I2C_SMBUS_BLOCK_MAX * index;
  275. ret = i2c_smbus_read_block_data(client, smbus_cmd, buf);
  276. if (ret < 0)
  277. goto out;
  278. }
  279. out:
  280. return ret > 0 ? len : ret;
  281. }
  282. static s32 cyapa_read_byte(struct cyapa *cyapa, u8 cmd_idx)
  283. {
  284. u8 cmd;
  285. if (cyapa->smbus) {
  286. cmd = cyapa_smbus_cmds[cmd_idx].cmd;
  287. cmd = SMBUS_ENCODE_RW(cmd, SMBUS_READ);
  288. } else {
  289. cmd = cyapa_i2c_cmds[cmd_idx].cmd;
  290. }
  291. return i2c_smbus_read_byte_data(cyapa->client, cmd);
  292. }
  293. static s32 cyapa_write_byte(struct cyapa *cyapa, u8 cmd_idx, u8 value)
  294. {
  295. u8 cmd;
  296. if (cyapa->smbus) {
  297. cmd = cyapa_smbus_cmds[cmd_idx].cmd;
  298. cmd = SMBUS_ENCODE_RW(cmd, SMBUS_WRITE);
  299. } else {
  300. cmd = cyapa_i2c_cmds[cmd_idx].cmd;
  301. }
  302. return i2c_smbus_write_byte_data(cyapa->client, cmd, value);
  303. }
  304. ssize_t cyapa_i2c_reg_read_block(struct cyapa *cyapa, u8 reg, size_t len,
  305. u8 *values)
  306. {
  307. return i2c_smbus_read_i2c_block_data(cyapa->client, reg, len, values);
  308. }
  309. static ssize_t cyapa_i2c_reg_write_block(struct cyapa *cyapa, u8 reg,
  310. size_t len, const u8 *values)
  311. {
  312. return i2c_smbus_write_i2c_block_data(cyapa->client, reg, len, values);
  313. }
  314. ssize_t cyapa_read_block(struct cyapa *cyapa, u8 cmd_idx, u8 *values)
  315. {
  316. u8 cmd;
  317. size_t len;
  318. if (cyapa->smbus) {
  319. cmd = cyapa_smbus_cmds[cmd_idx].cmd;
  320. len = cyapa_smbus_cmds[cmd_idx].len;
  321. return cyapa_smbus_read_block(cyapa, cmd, len, values);
  322. }
  323. cmd = cyapa_i2c_cmds[cmd_idx].cmd;
  324. len = cyapa_i2c_cmds[cmd_idx].len;
  325. return cyapa_i2c_reg_read_block(cyapa, cmd, len, values);
  326. }
  327. /*
  328. * Determine the Gen3 trackpad device's current operating state.
  329. *
  330. */
  331. static int cyapa_gen3_state_parse(struct cyapa *cyapa, u8 *reg_data, int len)
  332. {
  333. cyapa->state = CYAPA_STATE_NO_DEVICE;
  334. /* Parse based on Gen3 characteristic registers and bits */
  335. if (reg_data[REG_BL_FILE] == BL_FILE &&
  336. reg_data[REG_BL_ERROR] == BL_ERROR_NO_ERR_IDLE &&
  337. (reg_data[REG_BL_STATUS] ==
  338. (BL_STATUS_RUNNING | BL_STATUS_CSUM_VALID) ||
  339. reg_data[REG_BL_STATUS] == BL_STATUS_RUNNING)) {
  340. /*
  341. * Normal state after power on or reset,
  342. * REG_BL_STATUS == 0x11, firmware image checksum is valid.
  343. * REG_BL_STATUS == 0x10, firmware image checksum is invalid.
  344. */
  345. cyapa->gen = CYAPA_GEN3;
  346. cyapa->state = CYAPA_STATE_BL_IDLE;
  347. } else if (reg_data[REG_BL_FILE] == BL_FILE &&
  348. (reg_data[REG_BL_STATUS] & BL_STATUS_RUNNING) ==
  349. BL_STATUS_RUNNING) {
  350. cyapa->gen = CYAPA_GEN3;
  351. if (reg_data[REG_BL_STATUS] & BL_STATUS_BUSY) {
  352. cyapa->state = CYAPA_STATE_BL_BUSY;
  353. } else {
  354. if ((reg_data[REG_BL_ERROR] & BL_ERROR_BOOTLOADING) ==
  355. BL_ERROR_BOOTLOADING)
  356. cyapa->state = CYAPA_STATE_BL_ACTIVE;
  357. else
  358. cyapa->state = CYAPA_STATE_BL_IDLE;
  359. }
  360. } else if ((reg_data[REG_OP_STATUS] & OP_STATUS_SRC) &&
  361. (reg_data[REG_OP_DATA1] & OP_DATA_VALID)) {
  362. /*
  363. * Normal state when running in operational mode,
  364. * may also not in full power state or
  365. * busying in command process.
  366. */
  367. if (GEN3_FINGER_NUM(reg_data[REG_OP_DATA1]) <=
  368. GEN3_MAX_FINGERS) {
  369. /* Finger number data is valid. */
  370. cyapa->gen = CYAPA_GEN3;
  371. cyapa->state = CYAPA_STATE_OP;
  372. }
  373. } else if (reg_data[REG_OP_STATUS] == 0x0C &&
  374. reg_data[REG_OP_DATA1] == 0x08) {
  375. /* Op state when first two registers overwritten with 0x00 */
  376. cyapa->gen = CYAPA_GEN3;
  377. cyapa->state = CYAPA_STATE_OP;
  378. } else if (reg_data[REG_BL_STATUS] &
  379. (BL_STATUS_RUNNING | BL_STATUS_BUSY)) {
  380. cyapa->gen = CYAPA_GEN3;
  381. cyapa->state = CYAPA_STATE_BL_BUSY;
  382. }
  383. if (cyapa->gen == CYAPA_GEN3 && (cyapa->state == CYAPA_STATE_OP ||
  384. cyapa->state == CYAPA_STATE_BL_IDLE ||
  385. cyapa->state == CYAPA_STATE_BL_ACTIVE ||
  386. cyapa->state == CYAPA_STATE_BL_BUSY))
  387. return 0;
  388. return -EAGAIN;
  389. }
  390. /*
  391. * Enter bootloader by soft resetting the device.
  392. *
  393. * If device is already in the bootloader, the function just returns.
  394. * Otherwise, reset the device; after reset, device enters bootloader idle
  395. * state immediately.
  396. *
  397. * Returns:
  398. * 0 on success
  399. * -EAGAIN device was reset, but is not now in bootloader idle state
  400. * < 0 if the device never responds within the timeout
  401. */
  402. static int cyapa_gen3_bl_enter(struct cyapa *cyapa)
  403. {
  404. int error;
  405. int waiting_time;
  406. error = cyapa_poll_state(cyapa, 500);
  407. if (error)
  408. return error;
  409. if (cyapa->state == CYAPA_STATE_BL_IDLE) {
  410. /* Already in BL_IDLE. Skipping reset. */
  411. return 0;
  412. }
  413. if (cyapa->state != CYAPA_STATE_OP)
  414. return -EAGAIN;
  415. cyapa->operational = false;
  416. cyapa->state = CYAPA_STATE_NO_DEVICE;
  417. error = cyapa_write_byte(cyapa, CYAPA_CMD_SOFT_RESET, 0x01);
  418. if (error)
  419. return -EIO;
  420. usleep_range(25000, 50000);
  421. waiting_time = 2000; /* For some shipset, max waiting time is 1~2s. */
  422. do {
  423. error = cyapa_poll_state(cyapa, 500);
  424. if (error) {
  425. if (error == -ETIMEDOUT) {
  426. waiting_time -= 500;
  427. continue;
  428. }
  429. return error;
  430. }
  431. if ((cyapa->state == CYAPA_STATE_BL_IDLE) &&
  432. !(cyapa->status[REG_BL_STATUS] & BL_STATUS_WATCHDOG))
  433. break;
  434. msleep(100);
  435. waiting_time -= 100;
  436. } while (waiting_time > 0);
  437. if ((cyapa->state != CYAPA_STATE_BL_IDLE) ||
  438. (cyapa->status[REG_BL_STATUS] & BL_STATUS_WATCHDOG))
  439. return -EAGAIN;
  440. return 0;
  441. }
  442. static int cyapa_gen3_bl_activate(struct cyapa *cyapa)
  443. {
  444. int error;
  445. error = cyapa_i2c_reg_write_block(cyapa, 0, sizeof(bl_activate),
  446. bl_activate);
  447. if (error)
  448. return error;
  449. /* Wait for bootloader to activate; takes between 2 and 12 seconds */
  450. msleep(2000);
  451. error = cyapa_poll_state(cyapa, 11000);
  452. if (error)
  453. return error;
  454. if (cyapa->state != CYAPA_STATE_BL_ACTIVE)
  455. return -EAGAIN;
  456. return 0;
  457. }
  458. static int cyapa_gen3_bl_deactivate(struct cyapa *cyapa)
  459. {
  460. int error;
  461. error = cyapa_i2c_reg_write_block(cyapa, 0, sizeof(bl_deactivate),
  462. bl_deactivate);
  463. if (error)
  464. return error;
  465. /* Wait for bootloader to switch to idle state; should take < 100ms */
  466. msleep(100);
  467. error = cyapa_poll_state(cyapa, 500);
  468. if (error)
  469. return error;
  470. if (cyapa->state != CYAPA_STATE_BL_IDLE)
  471. return -EAGAIN;
  472. return 0;
  473. }
  474. /*
  475. * Exit bootloader
  476. *
  477. * Send bl_exit command, then wait 50 - 100 ms to let device transition to
  478. * operational mode. If this is the first time the device's firmware is
  479. * running, it can take up to 2 seconds to calibrate its sensors. So, poll
  480. * the device's new state for up to 2 seconds.
  481. *
  482. * Returns:
  483. * -EIO failure while reading from device
  484. * -EAGAIN device is stuck in bootloader, b/c it has invalid firmware
  485. * 0 device is supported and in operational mode
  486. */
  487. static int cyapa_gen3_bl_exit(struct cyapa *cyapa)
  488. {
  489. int error;
  490. error = cyapa_i2c_reg_write_block(cyapa, 0, sizeof(bl_exit), bl_exit);
  491. if (error)
  492. return error;
  493. /*
  494. * Wait for bootloader to exit, and operation mode to start.
  495. * Normally, this takes at least 50 ms.
  496. */
  497. usleep_range(50000, 100000);
  498. /*
  499. * In addition, when a device boots for the first time after being
  500. * updated to new firmware, it must first calibrate its sensors, which
  501. * can take up to an additional 2 seconds. If the device power is
  502. * running low, this may take even longer.
  503. */
  504. error = cyapa_poll_state(cyapa, 4000);
  505. if (error < 0)
  506. return error;
  507. if (cyapa->state != CYAPA_STATE_OP)
  508. return -EAGAIN;
  509. return 0;
  510. }
  511. static u16 cyapa_gen3_csum(const u8 *buf, size_t count)
  512. {
  513. int i;
  514. u16 csum = 0;
  515. for (i = 0; i < count; i++)
  516. csum += buf[i];
  517. return csum;
  518. }
  519. /*
  520. * Verify the integrity of a CYAPA firmware image file.
  521. *
  522. * The firmware image file is 30848 bytes, composed of 482 64-byte blocks.
  523. *
  524. * The first 2 blocks are the firmware header.
  525. * The next 480 blocks are the firmware image.
  526. *
  527. * The first two bytes of the header hold the header checksum, computed by
  528. * summing the other 126 bytes of the header.
  529. * The last two bytes of the header hold the firmware image checksum, computed
  530. * by summing the 30720 bytes of the image modulo 0xffff.
  531. *
  532. * Both checksums are stored little-endian.
  533. */
  534. static int cyapa_gen3_check_fw(struct cyapa *cyapa, const struct firmware *fw)
  535. {
  536. struct device *dev = &cyapa->client->dev;
  537. u16 csum;
  538. u16 csum_expected;
  539. /* Firmware must match exact 30848 bytes = 482 64-byte blocks. */
  540. if (fw->size != CYAPA_FW_SIZE) {
  541. dev_err(dev, "invalid firmware size = %zu, expected %u.\n",
  542. fw->size, CYAPA_FW_SIZE);
  543. return -EINVAL;
  544. }
  545. /* Verify header block */
  546. csum_expected = (fw->data[0] << 8) | fw->data[1];
  547. csum = cyapa_gen3_csum(&fw->data[2], CYAPA_FW_HDR_SIZE - 2);
  548. if (csum != csum_expected) {
  549. dev_err(dev, "%s %04x, expected: %04x\n",
  550. "invalid firmware header checksum = ",
  551. csum, csum_expected);
  552. return -EINVAL;
  553. }
  554. /* Verify firmware image */
  555. csum_expected = (fw->data[CYAPA_FW_HDR_SIZE - 2] << 8) |
  556. fw->data[CYAPA_FW_HDR_SIZE - 1];
  557. csum = cyapa_gen3_csum(&fw->data[CYAPA_FW_HDR_SIZE],
  558. CYAPA_FW_DATA_SIZE);
  559. if (csum != csum_expected) {
  560. dev_err(dev, "%s %04x, expected: %04x\n",
  561. "invalid firmware header checksum = ",
  562. csum, csum_expected);
  563. return -EINVAL;
  564. }
  565. return 0;
  566. }
  567. /*
  568. * Write a |len| byte long buffer |buf| to the device, by chopping it up into a
  569. * sequence of smaller |CYAPA_CMD_LEN|-length write commands.
  570. *
  571. * The data bytes for a write command are prepended with the 1-byte offset
  572. * of the data relative to the start of |buf|.
  573. */
  574. static int cyapa_gen3_write_buffer(struct cyapa *cyapa,
  575. const u8 *buf, size_t len)
  576. {
  577. int error;
  578. size_t i;
  579. unsigned char cmd[CYAPA_CMD_LEN + 1];
  580. size_t cmd_len;
  581. for (i = 0; i < len; i += CYAPA_CMD_LEN) {
  582. const u8 *payload = &buf[i];
  583. cmd_len = (len - i >= CYAPA_CMD_LEN) ? CYAPA_CMD_LEN : len - i;
  584. cmd[0] = i;
  585. memcpy(&cmd[1], payload, cmd_len);
  586. error = cyapa_i2c_reg_write_block(cyapa, 0, cmd_len + 1, cmd);
  587. if (error)
  588. return error;
  589. }
  590. return 0;
  591. }
  592. /*
  593. * A firmware block write command writes 64 bytes of data to a single flash
  594. * page in the device. The 78-byte block write command has the format:
  595. * <0xff> <CMD> <Key> <Start> <Data> <Data-Checksum> <CMD Checksum>
  596. *
  597. * <0xff> - every command starts with 0xff
  598. * <CMD> - the write command value is 0x39
  599. * <Key> - write commands include an 8-byte key: { 00 01 02 03 04 05 06 07 }
  600. * <Block> - Memory Block number (address / 64) (16-bit, big-endian)
  601. * <Data> - 64 bytes of firmware image data
  602. * <Data Checksum> - sum of 64 <Data> bytes, modulo 0xff
  603. * <CMD Checksum> - sum of 77 bytes, from 0xff to <Data Checksum>
  604. *
  605. * Each write command is split into 5 i2c write transactions of up to 16 bytes.
  606. * Each transaction starts with an i2c register offset: (00, 10, 20, 30, 40).
  607. */
  608. static int cyapa_gen3_write_fw_block(struct cyapa *cyapa,
  609. u16 block, const u8 *data)
  610. {
  611. int ret;
  612. struct gen3_write_block_cmd write_block_cmd;
  613. u8 status[BL_STATUS_SIZE];
  614. int tries;
  615. u8 bl_status, bl_error;
  616. /* Set write command and security key bytes. */
  617. write_block_cmd.checksum_seed = GEN3_BL_CMD_CHECKSUM_SEED;
  618. write_block_cmd.cmd_code = GEN3_BL_CMD_WRITE_BLOCK;
  619. memcpy(write_block_cmd.key, security_key, sizeof(security_key));
  620. put_unaligned_be16(block, &write_block_cmd.block_num);
  621. memcpy(write_block_cmd.block_data, data, CYAPA_FW_BLOCK_SIZE);
  622. write_block_cmd.block_checksum = cyapa_gen3_csum(
  623. write_block_cmd.block_data, CYAPA_FW_BLOCK_SIZE);
  624. write_block_cmd.cmd_checksum = cyapa_gen3_csum((u8 *)&write_block_cmd,
  625. sizeof(write_block_cmd) - 1);
  626. ret = cyapa_gen3_write_buffer(cyapa, (u8 *)&write_block_cmd,
  627. sizeof(write_block_cmd));
  628. if (ret)
  629. return ret;
  630. /* Wait for write to finish */
  631. tries = 11; /* Programming for one block can take about 100ms. */
  632. do {
  633. usleep_range(10000, 20000);
  634. /* Check block write command result status. */
  635. ret = cyapa_i2c_reg_read_block(cyapa, BL_HEAD_OFFSET,
  636. BL_STATUS_SIZE, status);
  637. if (ret != BL_STATUS_SIZE)
  638. return (ret < 0) ? ret : -EIO;
  639. } while ((status[REG_BL_STATUS] & BL_STATUS_BUSY) && --tries);
  640. /* Ignore WATCHDOG bit and reserved bits. */
  641. bl_status = status[REG_BL_STATUS] & ~BL_STATUS_REV_MASK;
  642. bl_error = status[REG_BL_ERROR] & ~BL_ERROR_RESERVED;
  643. if (bl_status & BL_STATUS_BUSY)
  644. ret = -ETIMEDOUT;
  645. else if (bl_status != BL_STATUS_RUNNING ||
  646. bl_error != BL_ERROR_BOOTLOADING)
  647. ret = -EIO;
  648. else
  649. ret = 0;
  650. return ret;
  651. }
  652. static int cyapa_gen3_write_blocks(struct cyapa *cyapa,
  653. size_t start_block, size_t block_count,
  654. const u8 *image_data)
  655. {
  656. int error;
  657. int i;
  658. for (i = 0; i < block_count; i++) {
  659. size_t block = start_block + i;
  660. size_t addr = i * CYAPA_FW_BLOCK_SIZE;
  661. const u8 *data = &image_data[addr];
  662. error = cyapa_gen3_write_fw_block(cyapa, block, data);
  663. if (error)
  664. return error;
  665. }
  666. return 0;
  667. }
  668. static int cyapa_gen3_do_fw_update(struct cyapa *cyapa,
  669. const struct firmware *fw)
  670. {
  671. struct device *dev = &cyapa->client->dev;
  672. int error;
  673. /* First write data, starting at byte 128 of fw->data */
  674. error = cyapa_gen3_write_blocks(cyapa,
  675. CYAPA_FW_DATA_BLOCK_START, CYAPA_FW_DATA_BLOCK_COUNT,
  676. &fw->data[CYAPA_FW_HDR_BLOCK_COUNT * CYAPA_FW_BLOCK_SIZE]);
  677. if (error) {
  678. dev_err(dev, "FW update aborted, write image: %d\n", error);
  679. return error;
  680. }
  681. /* Then write checksum */
  682. error = cyapa_gen3_write_blocks(cyapa,
  683. CYAPA_FW_HDR_BLOCK_START, CYAPA_FW_HDR_BLOCK_COUNT,
  684. &fw->data[0]);
  685. if (error) {
  686. dev_err(dev, "FW update aborted, write checksum: %d\n", error);
  687. return error;
  688. }
  689. return 0;
  690. }
  691. static ssize_t cyapa_gen3_do_calibrate(struct device *dev,
  692. struct device_attribute *attr,
  693. const char *buf, size_t count)
  694. {
  695. struct cyapa *cyapa = dev_get_drvdata(dev);
  696. int tries;
  697. int ret;
  698. ret = cyapa_read_byte(cyapa, CYAPA_CMD_DEV_STATUS);
  699. if (ret < 0) {
  700. dev_err(dev, "Error reading dev status: %d\n", ret);
  701. goto out;
  702. }
  703. if ((ret & CYAPA_DEV_NORMAL) != CYAPA_DEV_NORMAL) {
  704. dev_warn(dev, "Trackpad device is busy, device state: 0x%02x\n",
  705. ret);
  706. ret = -EAGAIN;
  707. goto out;
  708. }
  709. ret = cyapa_write_byte(cyapa, CYAPA_CMD_SOFT_RESET,
  710. OP_RECALIBRATION_MASK);
  711. if (ret < 0) {
  712. dev_err(dev, "Failed to send calibrate command: %d\n",
  713. ret);
  714. goto out;
  715. }
  716. tries = 20; /* max recalibration timeout 2s. */
  717. do {
  718. /*
  719. * For this recalibration, the max time will not exceed 2s.
  720. * The average time is approximately 500 - 700 ms, and we
  721. * will check the status every 100 - 200ms.
  722. */
  723. usleep_range(100000, 200000);
  724. ret = cyapa_read_byte(cyapa, CYAPA_CMD_DEV_STATUS);
  725. if (ret < 0) {
  726. dev_err(dev, "Error reading dev status: %d\n",
  727. ret);
  728. goto out;
  729. }
  730. if ((ret & CYAPA_DEV_NORMAL) == CYAPA_DEV_NORMAL)
  731. break;
  732. } while (--tries);
  733. if (tries == 0) {
  734. dev_err(dev, "Failed to calibrate. Timeout.\n");
  735. ret = -ETIMEDOUT;
  736. goto out;
  737. }
  738. dev_dbg(dev, "Calibration successful.\n");
  739. out:
  740. return ret < 0 ? ret : count;
  741. }
  742. static ssize_t cyapa_gen3_show_baseline(struct device *dev,
  743. struct device_attribute *attr, char *buf)
  744. {
  745. struct cyapa *cyapa = dev_get_drvdata(dev);
  746. int max_baseline, min_baseline;
  747. int tries;
  748. int ret;
  749. ret = cyapa_read_byte(cyapa, CYAPA_CMD_DEV_STATUS);
  750. if (ret < 0) {
  751. dev_err(dev, "Error reading dev status. err = %d\n", ret);
  752. goto out;
  753. }
  754. if ((ret & CYAPA_DEV_NORMAL) != CYAPA_DEV_NORMAL) {
  755. dev_warn(dev, "Trackpad device is busy. device state = 0x%x\n",
  756. ret);
  757. ret = -EAGAIN;
  758. goto out;
  759. }
  760. ret = cyapa_write_byte(cyapa, CYAPA_CMD_SOFT_RESET,
  761. OP_REPORT_BASELINE_MASK);
  762. if (ret < 0) {
  763. dev_err(dev, "Failed to send report baseline command. %d\n",
  764. ret);
  765. goto out;
  766. }
  767. tries = 3; /* Try for 30 to 60 ms */
  768. do {
  769. usleep_range(10000, 20000);
  770. ret = cyapa_read_byte(cyapa, CYAPA_CMD_DEV_STATUS);
  771. if (ret < 0) {
  772. dev_err(dev, "Error reading dev status. err = %d\n",
  773. ret);
  774. goto out;
  775. }
  776. if ((ret & CYAPA_DEV_NORMAL) == CYAPA_DEV_NORMAL)
  777. break;
  778. } while (--tries);
  779. if (tries == 0) {
  780. dev_err(dev, "Device timed out going to Normal state.\n");
  781. ret = -ETIMEDOUT;
  782. goto out;
  783. }
  784. ret = cyapa_read_byte(cyapa, CYAPA_CMD_MAX_BASELINE);
  785. if (ret < 0) {
  786. dev_err(dev, "Failed to read max baseline. err = %d\n", ret);
  787. goto out;
  788. }
  789. max_baseline = ret;
  790. ret = cyapa_read_byte(cyapa, CYAPA_CMD_MIN_BASELINE);
  791. if (ret < 0) {
  792. dev_err(dev, "Failed to read min baseline. err = %d\n", ret);
  793. goto out;
  794. }
  795. min_baseline = ret;
  796. dev_dbg(dev, "Baseline report successful. Max: %d Min: %d\n",
  797. max_baseline, min_baseline);
  798. ret = scnprintf(buf, PAGE_SIZE, "%d %d\n", max_baseline, min_baseline);
  799. out:
  800. return ret;
  801. }
  802. /*
  803. * cyapa_get_wait_time_for_pwr_cmd
  804. *
  805. * Compute the amount of time we need to wait after updating the touchpad
  806. * power mode. The touchpad needs to consume the incoming power mode set
  807. * command at the current clock rate.
  808. */
  809. static u16 cyapa_get_wait_time_for_pwr_cmd(u8 pwr_mode)
  810. {
  811. switch (pwr_mode) {
  812. case PWR_MODE_FULL_ACTIVE: return 20;
  813. case PWR_MODE_BTN_ONLY: return 20;
  814. case PWR_MODE_OFF: return 20;
  815. default: return cyapa_pwr_cmd_to_sleep_time(pwr_mode) + 50;
  816. }
  817. }
  818. /*
  819. * Set device power mode
  820. *
  821. * Write to the field to configure power state. Power states include :
  822. * Full : Max scans and report rate.
  823. * Idle : Report rate set by user specified time.
  824. * ButtonOnly : No scans for fingers. When the button is triggered,
  825. * a slave interrupt is asserted to notify host to wake up.
  826. * Off : Only awake for i2c commands from host. No function for button
  827. * or touch sensors.
  828. *
  829. * The power_mode command should conform to the following :
  830. * Full : 0x3f
  831. * Idle : Configurable from 20 to 1000ms. See note below for
  832. * cyapa_sleep_time_to_pwr_cmd and cyapa_pwr_cmd_to_sleep_time
  833. * ButtonOnly : 0x01
  834. * Off : 0x00
  835. *
  836. * Device power mode can only be set when device is in operational mode.
  837. */
  838. static int cyapa_gen3_set_power_mode(struct cyapa *cyapa, u8 power_mode,
  839. u16 always_unused, enum cyapa_pm_stage pm_stage)
  840. {
  841. struct input_dev *input = cyapa->input;
  842. u8 power;
  843. int tries;
  844. int sleep_time;
  845. int interval;
  846. int ret;
  847. if (cyapa->state != CYAPA_STATE_OP)
  848. return 0;
  849. tries = SET_POWER_MODE_TRIES;
  850. while (tries--) {
  851. ret = cyapa_read_byte(cyapa, CYAPA_CMD_POWER_MODE);
  852. if (ret >= 0)
  853. break;
  854. usleep_range(SET_POWER_MODE_DELAY, 2 * SET_POWER_MODE_DELAY);
  855. }
  856. if (ret < 0)
  857. return ret;
  858. /*
  859. * Return early if the power mode to set is the same as the current
  860. * one.
  861. */
  862. if ((ret & PWR_MODE_MASK) == power_mode)
  863. return 0;
  864. sleep_time = (int)cyapa_get_wait_time_for_pwr_cmd(ret & PWR_MODE_MASK);
  865. power = ret;
  866. power &= ~PWR_MODE_MASK;
  867. power |= power_mode & PWR_MODE_MASK;
  868. tries = SET_POWER_MODE_TRIES;
  869. while (tries--) {
  870. ret = cyapa_write_byte(cyapa, CYAPA_CMD_POWER_MODE, power);
  871. if (!ret)
  872. break;
  873. usleep_range(SET_POWER_MODE_DELAY, 2 * SET_POWER_MODE_DELAY);
  874. }
  875. /*
  876. * Wait for the newly set power command to go in at the previous
  877. * clock speed (scanrate) used by the touchpad firmware. Not
  878. * doing so before issuing the next command may result in errors
  879. * depending on the command's content.
  880. */
  881. if (cyapa->operational && input && input->users &&
  882. (pm_stage == CYAPA_PM_RUNTIME_SUSPEND ||
  883. pm_stage == CYAPA_PM_RUNTIME_RESUME)) {
  884. /* Try to polling in 120Hz, read may fail, just ignore it. */
  885. interval = 1000 / 120;
  886. while (sleep_time > 0) {
  887. if (sleep_time > interval)
  888. msleep(interval);
  889. else
  890. msleep(sleep_time);
  891. sleep_time -= interval;
  892. cyapa_gen3_try_poll_handler(cyapa);
  893. }
  894. } else {
  895. msleep(sleep_time);
  896. }
  897. return ret;
  898. }
  899. static int cyapa_gen3_set_proximity(struct cyapa *cyapa, bool enable)
  900. {
  901. return -EOPNOTSUPP;
  902. }
  903. static int cyapa_gen3_get_query_data(struct cyapa *cyapa)
  904. {
  905. u8 query_data[QUERY_DATA_SIZE];
  906. int ret;
  907. if (cyapa->state != CYAPA_STATE_OP)
  908. return -EBUSY;
  909. ret = cyapa_read_block(cyapa, CYAPA_CMD_GROUP_QUERY, query_data);
  910. if (ret != QUERY_DATA_SIZE)
  911. return (ret < 0) ? ret : -EIO;
  912. memcpy(&cyapa->product_id[0], &query_data[0], 5);
  913. cyapa->product_id[5] = '-';
  914. memcpy(&cyapa->product_id[6], &query_data[5], 6);
  915. cyapa->product_id[12] = '-';
  916. memcpy(&cyapa->product_id[13], &query_data[11], 2);
  917. cyapa->product_id[15] = '\0';
  918. cyapa->fw_maj_ver = query_data[15];
  919. cyapa->fw_min_ver = query_data[16];
  920. cyapa->btn_capability = query_data[19] & CAPABILITY_BTN_MASK;
  921. cyapa->gen = query_data[20] & 0x0f;
  922. cyapa->max_abs_x = ((query_data[21] & 0xf0) << 4) | query_data[22];
  923. cyapa->max_abs_y = ((query_data[21] & 0x0f) << 8) | query_data[23];
  924. cyapa->physical_size_x =
  925. ((query_data[24] & 0xf0) << 4) | query_data[25];
  926. cyapa->physical_size_y =
  927. ((query_data[24] & 0x0f) << 8) | query_data[26];
  928. cyapa->max_z = 255;
  929. return 0;
  930. }
  931. static int cyapa_gen3_bl_query_data(struct cyapa *cyapa)
  932. {
  933. u8 bl_data[CYAPA_CMD_LEN];
  934. int ret;
  935. ret = cyapa_i2c_reg_read_block(cyapa, 0, CYAPA_CMD_LEN, bl_data);
  936. if (ret != CYAPA_CMD_LEN)
  937. return (ret < 0) ? ret : -EIO;
  938. /*
  939. * This value will be updated again when entered application mode.
  940. * If TP failed to enter application mode, this fw version values
  941. * can be used as a reference.
  942. * This firmware version valid when fw image checksum is valid.
  943. */
  944. if (bl_data[REG_BL_STATUS] ==
  945. (BL_STATUS_RUNNING | BL_STATUS_CSUM_VALID)) {
  946. cyapa->fw_maj_ver = bl_data[GEN3_BL_IDLE_FW_MAJ_VER_OFFSET];
  947. cyapa->fw_min_ver = bl_data[GEN3_BL_IDLE_FW_MIN_VER_OFFSET];
  948. }
  949. return 0;
  950. }
  951. /*
  952. * Check if device is operational.
  953. *
  954. * An operational device is responding, has exited bootloader, and has
  955. * firmware supported by this driver.
  956. *
  957. * Returns:
  958. * -EBUSY no device or in bootloader
  959. * -EIO failure while reading from device
  960. * -EAGAIN device is still in bootloader
  961. * if ->state = CYAPA_STATE_BL_IDLE, device has invalid firmware
  962. * -EINVAL device is in operational mode, but not supported by this driver
  963. * 0 device is supported
  964. */
  965. static int cyapa_gen3_do_operational_check(struct cyapa *cyapa)
  966. {
  967. struct device *dev = &cyapa->client->dev;
  968. int error;
  969. switch (cyapa->state) {
  970. case CYAPA_STATE_BL_ACTIVE:
  971. error = cyapa_gen3_bl_deactivate(cyapa);
  972. if (error) {
  973. dev_err(dev, "failed to bl_deactivate: %d\n", error);
  974. return error;
  975. }
  976. /* Fallthrough state */
  977. case CYAPA_STATE_BL_IDLE:
  978. /* Try to get firmware version in bootloader mode. */
  979. cyapa_gen3_bl_query_data(cyapa);
  980. error = cyapa_gen3_bl_exit(cyapa);
  981. if (error) {
  982. dev_err(dev, "failed to bl_exit: %d\n", error);
  983. return error;
  984. }
  985. /* Fallthrough state */
  986. case CYAPA_STATE_OP:
  987. /*
  988. * Reading query data before going back to the full mode
  989. * may cause problems, so we set the power mode first here.
  990. */
  991. error = cyapa_gen3_set_power_mode(cyapa,
  992. PWR_MODE_FULL_ACTIVE, 0, CYAPA_PM_ACTIVE);
  993. if (error)
  994. dev_err(dev, "%s: set full power mode failed: %d\n",
  995. __func__, error);
  996. error = cyapa_gen3_get_query_data(cyapa);
  997. if (error < 0)
  998. return error;
  999. /* Only support firmware protocol gen3 */
  1000. if (cyapa->gen != CYAPA_GEN3) {
  1001. dev_err(dev, "unsupported protocol version (%d)",
  1002. cyapa->gen);
  1003. return -EINVAL;
  1004. }
  1005. /* Only support product ID starting with CYTRA */
  1006. if (memcmp(cyapa->product_id, product_id,
  1007. strlen(product_id)) != 0) {
  1008. dev_err(dev, "unsupported product ID (%s)\n",
  1009. cyapa->product_id);
  1010. return -EINVAL;
  1011. }
  1012. return 0;
  1013. default:
  1014. return -EIO;
  1015. }
  1016. return 0;
  1017. }
  1018. /*
  1019. * Return false, do not continue process
  1020. * Return true, continue process.
  1021. */
  1022. static bool cyapa_gen3_irq_cmd_handler(struct cyapa *cyapa)
  1023. {
  1024. /* Not gen3 irq command response, skip for continue. */
  1025. if (cyapa->gen != CYAPA_GEN3)
  1026. return true;
  1027. if (cyapa->operational)
  1028. return true;
  1029. /*
  1030. * Driver in detecting or other interface function processing,
  1031. * so, stop cyapa_gen3_irq_handler to continue process to
  1032. * avoid unwanted to error detecting and processing.
  1033. *
  1034. * And also, avoid the periodically asserted interrupts to be processed
  1035. * as touch inputs when gen3 failed to launch into application mode,
  1036. * which will cause gen3 stays in bootloader mode.
  1037. */
  1038. return false;
  1039. }
  1040. static int cyapa_gen3_event_process(struct cyapa *cyapa,
  1041. struct cyapa_reg_data *data)
  1042. {
  1043. struct input_dev *input = cyapa->input;
  1044. int num_fingers;
  1045. int i;
  1046. num_fingers = (data->finger_btn >> 4) & 0x0f;
  1047. for (i = 0; i < num_fingers; i++) {
  1048. const struct cyapa_touch *touch = &data->touches[i];
  1049. /* Note: touch->id range is 1 to 15; slots are 0 to 14. */
  1050. int slot = touch->id - 1;
  1051. input_mt_slot(input, slot);
  1052. input_mt_report_slot_state(input, MT_TOOL_FINGER, true);
  1053. input_report_abs(input, ABS_MT_POSITION_X,
  1054. ((touch->xy_hi & 0xf0) << 4) | touch->x_lo);
  1055. input_report_abs(input, ABS_MT_POSITION_Y,
  1056. ((touch->xy_hi & 0x0f) << 8) | touch->y_lo);
  1057. input_report_abs(input, ABS_MT_PRESSURE, touch->pressure);
  1058. }
  1059. input_mt_sync_frame(input);
  1060. if (cyapa->btn_capability & CAPABILITY_LEFT_BTN_MASK)
  1061. input_report_key(input, BTN_LEFT,
  1062. !!(data->finger_btn & OP_DATA_LEFT_BTN));
  1063. if (cyapa->btn_capability & CAPABILITY_MIDDLE_BTN_MASK)
  1064. input_report_key(input, BTN_MIDDLE,
  1065. !!(data->finger_btn & OP_DATA_MIDDLE_BTN));
  1066. if (cyapa->btn_capability & CAPABILITY_RIGHT_BTN_MASK)
  1067. input_report_key(input, BTN_RIGHT,
  1068. !!(data->finger_btn & OP_DATA_RIGHT_BTN));
  1069. input_sync(input);
  1070. return 0;
  1071. }
  1072. static int cyapa_gen3_irq_handler(struct cyapa *cyapa)
  1073. {
  1074. struct device *dev = &cyapa->client->dev;
  1075. struct cyapa_reg_data data;
  1076. int ret;
  1077. ret = cyapa_read_block(cyapa, CYAPA_CMD_GROUP_DATA, (u8 *)&data);
  1078. if (ret != sizeof(data)) {
  1079. dev_err(dev, "failed to read report data, (%d)\n", ret);
  1080. return -EINVAL;
  1081. }
  1082. if ((data.device_status & OP_STATUS_SRC) != OP_STATUS_SRC ||
  1083. (data.device_status & OP_STATUS_DEV) != CYAPA_DEV_NORMAL ||
  1084. (data.finger_btn & OP_DATA_VALID) != OP_DATA_VALID) {
  1085. dev_err(dev, "invalid device state bytes: %02x %02x\n",
  1086. data.device_status, data.finger_btn);
  1087. return -EINVAL;
  1088. }
  1089. return cyapa_gen3_event_process(cyapa, &data);
  1090. }
  1091. /*
  1092. * This function will be called in the cyapa_gen3_set_power_mode function,
  1093. * and it's known that it may failed in some situation after the set power
  1094. * mode command was sent. So this function is aimed to avoid the knwon
  1095. * and unwanted output I2C and data parse error messages.
  1096. */
  1097. static int cyapa_gen3_try_poll_handler(struct cyapa *cyapa)
  1098. {
  1099. struct cyapa_reg_data data;
  1100. int ret;
  1101. ret = cyapa_read_block(cyapa, CYAPA_CMD_GROUP_DATA, (u8 *)&data);
  1102. if (ret != sizeof(data))
  1103. return -EINVAL;
  1104. if ((data.device_status & OP_STATUS_SRC) != OP_STATUS_SRC ||
  1105. (data.device_status & OP_STATUS_DEV) != CYAPA_DEV_NORMAL ||
  1106. (data.finger_btn & OP_DATA_VALID) != OP_DATA_VALID)
  1107. return -EINVAL;
  1108. return cyapa_gen3_event_process(cyapa, &data);
  1109. }
  1110. static int cyapa_gen3_initialize(struct cyapa *cyapa) { return 0; }
  1111. static int cyapa_gen3_bl_initiate(struct cyapa *cyapa,
  1112. const struct firmware *fw) { return 0; }
  1113. static int cyapa_gen3_empty_output_data(struct cyapa *cyapa,
  1114. u8 *buf, int *len, cb_sort func) { return 0; }
  1115. const struct cyapa_dev_ops cyapa_gen3_ops = {
  1116. .check_fw = cyapa_gen3_check_fw,
  1117. .bl_enter = cyapa_gen3_bl_enter,
  1118. .bl_activate = cyapa_gen3_bl_activate,
  1119. .update_fw = cyapa_gen3_do_fw_update,
  1120. .bl_deactivate = cyapa_gen3_bl_deactivate,
  1121. .bl_initiate = cyapa_gen3_bl_initiate,
  1122. .show_baseline = cyapa_gen3_show_baseline,
  1123. .calibrate_store = cyapa_gen3_do_calibrate,
  1124. .initialize = cyapa_gen3_initialize,
  1125. .state_parse = cyapa_gen3_state_parse,
  1126. .operational_check = cyapa_gen3_do_operational_check,
  1127. .irq_handler = cyapa_gen3_irq_handler,
  1128. .irq_cmd_handler = cyapa_gen3_irq_cmd_handler,
  1129. .sort_empty_output_data = cyapa_gen3_empty_output_data,
  1130. .set_power_mode = cyapa_gen3_set_power_mode,
  1131. .set_proximity = cyapa_gen3_set_proximity,
  1132. };