nes_utils.c 31 KB

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  1. /*
  2. * Copyright (c) 2006 - 2011 Intel Corporation. All rights reserved.
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and/or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. *
  32. */
  33. #include <linux/module.h>
  34. #include <linux/moduleparam.h>
  35. #include <linux/netdevice.h>
  36. #include <linux/etherdevice.h>
  37. #include <linux/ethtool.h>
  38. #include <linux/mii.h>
  39. #include <linux/if_vlan.h>
  40. #include <linux/slab.h>
  41. #include <linux/crc32.h>
  42. #include <linux/in.h>
  43. #include <linux/ip.h>
  44. #include <linux/tcp.h>
  45. #include <linux/init.h>
  46. #include <linux/kernel.h>
  47. #include <asm/io.h>
  48. #include <asm/irq.h>
  49. #include <asm/byteorder.h>
  50. #include "nes.h"
  51. static u16 nes_read16_eeprom(void __iomem *addr, u16 offset);
  52. u32 mh_detected;
  53. u32 mh_pauses_sent;
  54. static u32 nes_set_pau(struct nes_device *nesdev)
  55. {
  56. u32 ret = 0;
  57. u32 counter;
  58. nes_write_indexed(nesdev, NES_IDX_GPR2, NES_ENABLE_PAU);
  59. nes_write_indexed(nesdev, NES_IDX_GPR_TRIGGER, 1);
  60. for (counter = 0; counter < NES_PAU_COUNTER; counter++) {
  61. udelay(30);
  62. if (!nes_read_indexed(nesdev, NES_IDX_GPR2)) {
  63. printk(KERN_INFO PFX "PAU is supported.\n");
  64. break;
  65. }
  66. nes_write_indexed(nesdev, NES_IDX_GPR_TRIGGER, 1);
  67. }
  68. if (counter == NES_PAU_COUNTER) {
  69. printk(KERN_INFO PFX "PAU is not supported.\n");
  70. return -EPERM;
  71. }
  72. return ret;
  73. }
  74. /**
  75. * nes_read_eeprom_values -
  76. */
  77. int nes_read_eeprom_values(struct nes_device *nesdev, struct nes_adapter *nesadapter)
  78. {
  79. u32 mac_addr_low;
  80. u16 mac_addr_high;
  81. u16 eeprom_data;
  82. u16 eeprom_offset;
  83. u16 next_section_address;
  84. u16 sw_section_ver;
  85. u8 major_ver = 0;
  86. u8 minor_ver = 0;
  87. /* TODO: deal with EEPROM endian issues */
  88. if (nesadapter->firmware_eeprom_offset == 0) {
  89. /* Read the EEPROM Parameters */
  90. eeprom_data = nes_read16_eeprom(nesdev->regs, 0);
  91. nes_debug(NES_DBG_HW, "EEPROM Offset 0 = 0x%04X\n", eeprom_data);
  92. eeprom_offset = 2 + (((eeprom_data & 0x007f) << 3) <<
  93. ((eeprom_data & 0x0080) >> 7));
  94. nes_debug(NES_DBG_HW, "Firmware Offset = 0x%04X\n", eeprom_offset);
  95. nesadapter->firmware_eeprom_offset = eeprom_offset;
  96. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 4);
  97. if (eeprom_data != 0x5746) {
  98. nes_debug(NES_DBG_HW, "Not a valid Firmware Image = 0x%04X\n", eeprom_data);
  99. return -1;
  100. }
  101. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2);
  102. nes_debug(NES_DBG_HW, "EEPROM Offset %u = 0x%04X\n",
  103. eeprom_offset + 2, eeprom_data);
  104. eeprom_offset += ((eeprom_data & 0x00ff) << 3) << ((eeprom_data & 0x0100) >> 8);
  105. nes_debug(NES_DBG_HW, "Software Offset = 0x%04X\n", eeprom_offset);
  106. nesadapter->software_eeprom_offset = eeprom_offset;
  107. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 4);
  108. if (eeprom_data != 0x5753) {
  109. printk("Not a valid Software Image = 0x%04X\n", eeprom_data);
  110. return -1;
  111. }
  112. sw_section_ver = nes_read16_eeprom(nesdev->regs, nesadapter->software_eeprom_offset + 6);
  113. nes_debug(NES_DBG_HW, "Software section version number = 0x%04X\n",
  114. sw_section_ver);
  115. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2);
  116. nes_debug(NES_DBG_HW, "EEPROM Offset %u (next section) = 0x%04X\n",
  117. eeprom_offset + 2, eeprom_data);
  118. next_section_address = eeprom_offset + (((eeprom_data & 0x00ff) << 3) <<
  119. ((eeprom_data & 0x0100) >> 8));
  120. eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 4);
  121. if (eeprom_data != 0x414d) {
  122. nes_debug(NES_DBG_HW, "EEPROM Changed offset should be 0x414d but was 0x%04X\n",
  123. eeprom_data);
  124. goto no_fw_rev;
  125. }
  126. eeprom_offset = next_section_address;
  127. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2);
  128. nes_debug(NES_DBG_HW, "EEPROM Offset %u (next section) = 0x%04X\n",
  129. eeprom_offset + 2, eeprom_data);
  130. next_section_address = eeprom_offset + (((eeprom_data & 0x00ff) << 3) <<
  131. ((eeprom_data & 0x0100) >> 8));
  132. eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 4);
  133. if (eeprom_data != 0x4f52) {
  134. nes_debug(NES_DBG_HW, "EEPROM Changed offset should be 0x4f52 but was 0x%04X\n",
  135. eeprom_data);
  136. goto no_fw_rev;
  137. }
  138. eeprom_offset = next_section_address;
  139. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2);
  140. nes_debug(NES_DBG_HW, "EEPROM Offset %u (next section) = 0x%04X\n",
  141. eeprom_offset + 2, eeprom_data);
  142. next_section_address = eeprom_offset + ((eeprom_data & 0x00ff) << 3);
  143. eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 4);
  144. if (eeprom_data != 0x5746) {
  145. nes_debug(NES_DBG_HW, "EEPROM Changed offset should be 0x5746 but was 0x%04X\n",
  146. eeprom_data);
  147. goto no_fw_rev;
  148. }
  149. eeprom_offset = next_section_address;
  150. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2);
  151. nes_debug(NES_DBG_HW, "EEPROM Offset %u (next section) = 0x%04X\n",
  152. eeprom_offset + 2, eeprom_data);
  153. next_section_address = eeprom_offset + ((eeprom_data & 0x00ff) << 3);
  154. eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 4);
  155. if (eeprom_data != 0x5753) {
  156. nes_debug(NES_DBG_HW, "EEPROM Changed offset should be 0x5753 but was 0x%04X\n",
  157. eeprom_data);
  158. goto no_fw_rev;
  159. }
  160. eeprom_offset = next_section_address;
  161. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2);
  162. nes_debug(NES_DBG_HW, "EEPROM Offset %u (next section) = 0x%04X\n",
  163. eeprom_offset + 2, eeprom_data);
  164. next_section_address = eeprom_offset + ((eeprom_data & 0x00ff) << 3);
  165. eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 4);
  166. if (eeprom_data != 0x414d) {
  167. nes_debug(NES_DBG_HW, "EEPROM Changed offset should be 0x414d but was 0x%04X\n",
  168. eeprom_data);
  169. goto no_fw_rev;
  170. }
  171. eeprom_offset = next_section_address;
  172. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2);
  173. nes_debug(NES_DBG_HW, "EEPROM Offset %u (next section) = 0x%04X\n",
  174. eeprom_offset + 2, eeprom_data);
  175. next_section_address = eeprom_offset + ((eeprom_data & 0x00ff) << 3);
  176. eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 4);
  177. if (eeprom_data != 0x464e) {
  178. nes_debug(NES_DBG_HW, "EEPROM Changed offset should be 0x464e but was 0x%04X\n",
  179. eeprom_data);
  180. goto no_fw_rev;
  181. }
  182. eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 8);
  183. printk(PFX "Firmware version %u.%u\n", (u8)(eeprom_data>>8), (u8)eeprom_data);
  184. major_ver = (u8)(eeprom_data >> 8);
  185. minor_ver = (u8)(eeprom_data);
  186. if (nes_drv_opt & NES_DRV_OPT_DISABLE_VIRT_WQ) {
  187. nes_debug(NES_DBG_HW, "Virtual WQs have been disabled\n");
  188. } else if (((major_ver == 2) && (minor_ver > 21)) || ((major_ver > 2) && (major_ver != 255))) {
  189. nesadapter->virtwq = 1;
  190. }
  191. if (((major_ver == 3) && (minor_ver >= 16)) || (major_ver > 3))
  192. nesadapter->send_term_ok = 1;
  193. if (nes_drv_opt & NES_DRV_OPT_ENABLE_PAU) {
  194. if (!nes_set_pau(nesdev))
  195. nesadapter->allow_unaligned_fpdus = 1;
  196. }
  197. nesadapter->firmware_version = (((u32)(u8)(eeprom_data>>8)) << 16) +
  198. (u32)((u8)eeprom_data);
  199. eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 10);
  200. printk(PFX "EEPROM version %u.%u\n", (u8)(eeprom_data>>8), (u8)eeprom_data);
  201. nesadapter->eeprom_version = (((u32)(u8)(eeprom_data>>8)) << 16) +
  202. (u32)((u8)eeprom_data);
  203. no_fw_rev:
  204. /* eeprom is valid */
  205. eeprom_offset = nesadapter->software_eeprom_offset;
  206. eeprom_offset += 8;
  207. nesadapter->netdev_max = (u8)nes_read16_eeprom(nesdev->regs, eeprom_offset);
  208. eeprom_offset += 2;
  209. mac_addr_high = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  210. eeprom_offset += 2;
  211. mac_addr_low = (u32)nes_read16_eeprom(nesdev->regs, eeprom_offset);
  212. eeprom_offset += 2;
  213. mac_addr_low <<= 16;
  214. mac_addr_low += (u32)nes_read16_eeprom(nesdev->regs, eeprom_offset);
  215. nes_debug(NES_DBG_HW, "Base MAC Address = 0x%04X%08X\n",
  216. mac_addr_high, mac_addr_low);
  217. nes_debug(NES_DBG_HW, "MAC Address count = %u\n", nesadapter->netdev_max);
  218. nesadapter->mac_addr_low = mac_addr_low;
  219. nesadapter->mac_addr_high = mac_addr_high;
  220. /* Read the Phy Type array */
  221. eeprom_offset += 10;
  222. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  223. nesadapter->phy_type[0] = (u8)(eeprom_data >> 8);
  224. nesadapter->phy_type[1] = (u8)eeprom_data;
  225. /* Read the port array */
  226. eeprom_offset += 2;
  227. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  228. nesadapter->phy_type[2] = (u8)(eeprom_data >> 8);
  229. nesadapter->phy_type[3] = (u8)eeprom_data;
  230. /* port_count is set by soft reset reg */
  231. nes_debug(NES_DBG_HW, "port_count = %u, port 0 -> %u, port 1 -> %u,"
  232. " port 2 -> %u, port 3 -> %u\n",
  233. nesadapter->port_count,
  234. nesadapter->phy_type[0], nesadapter->phy_type[1],
  235. nesadapter->phy_type[2], nesadapter->phy_type[3]);
  236. /* Read PD config array */
  237. eeprom_offset += 10;
  238. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  239. nesadapter->pd_config_size[0] = eeprom_data;
  240. eeprom_offset += 2;
  241. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  242. nesadapter->pd_config_base[0] = eeprom_data;
  243. nes_debug(NES_DBG_HW, "PD0 config, size=0x%04x, base=0x%04x\n",
  244. nesadapter->pd_config_size[0], nesadapter->pd_config_base[0]);
  245. eeprom_offset += 2;
  246. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  247. nesadapter->pd_config_size[1] = eeprom_data;
  248. eeprom_offset += 2;
  249. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  250. nesadapter->pd_config_base[1] = eeprom_data;
  251. nes_debug(NES_DBG_HW, "PD1 config, size=0x%04x, base=0x%04x\n",
  252. nesadapter->pd_config_size[1], nesadapter->pd_config_base[1]);
  253. eeprom_offset += 2;
  254. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  255. nesadapter->pd_config_size[2] = eeprom_data;
  256. eeprom_offset += 2;
  257. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  258. nesadapter->pd_config_base[2] = eeprom_data;
  259. nes_debug(NES_DBG_HW, "PD2 config, size=0x%04x, base=0x%04x\n",
  260. nesadapter->pd_config_size[2], nesadapter->pd_config_base[2]);
  261. eeprom_offset += 2;
  262. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  263. nesadapter->pd_config_size[3] = eeprom_data;
  264. eeprom_offset += 2;
  265. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  266. nesadapter->pd_config_base[3] = eeprom_data;
  267. nes_debug(NES_DBG_HW, "PD3 config, size=0x%04x, base=0x%04x\n",
  268. nesadapter->pd_config_size[3], nesadapter->pd_config_base[3]);
  269. /* Read Rx Pool Size */
  270. eeprom_offset += 22; /* 46 */
  271. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  272. eeprom_offset += 2;
  273. nesadapter->rx_pool_size = (((u32)eeprom_data) << 16) +
  274. nes_read16_eeprom(nesdev->regs, eeprom_offset);
  275. nes_debug(NES_DBG_HW, "rx_pool_size = 0x%08X\n", nesadapter->rx_pool_size);
  276. eeprom_offset += 2;
  277. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  278. eeprom_offset += 2;
  279. nesadapter->tx_pool_size = (((u32)eeprom_data) << 16) +
  280. nes_read16_eeprom(nesdev->regs, eeprom_offset);
  281. nes_debug(NES_DBG_HW, "tx_pool_size = 0x%08X\n", nesadapter->tx_pool_size);
  282. eeprom_offset += 2;
  283. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  284. eeprom_offset += 2;
  285. nesadapter->rx_threshold = (((u32)eeprom_data) << 16) +
  286. nes_read16_eeprom(nesdev->regs, eeprom_offset);
  287. nes_debug(NES_DBG_HW, "rx_threshold = 0x%08X\n", nesadapter->rx_threshold);
  288. eeprom_offset += 2;
  289. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  290. eeprom_offset += 2;
  291. nesadapter->tcp_timer_core_clk_divisor = (((u32)eeprom_data) << 16) +
  292. nes_read16_eeprom(nesdev->regs, eeprom_offset);
  293. nes_debug(NES_DBG_HW, "tcp_timer_core_clk_divisor = 0x%08X\n",
  294. nesadapter->tcp_timer_core_clk_divisor);
  295. eeprom_offset += 2;
  296. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  297. eeprom_offset += 2;
  298. nesadapter->iwarp_config = (((u32)eeprom_data) << 16) +
  299. nes_read16_eeprom(nesdev->regs, eeprom_offset);
  300. nes_debug(NES_DBG_HW, "iwarp_config = 0x%08X\n", nesadapter->iwarp_config);
  301. eeprom_offset += 2;
  302. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  303. eeprom_offset += 2;
  304. nesadapter->cm_config = (((u32)eeprom_data) << 16) +
  305. nes_read16_eeprom(nesdev->regs, eeprom_offset);
  306. nes_debug(NES_DBG_HW, "cm_config = 0x%08X\n", nesadapter->cm_config);
  307. eeprom_offset += 2;
  308. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  309. eeprom_offset += 2;
  310. nesadapter->sws_timer_config = (((u32)eeprom_data) << 16) +
  311. nes_read16_eeprom(nesdev->regs, eeprom_offset);
  312. nes_debug(NES_DBG_HW, "sws_timer_config = 0x%08X\n", nesadapter->sws_timer_config);
  313. eeprom_offset += 2;
  314. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  315. eeprom_offset += 2;
  316. nesadapter->tcp_config1 = (((u32)eeprom_data) << 16) +
  317. nes_read16_eeprom(nesdev->regs, eeprom_offset);
  318. nes_debug(NES_DBG_HW, "tcp_config1 = 0x%08X\n", nesadapter->tcp_config1);
  319. eeprom_offset += 2;
  320. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  321. eeprom_offset += 2;
  322. nesadapter->wqm_wat = (((u32)eeprom_data) << 16) +
  323. nes_read16_eeprom(nesdev->regs, eeprom_offset);
  324. nes_debug(NES_DBG_HW, "wqm_wat = 0x%08X\n", nesadapter->wqm_wat);
  325. eeprom_offset += 2;
  326. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  327. eeprom_offset += 2;
  328. nesadapter->core_clock = (((u32)eeprom_data) << 16) +
  329. nes_read16_eeprom(nesdev->regs, eeprom_offset);
  330. nes_debug(NES_DBG_HW, "core_clock = 0x%08X\n", nesadapter->core_clock);
  331. if ((sw_section_ver) && (nesadapter->hw_rev != NE020_REV)) {
  332. eeprom_offset += 2;
  333. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  334. nesadapter->phy_index[0] = (eeprom_data & 0xff00)>>8;
  335. nesadapter->phy_index[1] = eeprom_data & 0x00ff;
  336. eeprom_offset += 2;
  337. eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset);
  338. nesadapter->phy_index[2] = (eeprom_data & 0xff00)>>8;
  339. nesadapter->phy_index[3] = eeprom_data & 0x00ff;
  340. } else {
  341. nesadapter->phy_index[0] = 4;
  342. nesadapter->phy_index[1] = 5;
  343. nesadapter->phy_index[2] = 6;
  344. nesadapter->phy_index[3] = 7;
  345. }
  346. nes_debug(NES_DBG_HW, "Phy address map = 0 > %u, 1 > %u, 2 > %u, 3 > %u\n",
  347. nesadapter->phy_index[0],nesadapter->phy_index[1],
  348. nesadapter->phy_index[2],nesadapter->phy_index[3]);
  349. }
  350. return 0;
  351. }
  352. /**
  353. * nes_read16_eeprom
  354. */
  355. static u16 nes_read16_eeprom(void __iomem *addr, u16 offset)
  356. {
  357. writel(NES_EEPROM_READ_REQUEST + (offset >> 1),
  358. (void __iomem *)addr + NES_EEPROM_COMMAND);
  359. do {
  360. } while (readl((void __iomem *)addr + NES_EEPROM_COMMAND) &
  361. NES_EEPROM_READ_REQUEST);
  362. return readw((void __iomem *)addr + NES_EEPROM_DATA);
  363. }
  364. /**
  365. * nes_write_1G_phy_reg
  366. */
  367. void nes_write_1G_phy_reg(struct nes_device *nesdev, u8 phy_reg, u8 phy_addr, u16 data)
  368. {
  369. u32 u32temp;
  370. u32 counter;
  371. nes_write_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL,
  372. 0x50020000 | data | ((u32)phy_reg << 18) | ((u32)phy_addr << 23));
  373. for (counter = 0; counter < 100 ; counter++) {
  374. udelay(30);
  375. u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS);
  376. if (u32temp & 1) {
  377. /* nes_debug(NES_DBG_PHY, "Phy interrupt status = 0x%X.\n", u32temp); */
  378. nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS, 1);
  379. break;
  380. }
  381. }
  382. if (!(u32temp & 1))
  383. nes_debug(NES_DBG_PHY, "Phy is not responding. interrupt status = 0x%X.\n",
  384. u32temp);
  385. }
  386. /**
  387. * nes_read_1G_phy_reg
  388. * This routine only issues the read, the data must be read
  389. * separately.
  390. */
  391. void nes_read_1G_phy_reg(struct nes_device *nesdev, u8 phy_reg, u8 phy_addr, u16 *data)
  392. {
  393. u32 u32temp;
  394. u32 counter;
  395. /* nes_debug(NES_DBG_PHY, "phy addr = %d, mac_index = %d\n",
  396. phy_addr, nesdev->mac_index); */
  397. nes_write_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL,
  398. 0x60020000 | ((u32)phy_reg << 18) | ((u32)phy_addr << 23));
  399. for (counter = 0; counter < 100 ; counter++) {
  400. udelay(30);
  401. u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS);
  402. if (u32temp & 1) {
  403. /* nes_debug(NES_DBG_PHY, "Phy interrupt status = 0x%X.\n", u32temp); */
  404. nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS, 1);
  405. break;
  406. }
  407. }
  408. if (!(u32temp & 1)) {
  409. nes_debug(NES_DBG_PHY, "Phy is not responding. interrupt status = 0x%X.\n",
  410. u32temp);
  411. *data = 0xffff;
  412. } else {
  413. *data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL);
  414. }
  415. }
  416. /**
  417. * nes_write_10G_phy_reg
  418. */
  419. void nes_write_10G_phy_reg(struct nes_device *nesdev, u16 phy_addr, u8 dev_addr, u16 phy_reg,
  420. u16 data)
  421. {
  422. u32 port_addr;
  423. u32 u32temp;
  424. u32 counter;
  425. port_addr = phy_addr;
  426. /* set address */
  427. nes_write_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL,
  428. 0x00020000 | (u32)phy_reg | (((u32)dev_addr) << 18) | (((u32)port_addr) << 23));
  429. for (counter = 0; counter < 100 ; counter++) {
  430. udelay(30);
  431. u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS);
  432. if (u32temp & 1) {
  433. nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS, 1);
  434. break;
  435. }
  436. }
  437. if (!(u32temp & 1))
  438. nes_debug(NES_DBG_PHY, "Phy is not responding. interrupt status = 0x%X.\n",
  439. u32temp);
  440. /* set data */
  441. nes_write_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL,
  442. 0x10020000 | (u32)data | (((u32)dev_addr) << 18) | (((u32)port_addr) << 23));
  443. for (counter = 0; counter < 100 ; counter++) {
  444. udelay(30);
  445. u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS);
  446. if (u32temp & 1) {
  447. nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS, 1);
  448. break;
  449. }
  450. }
  451. if (!(u32temp & 1))
  452. nes_debug(NES_DBG_PHY, "Phy is not responding. interrupt status = 0x%X.\n",
  453. u32temp);
  454. }
  455. /**
  456. * nes_read_10G_phy_reg
  457. * This routine only issues the read, the data must be read
  458. * separately.
  459. */
  460. void nes_read_10G_phy_reg(struct nes_device *nesdev, u8 phy_addr, u8 dev_addr, u16 phy_reg)
  461. {
  462. u32 port_addr;
  463. u32 u32temp;
  464. u32 counter;
  465. port_addr = phy_addr;
  466. /* set address */
  467. nes_write_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL,
  468. 0x00020000 | (u32)phy_reg | (((u32)dev_addr) << 18) | (((u32)port_addr) << 23));
  469. for (counter = 0; counter < 100 ; counter++) {
  470. udelay(30);
  471. u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS);
  472. if (u32temp & 1) {
  473. nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS, 1);
  474. break;
  475. }
  476. }
  477. if (!(u32temp & 1))
  478. nes_debug(NES_DBG_PHY, "Phy is not responding. interrupt status = 0x%X.\n",
  479. u32temp);
  480. /* issue read */
  481. nes_write_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL,
  482. 0x30020000 | (((u32)dev_addr) << 18) | (((u32)port_addr) << 23));
  483. for (counter = 0; counter < 100 ; counter++) {
  484. udelay(30);
  485. u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS);
  486. if (u32temp & 1) {
  487. nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS, 1);
  488. break;
  489. }
  490. }
  491. if (!(u32temp & 1))
  492. nes_debug(NES_DBG_PHY, "Phy is not responding. interrupt status = 0x%X.\n",
  493. u32temp);
  494. }
  495. /**
  496. * nes_get_cqp_request
  497. */
  498. struct nes_cqp_request *nes_get_cqp_request(struct nes_device *nesdev)
  499. {
  500. unsigned long flags;
  501. struct nes_cqp_request *cqp_request = NULL;
  502. if (!list_empty(&nesdev->cqp_avail_reqs)) {
  503. spin_lock_irqsave(&nesdev->cqp.lock, flags);
  504. if (!list_empty(&nesdev->cqp_avail_reqs)) {
  505. cqp_request = list_entry(nesdev->cqp_avail_reqs.next,
  506. struct nes_cqp_request, list);
  507. list_del_init(&cqp_request->list);
  508. }
  509. spin_unlock_irqrestore(&nesdev->cqp.lock, flags);
  510. }
  511. if (cqp_request == NULL) {
  512. cqp_request = kzalloc(sizeof(struct nes_cqp_request), GFP_ATOMIC);
  513. if (cqp_request) {
  514. cqp_request->dynamic = 1;
  515. INIT_LIST_HEAD(&cqp_request->list);
  516. }
  517. }
  518. if (cqp_request) {
  519. init_waitqueue_head(&cqp_request->waitq);
  520. cqp_request->waiting = 0;
  521. cqp_request->request_done = 0;
  522. cqp_request->callback = 0;
  523. init_waitqueue_head(&cqp_request->waitq);
  524. nes_debug(NES_DBG_CQP, "Got cqp request %p from the available list \n",
  525. cqp_request);
  526. } else
  527. printk(KERN_ERR PFX "%s: Could not allocated a CQP request.\n",
  528. __func__);
  529. return cqp_request;
  530. }
  531. void nes_free_cqp_request(struct nes_device *nesdev,
  532. struct nes_cqp_request *cqp_request)
  533. {
  534. unsigned long flags;
  535. nes_debug(NES_DBG_CQP, "CQP request %p (opcode 0x%02X) freed.\n",
  536. cqp_request,
  537. le32_to_cpu(cqp_request->cqp_wqe.wqe_words[NES_CQP_WQE_OPCODE_IDX]) & 0x3f);
  538. if (cqp_request->dynamic) {
  539. kfree(cqp_request);
  540. } else {
  541. spin_lock_irqsave(&nesdev->cqp.lock, flags);
  542. list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs);
  543. spin_unlock_irqrestore(&nesdev->cqp.lock, flags);
  544. }
  545. }
  546. void nes_put_cqp_request(struct nes_device *nesdev,
  547. struct nes_cqp_request *cqp_request)
  548. {
  549. if (atomic_dec_and_test(&cqp_request->refcount))
  550. nes_free_cqp_request(nesdev, cqp_request);
  551. }
  552. /**
  553. * nes_post_cqp_request
  554. */
  555. void nes_post_cqp_request(struct nes_device *nesdev,
  556. struct nes_cqp_request *cqp_request)
  557. {
  558. struct nes_hw_cqp_wqe *cqp_wqe;
  559. unsigned long flags;
  560. u32 cqp_head;
  561. u64 u64temp;
  562. u32 opcode;
  563. int ctx_index = NES_CQP_WQE_COMP_CTX_LOW_IDX;
  564. spin_lock_irqsave(&nesdev->cqp.lock, flags);
  565. if (((((nesdev->cqp.sq_tail+(nesdev->cqp.sq_size*2))-nesdev->cqp.sq_head) &
  566. (nesdev->cqp.sq_size - 1)) != 1)
  567. && (list_empty(&nesdev->cqp_pending_reqs))) {
  568. cqp_head = nesdev->cqp.sq_head++;
  569. nesdev->cqp.sq_head &= nesdev->cqp.sq_size-1;
  570. cqp_wqe = &nesdev->cqp.sq_vbase[cqp_head];
  571. memcpy(cqp_wqe, &cqp_request->cqp_wqe, sizeof(*cqp_wqe));
  572. opcode = le32_to_cpu(cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX]);
  573. if ((opcode & NES_CQP_OPCODE_MASK) == NES_CQP_DOWNLOAD_SEGMENT)
  574. ctx_index = NES_CQP_WQE_DL_COMP_CTX_LOW_IDX;
  575. barrier();
  576. u64temp = (unsigned long)cqp_request;
  577. set_wqe_64bit_value(cqp_wqe->wqe_words, ctx_index, u64temp);
  578. nes_debug(NES_DBG_CQP, "CQP request (opcode 0x%02X), line 1 = 0x%08X put on CQPs SQ,"
  579. " request = %p, cqp_head = %u, cqp_tail = %u, cqp_size = %u,"
  580. " waiting = %d, refcount = %d.\n",
  581. opcode & NES_CQP_OPCODE_MASK,
  582. le32_to_cpu(cqp_wqe->wqe_words[NES_CQP_WQE_ID_IDX]), cqp_request,
  583. nesdev->cqp.sq_head, nesdev->cqp.sq_tail, nesdev->cqp.sq_size,
  584. cqp_request->waiting, atomic_read(&cqp_request->refcount));
  585. barrier();
  586. /* Ring doorbell (1 WQEs) */
  587. nes_write32(nesdev->regs+NES_WQE_ALLOC, 0x01800000 | nesdev->cqp.qp_id);
  588. barrier();
  589. } else {
  590. nes_debug(NES_DBG_CQP, "CQP request %p (opcode 0x%02X), line 1 = 0x%08X"
  591. " put on the pending queue.\n",
  592. cqp_request,
  593. le32_to_cpu(cqp_request->cqp_wqe.wqe_words[NES_CQP_WQE_OPCODE_IDX])&0x3f,
  594. le32_to_cpu(cqp_request->cqp_wqe.wqe_words[NES_CQP_WQE_ID_IDX]));
  595. list_add_tail(&cqp_request->list, &nesdev->cqp_pending_reqs);
  596. }
  597. spin_unlock_irqrestore(&nesdev->cqp.lock, flags);
  598. return;
  599. }
  600. /**
  601. * nes_arp_table
  602. */
  603. int nes_arp_table(struct nes_device *nesdev, u32 ip_addr, u8 *mac_addr, u32 action)
  604. {
  605. struct nes_adapter *nesadapter = nesdev->nesadapter;
  606. int arp_index;
  607. int err = 0;
  608. __be32 tmp_addr;
  609. for (arp_index = 0; (u32) arp_index < nesadapter->arp_table_size; arp_index++) {
  610. if (nesadapter->arp_table[arp_index].ip_addr == ip_addr)
  611. break;
  612. }
  613. if (action == NES_ARP_ADD) {
  614. if (arp_index != nesadapter->arp_table_size) {
  615. return -1;
  616. }
  617. arp_index = 0;
  618. err = nes_alloc_resource(nesadapter, nesadapter->allocated_arps,
  619. nesadapter->arp_table_size, (u32 *)&arp_index, &nesadapter->next_arp_index, NES_RESOURCE_ARP);
  620. if (err) {
  621. nes_debug(NES_DBG_NETDEV, "nes_alloc_resource returned error = %u\n", err);
  622. return err;
  623. }
  624. nes_debug(NES_DBG_NETDEV, "ADD, arp_index=%d\n", arp_index);
  625. nesadapter->arp_table[arp_index].ip_addr = ip_addr;
  626. memcpy(nesadapter->arp_table[arp_index].mac_addr, mac_addr, ETH_ALEN);
  627. return arp_index;
  628. }
  629. /* DELETE or RESOLVE */
  630. if (arp_index == nesadapter->arp_table_size) {
  631. tmp_addr = cpu_to_be32(ip_addr);
  632. nes_debug(NES_DBG_NETDEV, "MAC for %pI4 not in ARP table - cannot %s\n",
  633. &tmp_addr, action == NES_ARP_RESOLVE ? "resolve" : "delete");
  634. return -1;
  635. }
  636. if (action == NES_ARP_RESOLVE) {
  637. nes_debug(NES_DBG_NETDEV, "RESOLVE, arp_index=%d\n", arp_index);
  638. return arp_index;
  639. }
  640. if (action == NES_ARP_DELETE) {
  641. nes_debug(NES_DBG_NETDEV, "DELETE, arp_index=%d\n", arp_index);
  642. nesadapter->arp_table[arp_index].ip_addr = 0;
  643. eth_zero_addr(nesadapter->arp_table[arp_index].mac_addr);
  644. nes_free_resource(nesadapter, nesadapter->allocated_arps, arp_index);
  645. return arp_index;
  646. }
  647. return -1;
  648. }
  649. /**
  650. * nes_mh_fix
  651. */
  652. void nes_mh_fix(unsigned long parm)
  653. {
  654. unsigned long flags;
  655. struct nes_device *nesdev = (struct nes_device *)parm;
  656. struct nes_adapter *nesadapter = nesdev->nesadapter;
  657. struct nes_vnic *nesvnic;
  658. u32 used_chunks_tx;
  659. u32 temp_used_chunks_tx;
  660. u32 temp_last_used_chunks_tx;
  661. u32 used_chunks_mask;
  662. u32 mac_tx_frames_low;
  663. u32 mac_tx_frames_high;
  664. u32 mac_tx_pauses;
  665. u32 serdes_status;
  666. u32 reset_value;
  667. u32 tx_control;
  668. u32 tx_config;
  669. u32 tx_pause_quanta;
  670. u32 rx_control;
  671. u32 rx_config;
  672. u32 mac_exact_match;
  673. u32 mpp_debug;
  674. u32 i=0;
  675. u32 chunks_tx_progress = 0;
  676. spin_lock_irqsave(&nesadapter->phy_lock, flags);
  677. if ((nesadapter->mac_sw_state[0] != NES_MAC_SW_IDLE) || (nesadapter->mac_link_down[0])) {
  678. spin_unlock_irqrestore(&nesadapter->phy_lock, flags);
  679. goto no_mh_work;
  680. }
  681. nesadapter->mac_sw_state[0] = NES_MAC_SW_MH;
  682. spin_unlock_irqrestore(&nesadapter->phy_lock, flags);
  683. do {
  684. mac_tx_frames_low = nes_read_indexed(nesdev, NES_IDX_MAC_TX_FRAMES_LOW);
  685. mac_tx_frames_high = nes_read_indexed(nesdev, NES_IDX_MAC_TX_FRAMES_HIGH);
  686. mac_tx_pauses = nes_read_indexed(nesdev, NES_IDX_MAC_TX_PAUSE_FRAMES);
  687. used_chunks_tx = nes_read_indexed(nesdev, NES_IDX_USED_CHUNKS_TX);
  688. nesdev->mac_pause_frames_sent += mac_tx_pauses;
  689. used_chunks_mask = 0;
  690. temp_used_chunks_tx = used_chunks_tx;
  691. temp_last_used_chunks_tx = nesdev->last_used_chunks_tx;
  692. if (nesdev->netdev[0]) {
  693. nesvnic = netdev_priv(nesdev->netdev[0]);
  694. } else {
  695. break;
  696. }
  697. for (i=0; i<4; i++) {
  698. used_chunks_mask <<= 8;
  699. if (nesvnic->qp_nic_index[i] != 0xff) {
  700. used_chunks_mask |= 0xff;
  701. if ((temp_used_chunks_tx&0xff)<(temp_last_used_chunks_tx&0xff)) {
  702. chunks_tx_progress = 1;
  703. }
  704. }
  705. temp_used_chunks_tx >>= 8;
  706. temp_last_used_chunks_tx >>= 8;
  707. }
  708. if ((mac_tx_frames_low) || (mac_tx_frames_high) ||
  709. (!(used_chunks_tx&used_chunks_mask)) ||
  710. (!(nesdev->last_used_chunks_tx&used_chunks_mask)) ||
  711. (chunks_tx_progress) ) {
  712. nesdev->last_used_chunks_tx = used_chunks_tx;
  713. break;
  714. }
  715. nesdev->last_used_chunks_tx = used_chunks_tx;
  716. barrier();
  717. nes_write_indexed(nesdev, NES_IDX_MAC_TX_CONTROL, 0x00000005);
  718. mh_pauses_sent++;
  719. mac_tx_pauses = nes_read_indexed(nesdev, NES_IDX_MAC_TX_PAUSE_FRAMES);
  720. if (mac_tx_pauses) {
  721. nesdev->mac_pause_frames_sent += mac_tx_pauses;
  722. break;
  723. }
  724. tx_control = nes_read_indexed(nesdev, NES_IDX_MAC_TX_CONTROL);
  725. tx_config = nes_read_indexed(nesdev, NES_IDX_MAC_TX_CONFIG);
  726. tx_pause_quanta = nes_read_indexed(nesdev, NES_IDX_MAC_TX_PAUSE_QUANTA);
  727. rx_control = nes_read_indexed(nesdev, NES_IDX_MAC_RX_CONTROL);
  728. rx_config = nes_read_indexed(nesdev, NES_IDX_MAC_RX_CONFIG);
  729. mac_exact_match = nes_read_indexed(nesdev, NES_IDX_MAC_EXACT_MATCH_BOTTOM);
  730. mpp_debug = nes_read_indexed(nesdev, NES_IDX_MPP_DEBUG);
  731. /* one last ditch effort to avoid a false positive */
  732. mac_tx_pauses = nes_read_indexed(nesdev, NES_IDX_MAC_TX_PAUSE_FRAMES);
  733. if (mac_tx_pauses) {
  734. nesdev->last_mac_tx_pauses = nesdev->mac_pause_frames_sent;
  735. nes_debug(NES_DBG_HW, "failsafe caught slow outbound pause\n");
  736. break;
  737. }
  738. mh_detected++;
  739. nes_write_indexed(nesdev, NES_IDX_MAC_TX_CONTROL, 0x00000000);
  740. nes_write_indexed(nesdev, NES_IDX_MAC_TX_CONFIG, 0x00000000);
  741. reset_value = nes_read32(nesdev->regs+NES_SOFTWARE_RESET);
  742. nes_write32(nesdev->regs+NES_SOFTWARE_RESET, reset_value | 0x0000001d);
  743. while (((nes_read32(nesdev->regs+NES_SOFTWARE_RESET)
  744. & 0x00000040) != 0x00000040) && (i++ < 5000)) {
  745. /* mdelay(1); */
  746. }
  747. nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_CONTROL0, 0x00000008);
  748. serdes_status = nes_read_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_STATUS0);
  749. nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_TX_EMP0, 0x000bdef7);
  750. nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_TX_DRIVE0, 0x9ce73000);
  751. nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_RX_MODE0, 0x0ff00000);
  752. nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_RX_SIGDET0, 0x00000000);
  753. nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_BYPASS0, 0x00000000);
  754. nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_LOOPBACK_CONTROL0, 0x00000000);
  755. if (nesadapter->OneG_Mode) {
  756. nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_RX_EQ_CONTROL0, 0xf0182222);
  757. } else {
  758. nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_RX_EQ_CONTROL0, 0xf0042222);
  759. }
  760. serdes_status = nes_read_indexed(nesdev, NES_IDX_ETH_SERDES_RX_EQ_STATUS0);
  761. nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_CDR_CONTROL0, 0x000000ff);
  762. nes_write_indexed(nesdev, NES_IDX_MAC_TX_CONTROL, tx_control);
  763. nes_write_indexed(nesdev, NES_IDX_MAC_TX_CONFIG, tx_config);
  764. nes_write_indexed(nesdev, NES_IDX_MAC_TX_PAUSE_QUANTA, tx_pause_quanta);
  765. nes_write_indexed(nesdev, NES_IDX_MAC_RX_CONTROL, rx_control);
  766. nes_write_indexed(nesdev, NES_IDX_MAC_RX_CONFIG, rx_config);
  767. nes_write_indexed(nesdev, NES_IDX_MAC_EXACT_MATCH_BOTTOM, mac_exact_match);
  768. nes_write_indexed(nesdev, NES_IDX_MPP_DEBUG, mpp_debug);
  769. } while (0);
  770. nesadapter->mac_sw_state[0] = NES_MAC_SW_IDLE;
  771. no_mh_work:
  772. nesdev->nesadapter->mh_timer.expires = jiffies + (HZ/5);
  773. add_timer(&nesdev->nesadapter->mh_timer);
  774. }
  775. /**
  776. * nes_clc
  777. */
  778. void nes_clc(unsigned long parm)
  779. {
  780. unsigned long flags;
  781. struct nes_device *nesdev = (struct nes_device *)parm;
  782. struct nes_adapter *nesadapter = nesdev->nesadapter;
  783. spin_lock_irqsave(&nesadapter->phy_lock, flags);
  784. nesadapter->link_interrupt_count[0] = 0;
  785. nesadapter->link_interrupt_count[1] = 0;
  786. nesadapter->link_interrupt_count[2] = 0;
  787. nesadapter->link_interrupt_count[3] = 0;
  788. spin_unlock_irqrestore(&nesadapter->phy_lock, flags);
  789. nesadapter->lc_timer.expires = jiffies + 3600 * HZ; /* 1 hour */
  790. add_timer(&nesadapter->lc_timer);
  791. }
  792. /**
  793. * nes_dump_mem
  794. */
  795. void nes_dump_mem(unsigned int dump_debug_level, void *addr, int length)
  796. {
  797. if (!(nes_debug_level & dump_debug_level)) {
  798. return;
  799. }
  800. if (length > 0x100) {
  801. nes_debug(dump_debug_level, "Length truncated from %x to %x\n", length, 0x100);
  802. length = 0x100;
  803. }
  804. nes_debug(dump_debug_level, "Address=0x%p, length=0x%x (%d)\n", addr, length, length);
  805. print_hex_dump(KERN_ERR, PFX, DUMP_PREFIX_NONE, 16, 1, addr, length, true);
  806. }