mlx4_ib.h 24 KB

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  1. /*
  2. * Copyright (c) 2006, 2007 Cisco Systems. All rights reserved.
  3. * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenIB.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. */
  33. #ifndef MLX4_IB_H
  34. #define MLX4_IB_H
  35. #include <linux/compiler.h>
  36. #include <linux/list.h>
  37. #include <linux/mutex.h>
  38. #include <linux/idr.h>
  39. #include <rdma/ib_verbs.h>
  40. #include <rdma/ib_umem.h>
  41. #include <rdma/ib_mad.h>
  42. #include <rdma/ib_sa.h>
  43. #include <linux/mlx4/device.h>
  44. #include <linux/mlx4/doorbell.h>
  45. #define MLX4_IB_DRV_NAME "mlx4_ib"
  46. #ifdef pr_fmt
  47. #undef pr_fmt
  48. #endif
  49. #define pr_fmt(fmt) "<" MLX4_IB_DRV_NAME "> %s: " fmt, __func__
  50. #define mlx4_ib_warn(ibdev, format, arg...) \
  51. dev_warn((ibdev)->dma_device, MLX4_IB_DRV_NAME ": " format, ## arg)
  52. enum {
  53. MLX4_IB_SQ_MIN_WQE_SHIFT = 6,
  54. MLX4_IB_MAX_HEADROOM = 2048
  55. };
  56. #define MLX4_IB_SQ_HEADROOM(shift) ((MLX4_IB_MAX_HEADROOM >> (shift)) + 1)
  57. #define MLX4_IB_SQ_MAX_SPARE (MLX4_IB_SQ_HEADROOM(MLX4_IB_SQ_MIN_WQE_SHIFT))
  58. /*module param to indicate if SM assigns the alias_GUID*/
  59. extern int mlx4_ib_sm_guid_assign;
  60. #define MLX4_IB_UC_STEER_QPN_ALIGN 1
  61. #define MLX4_IB_UC_MAX_NUM_QPS 256
  62. enum hw_bar_type {
  63. HW_BAR_BF,
  64. HW_BAR_DB,
  65. HW_BAR_CLOCK,
  66. HW_BAR_COUNT
  67. };
  68. struct mlx4_ib_vma_private_data {
  69. struct vm_area_struct *vma;
  70. };
  71. struct mlx4_ib_ucontext {
  72. struct ib_ucontext ibucontext;
  73. struct mlx4_uar uar;
  74. struct list_head db_page_list;
  75. struct mutex db_page_mutex;
  76. struct mlx4_ib_vma_private_data hw_bar_info[HW_BAR_COUNT];
  77. };
  78. struct mlx4_ib_pd {
  79. struct ib_pd ibpd;
  80. u32 pdn;
  81. };
  82. struct mlx4_ib_xrcd {
  83. struct ib_xrcd ibxrcd;
  84. u32 xrcdn;
  85. struct ib_pd *pd;
  86. struct ib_cq *cq;
  87. };
  88. struct mlx4_ib_cq_buf {
  89. struct mlx4_buf buf;
  90. struct mlx4_mtt mtt;
  91. int entry_size;
  92. };
  93. struct mlx4_ib_cq_resize {
  94. struct mlx4_ib_cq_buf buf;
  95. int cqe;
  96. };
  97. struct mlx4_ib_cq {
  98. struct ib_cq ibcq;
  99. struct mlx4_cq mcq;
  100. struct mlx4_ib_cq_buf buf;
  101. struct mlx4_ib_cq_resize *resize_buf;
  102. struct mlx4_db db;
  103. spinlock_t lock;
  104. struct mutex resize_mutex;
  105. struct ib_umem *umem;
  106. struct ib_umem *resize_umem;
  107. int create_flags;
  108. /* List of qps that it serves.*/
  109. struct list_head send_qp_list;
  110. struct list_head recv_qp_list;
  111. };
  112. #define MLX4_MR_PAGES_ALIGN 0x40
  113. struct mlx4_ib_mr {
  114. struct ib_mr ibmr;
  115. __be64 *pages;
  116. dma_addr_t page_map;
  117. u32 npages;
  118. u32 max_pages;
  119. struct mlx4_mr mmr;
  120. struct ib_umem *umem;
  121. size_t page_map_size;
  122. };
  123. struct mlx4_ib_mw {
  124. struct ib_mw ibmw;
  125. struct mlx4_mw mmw;
  126. };
  127. struct mlx4_ib_fmr {
  128. struct ib_fmr ibfmr;
  129. struct mlx4_fmr mfmr;
  130. };
  131. #define MAX_REGS_PER_FLOW 2
  132. struct mlx4_flow_reg_id {
  133. u64 id;
  134. u64 mirror;
  135. };
  136. struct mlx4_ib_flow {
  137. struct ib_flow ibflow;
  138. /* translating DMFS verbs sniffer rule to FW API requires two reg IDs */
  139. struct mlx4_flow_reg_id reg_id[MAX_REGS_PER_FLOW];
  140. };
  141. struct mlx4_ib_wq {
  142. u64 *wrid;
  143. spinlock_t lock;
  144. int wqe_cnt;
  145. int max_post;
  146. int max_gs;
  147. int offset;
  148. int wqe_shift;
  149. unsigned head;
  150. unsigned tail;
  151. };
  152. enum {
  153. MLX4_IB_QP_CREATE_ROCE_V2_GSI = IB_QP_CREATE_RESERVED_START
  154. };
  155. enum mlx4_ib_qp_flags {
  156. MLX4_IB_QP_LSO = IB_QP_CREATE_IPOIB_UD_LSO,
  157. MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK = IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK,
  158. MLX4_IB_QP_NETIF = IB_QP_CREATE_NETIF_QP,
  159. MLX4_IB_QP_CREATE_USE_GFP_NOIO = IB_QP_CREATE_USE_GFP_NOIO,
  160. /* Mellanox specific flags start from IB_QP_CREATE_RESERVED_START */
  161. MLX4_IB_ROCE_V2_GSI_QP = MLX4_IB_QP_CREATE_ROCE_V2_GSI,
  162. MLX4_IB_SRIOV_TUNNEL_QP = 1 << 30,
  163. MLX4_IB_SRIOV_SQP = 1 << 31,
  164. };
  165. struct mlx4_ib_gid_entry {
  166. struct list_head list;
  167. union ib_gid gid;
  168. int added;
  169. u8 port;
  170. };
  171. enum mlx4_ib_qp_type {
  172. /*
  173. * IB_QPT_SMI and IB_QPT_GSI have to be the first two entries
  174. * here (and in that order) since the MAD layer uses them as
  175. * indices into a 2-entry table.
  176. */
  177. MLX4_IB_QPT_SMI = IB_QPT_SMI,
  178. MLX4_IB_QPT_GSI = IB_QPT_GSI,
  179. MLX4_IB_QPT_RC = IB_QPT_RC,
  180. MLX4_IB_QPT_UC = IB_QPT_UC,
  181. MLX4_IB_QPT_UD = IB_QPT_UD,
  182. MLX4_IB_QPT_RAW_IPV6 = IB_QPT_RAW_IPV6,
  183. MLX4_IB_QPT_RAW_ETHERTYPE = IB_QPT_RAW_ETHERTYPE,
  184. MLX4_IB_QPT_RAW_PACKET = IB_QPT_RAW_PACKET,
  185. MLX4_IB_QPT_XRC_INI = IB_QPT_XRC_INI,
  186. MLX4_IB_QPT_XRC_TGT = IB_QPT_XRC_TGT,
  187. MLX4_IB_QPT_PROXY_SMI_OWNER = 1 << 16,
  188. MLX4_IB_QPT_PROXY_SMI = 1 << 17,
  189. MLX4_IB_QPT_PROXY_GSI = 1 << 18,
  190. MLX4_IB_QPT_TUN_SMI_OWNER = 1 << 19,
  191. MLX4_IB_QPT_TUN_SMI = 1 << 20,
  192. MLX4_IB_QPT_TUN_GSI = 1 << 21,
  193. };
  194. #define MLX4_IB_QPT_ANY_SRIOV (MLX4_IB_QPT_PROXY_SMI_OWNER | \
  195. MLX4_IB_QPT_PROXY_SMI | MLX4_IB_QPT_PROXY_GSI | MLX4_IB_QPT_TUN_SMI_OWNER | \
  196. MLX4_IB_QPT_TUN_SMI | MLX4_IB_QPT_TUN_GSI)
  197. enum mlx4_ib_mad_ifc_flags {
  198. MLX4_MAD_IFC_IGNORE_MKEY = 1,
  199. MLX4_MAD_IFC_IGNORE_BKEY = 2,
  200. MLX4_MAD_IFC_IGNORE_KEYS = (MLX4_MAD_IFC_IGNORE_MKEY |
  201. MLX4_MAD_IFC_IGNORE_BKEY),
  202. MLX4_MAD_IFC_NET_VIEW = 4,
  203. };
  204. enum {
  205. MLX4_NUM_TUNNEL_BUFS = 256,
  206. };
  207. struct mlx4_ib_tunnel_header {
  208. struct mlx4_av av;
  209. __be32 remote_qpn;
  210. __be32 qkey;
  211. __be16 vlan;
  212. u8 mac[6];
  213. __be16 pkey_index;
  214. u8 reserved[6];
  215. };
  216. struct mlx4_ib_buf {
  217. void *addr;
  218. dma_addr_t map;
  219. };
  220. struct mlx4_rcv_tunnel_hdr {
  221. __be32 flags_src_qp; /* flags[6:5] is defined for VLANs:
  222. * 0x0 - no vlan was in the packet
  223. * 0x01 - C-VLAN was in the packet */
  224. u8 g_ml_path; /* gid bit stands for ipv6/4 header in RoCE */
  225. u8 reserved;
  226. __be16 pkey_index;
  227. __be16 sl_vid;
  228. __be16 slid_mac_47_32;
  229. __be32 mac_31_0;
  230. };
  231. struct mlx4_ib_proxy_sqp_hdr {
  232. struct ib_grh grh;
  233. struct mlx4_rcv_tunnel_hdr tun;
  234. } __packed;
  235. struct mlx4_roce_smac_vlan_info {
  236. u64 smac;
  237. int smac_index;
  238. int smac_port;
  239. u64 candidate_smac;
  240. int candidate_smac_index;
  241. int candidate_smac_port;
  242. u16 vid;
  243. int vlan_index;
  244. int vlan_port;
  245. u16 candidate_vid;
  246. int candidate_vlan_index;
  247. int candidate_vlan_port;
  248. int update_vid;
  249. };
  250. struct mlx4_ib_qp {
  251. struct ib_qp ibqp;
  252. struct mlx4_qp mqp;
  253. struct mlx4_buf buf;
  254. struct mlx4_db db;
  255. struct mlx4_ib_wq rq;
  256. u32 doorbell_qpn;
  257. __be32 sq_signal_bits;
  258. unsigned sq_next_wqe;
  259. int sq_max_wqes_per_wr;
  260. int sq_spare_wqes;
  261. struct mlx4_ib_wq sq;
  262. enum mlx4_ib_qp_type mlx4_ib_qp_type;
  263. struct ib_umem *umem;
  264. struct mlx4_mtt mtt;
  265. int buf_size;
  266. struct mutex mutex;
  267. u16 xrcdn;
  268. u32 flags;
  269. u8 port;
  270. u8 alt_port;
  271. u8 atomic_rd_en;
  272. u8 resp_depth;
  273. u8 sq_no_prefetch;
  274. u8 state;
  275. int mlx_type;
  276. struct list_head gid_list;
  277. struct list_head steering_rules;
  278. struct mlx4_ib_buf *sqp_proxy_rcv;
  279. struct mlx4_roce_smac_vlan_info pri;
  280. struct mlx4_roce_smac_vlan_info alt;
  281. u64 reg_id;
  282. struct list_head qps_list;
  283. struct list_head cq_recv_list;
  284. struct list_head cq_send_list;
  285. struct counter_index *counter_index;
  286. };
  287. struct mlx4_ib_srq {
  288. struct ib_srq ibsrq;
  289. struct mlx4_srq msrq;
  290. struct mlx4_buf buf;
  291. struct mlx4_db db;
  292. u64 *wrid;
  293. spinlock_t lock;
  294. int head;
  295. int tail;
  296. u16 wqe_ctr;
  297. struct ib_umem *umem;
  298. struct mlx4_mtt mtt;
  299. struct mutex mutex;
  300. };
  301. struct mlx4_ib_ah {
  302. struct ib_ah ibah;
  303. union mlx4_ext_av av;
  304. };
  305. /****************************************/
  306. /* alias guid support */
  307. /****************************************/
  308. #define NUM_PORT_ALIAS_GUID 2
  309. #define NUM_ALIAS_GUID_IN_REC 8
  310. #define NUM_ALIAS_GUID_REC_IN_PORT 16
  311. #define GUID_REC_SIZE 8
  312. #define NUM_ALIAS_GUID_PER_PORT 128
  313. #define MLX4_NOT_SET_GUID (0x00LL)
  314. #define MLX4_GUID_FOR_DELETE_VAL (~(0x00LL))
  315. enum mlx4_guid_alias_rec_status {
  316. MLX4_GUID_INFO_STATUS_IDLE,
  317. MLX4_GUID_INFO_STATUS_SET,
  318. };
  319. #define GUID_STATE_NEED_PORT_INIT 0x01
  320. enum mlx4_guid_alias_rec_method {
  321. MLX4_GUID_INFO_RECORD_SET = IB_MGMT_METHOD_SET,
  322. MLX4_GUID_INFO_RECORD_DELETE = IB_SA_METHOD_DELETE,
  323. };
  324. struct mlx4_sriov_alias_guid_info_rec_det {
  325. u8 all_recs[GUID_REC_SIZE * NUM_ALIAS_GUID_IN_REC];
  326. ib_sa_comp_mask guid_indexes; /*indicates what from the 8 records are valid*/
  327. enum mlx4_guid_alias_rec_status status; /*indicates the administraively status of the record.*/
  328. unsigned int guids_retry_schedule[NUM_ALIAS_GUID_IN_REC];
  329. u64 time_to_run;
  330. };
  331. struct mlx4_sriov_alias_guid_port_rec_det {
  332. struct mlx4_sriov_alias_guid_info_rec_det all_rec_per_port[NUM_ALIAS_GUID_REC_IN_PORT];
  333. struct workqueue_struct *wq;
  334. struct delayed_work alias_guid_work;
  335. u8 port;
  336. u32 state_flags;
  337. struct mlx4_sriov_alias_guid *parent;
  338. struct list_head cb_list;
  339. };
  340. struct mlx4_sriov_alias_guid {
  341. struct mlx4_sriov_alias_guid_port_rec_det ports_guid[MLX4_MAX_PORTS];
  342. spinlock_t ag_work_lock;
  343. struct ib_sa_client *sa_client;
  344. };
  345. struct mlx4_ib_demux_work {
  346. struct work_struct work;
  347. struct mlx4_ib_dev *dev;
  348. int slave;
  349. int do_init;
  350. u8 port;
  351. };
  352. struct mlx4_ib_tun_tx_buf {
  353. struct mlx4_ib_buf buf;
  354. struct ib_ah *ah;
  355. };
  356. struct mlx4_ib_demux_pv_qp {
  357. struct ib_qp *qp;
  358. enum ib_qp_type proxy_qpt;
  359. struct mlx4_ib_buf *ring;
  360. struct mlx4_ib_tun_tx_buf *tx_ring;
  361. spinlock_t tx_lock;
  362. unsigned tx_ix_head;
  363. unsigned tx_ix_tail;
  364. };
  365. enum mlx4_ib_demux_pv_state {
  366. DEMUX_PV_STATE_DOWN,
  367. DEMUX_PV_STATE_STARTING,
  368. DEMUX_PV_STATE_ACTIVE,
  369. DEMUX_PV_STATE_DOWNING,
  370. };
  371. struct mlx4_ib_demux_pv_ctx {
  372. int port;
  373. int slave;
  374. enum mlx4_ib_demux_pv_state state;
  375. int has_smi;
  376. struct ib_device *ib_dev;
  377. struct ib_cq *cq;
  378. struct ib_pd *pd;
  379. struct work_struct work;
  380. struct workqueue_struct *wq;
  381. struct mlx4_ib_demux_pv_qp qp[2];
  382. };
  383. struct mlx4_ib_demux_ctx {
  384. struct ib_device *ib_dev;
  385. int port;
  386. struct workqueue_struct *wq;
  387. struct workqueue_struct *ud_wq;
  388. spinlock_t ud_lock;
  389. atomic64_t subnet_prefix;
  390. __be64 guid_cache[128];
  391. struct mlx4_ib_dev *dev;
  392. /* the following lock protects both mcg_table and mcg_mgid0_list */
  393. struct mutex mcg_table_lock;
  394. struct rb_root mcg_table;
  395. struct list_head mcg_mgid0_list;
  396. struct workqueue_struct *mcg_wq;
  397. struct mlx4_ib_demux_pv_ctx **tun;
  398. atomic_t tid;
  399. int flushing; /* flushing the work queue */
  400. };
  401. struct mlx4_ib_sriov {
  402. struct mlx4_ib_demux_ctx demux[MLX4_MAX_PORTS];
  403. struct mlx4_ib_demux_pv_ctx *sqps[MLX4_MAX_PORTS];
  404. /* when using this spinlock you should use "irq" because
  405. * it may be called from interrupt context.*/
  406. spinlock_t going_down_lock;
  407. int is_going_down;
  408. struct mlx4_sriov_alias_guid alias_guid;
  409. /* CM paravirtualization fields */
  410. struct list_head cm_list;
  411. spinlock_t id_map_lock;
  412. struct rb_root sl_id_map;
  413. struct idr pv_id_table;
  414. };
  415. struct gid_cache_context {
  416. int real_index;
  417. int refcount;
  418. };
  419. struct gid_entry {
  420. union ib_gid gid;
  421. enum ib_gid_type gid_type;
  422. struct gid_cache_context *ctx;
  423. };
  424. struct mlx4_port_gid_table {
  425. struct gid_entry gids[MLX4_MAX_PORT_GIDS];
  426. };
  427. struct mlx4_ib_iboe {
  428. spinlock_t lock;
  429. struct net_device *netdevs[MLX4_MAX_PORTS];
  430. atomic64_t mac[MLX4_MAX_PORTS];
  431. struct notifier_block nb;
  432. struct mlx4_port_gid_table gids[MLX4_MAX_PORTS];
  433. };
  434. struct pkey_mgt {
  435. u8 virt2phys_pkey[MLX4_MFUNC_MAX][MLX4_MAX_PORTS][MLX4_MAX_PORT_PKEYS];
  436. u16 phys_pkey_cache[MLX4_MAX_PORTS][MLX4_MAX_PORT_PKEYS];
  437. struct list_head pkey_port_list[MLX4_MFUNC_MAX];
  438. struct kobject *device_parent[MLX4_MFUNC_MAX];
  439. };
  440. struct mlx4_ib_iov_sysfs_attr {
  441. void *ctx;
  442. struct kobject *kobj;
  443. unsigned long data;
  444. u32 entry_num;
  445. char name[15];
  446. struct device_attribute dentry;
  447. struct device *dev;
  448. };
  449. struct mlx4_ib_iov_sysfs_attr_ar {
  450. struct mlx4_ib_iov_sysfs_attr dentries[3 * NUM_ALIAS_GUID_PER_PORT + 1];
  451. };
  452. struct mlx4_ib_iov_port {
  453. char name[100];
  454. u8 num;
  455. struct mlx4_ib_dev *dev;
  456. struct list_head list;
  457. struct mlx4_ib_iov_sysfs_attr_ar *dentr_ar;
  458. struct ib_port_attr attr;
  459. struct kobject *cur_port;
  460. struct kobject *admin_alias_parent;
  461. struct kobject *gids_parent;
  462. struct kobject *pkeys_parent;
  463. struct kobject *mcgs_parent;
  464. struct mlx4_ib_iov_sysfs_attr mcg_dentry;
  465. };
  466. struct counter_index {
  467. struct list_head list;
  468. u32 index;
  469. u8 allocated;
  470. };
  471. struct mlx4_ib_counters {
  472. struct list_head counters_list;
  473. struct mutex mutex; /* mutex for accessing counters list */
  474. u32 default_counter;
  475. };
  476. #define MLX4_DIAG_COUNTERS_TYPES 2
  477. struct mlx4_ib_diag_counters {
  478. const char **name;
  479. u32 *offset;
  480. u32 num_counters;
  481. };
  482. struct mlx4_ib_dev {
  483. struct ib_device ib_dev;
  484. struct mlx4_dev *dev;
  485. int num_ports;
  486. void __iomem *uar_map;
  487. struct mlx4_uar priv_uar;
  488. u32 priv_pdn;
  489. MLX4_DECLARE_DOORBELL_LOCK(uar_lock);
  490. struct ib_mad_agent *send_agent[MLX4_MAX_PORTS][2];
  491. struct ib_ah *sm_ah[MLX4_MAX_PORTS];
  492. spinlock_t sm_lock;
  493. atomic64_t sl2vl[MLX4_MAX_PORTS];
  494. struct mlx4_ib_sriov sriov;
  495. struct mutex cap_mask_mutex;
  496. bool ib_active;
  497. struct mlx4_ib_iboe iboe;
  498. struct mlx4_ib_counters counters_table[MLX4_MAX_PORTS];
  499. int *eq_table;
  500. struct kobject *iov_parent;
  501. struct kobject *ports_parent;
  502. struct kobject *dev_ports_parent[MLX4_MFUNC_MAX];
  503. struct mlx4_ib_iov_port iov_ports[MLX4_MAX_PORTS];
  504. struct pkey_mgt pkeys;
  505. unsigned long *ib_uc_qpns_bitmap;
  506. int steer_qpn_count;
  507. int steer_qpn_base;
  508. int steering_support;
  509. struct mlx4_ib_qp *qp1_proxy[MLX4_MAX_PORTS];
  510. /* lock when destroying qp1_proxy and getting netdev events */
  511. struct mutex qp1_proxy_lock[MLX4_MAX_PORTS];
  512. u8 bond_next_port;
  513. /* protect resources needed as part of reset flow */
  514. spinlock_t reset_flow_resource_lock;
  515. struct list_head qp_list;
  516. struct mlx4_ib_diag_counters diag_counters[MLX4_DIAG_COUNTERS_TYPES];
  517. };
  518. struct ib_event_work {
  519. struct work_struct work;
  520. struct mlx4_ib_dev *ib_dev;
  521. struct mlx4_eqe ib_eqe;
  522. int port;
  523. };
  524. struct mlx4_ib_qp_tunnel_init_attr {
  525. struct ib_qp_init_attr init_attr;
  526. int slave;
  527. enum ib_qp_type proxy_qp_type;
  528. u8 port;
  529. };
  530. struct mlx4_uverbs_ex_query_device {
  531. __u32 comp_mask;
  532. __u32 reserved;
  533. };
  534. enum query_device_resp_mask {
  535. QUERY_DEVICE_RESP_MASK_TIMESTAMP = 1UL << 0,
  536. };
  537. struct mlx4_uverbs_ex_query_device_resp {
  538. __u32 comp_mask;
  539. __u32 response_length;
  540. __u64 hca_core_clock_offset;
  541. };
  542. static inline struct mlx4_ib_dev *to_mdev(struct ib_device *ibdev)
  543. {
  544. return container_of(ibdev, struct mlx4_ib_dev, ib_dev);
  545. }
  546. static inline struct mlx4_ib_ucontext *to_mucontext(struct ib_ucontext *ibucontext)
  547. {
  548. return container_of(ibucontext, struct mlx4_ib_ucontext, ibucontext);
  549. }
  550. static inline struct mlx4_ib_pd *to_mpd(struct ib_pd *ibpd)
  551. {
  552. return container_of(ibpd, struct mlx4_ib_pd, ibpd);
  553. }
  554. static inline struct mlx4_ib_xrcd *to_mxrcd(struct ib_xrcd *ibxrcd)
  555. {
  556. return container_of(ibxrcd, struct mlx4_ib_xrcd, ibxrcd);
  557. }
  558. static inline struct mlx4_ib_cq *to_mcq(struct ib_cq *ibcq)
  559. {
  560. return container_of(ibcq, struct mlx4_ib_cq, ibcq);
  561. }
  562. static inline struct mlx4_ib_cq *to_mibcq(struct mlx4_cq *mcq)
  563. {
  564. return container_of(mcq, struct mlx4_ib_cq, mcq);
  565. }
  566. static inline struct mlx4_ib_mr *to_mmr(struct ib_mr *ibmr)
  567. {
  568. return container_of(ibmr, struct mlx4_ib_mr, ibmr);
  569. }
  570. static inline struct mlx4_ib_mw *to_mmw(struct ib_mw *ibmw)
  571. {
  572. return container_of(ibmw, struct mlx4_ib_mw, ibmw);
  573. }
  574. static inline struct mlx4_ib_fmr *to_mfmr(struct ib_fmr *ibfmr)
  575. {
  576. return container_of(ibfmr, struct mlx4_ib_fmr, ibfmr);
  577. }
  578. static inline struct mlx4_ib_flow *to_mflow(struct ib_flow *ibflow)
  579. {
  580. return container_of(ibflow, struct mlx4_ib_flow, ibflow);
  581. }
  582. static inline struct mlx4_ib_qp *to_mqp(struct ib_qp *ibqp)
  583. {
  584. return container_of(ibqp, struct mlx4_ib_qp, ibqp);
  585. }
  586. static inline struct mlx4_ib_qp *to_mibqp(struct mlx4_qp *mqp)
  587. {
  588. return container_of(mqp, struct mlx4_ib_qp, mqp);
  589. }
  590. static inline struct mlx4_ib_srq *to_msrq(struct ib_srq *ibsrq)
  591. {
  592. return container_of(ibsrq, struct mlx4_ib_srq, ibsrq);
  593. }
  594. static inline struct mlx4_ib_srq *to_mibsrq(struct mlx4_srq *msrq)
  595. {
  596. return container_of(msrq, struct mlx4_ib_srq, msrq);
  597. }
  598. static inline struct mlx4_ib_ah *to_mah(struct ib_ah *ibah)
  599. {
  600. return container_of(ibah, struct mlx4_ib_ah, ibah);
  601. }
  602. static inline u8 mlx4_ib_bond_next_port(struct mlx4_ib_dev *dev)
  603. {
  604. dev->bond_next_port = (dev->bond_next_port + 1) % dev->num_ports;
  605. return dev->bond_next_port + 1;
  606. }
  607. int mlx4_ib_init_sriov(struct mlx4_ib_dev *dev);
  608. void mlx4_ib_close_sriov(struct mlx4_ib_dev *dev);
  609. int mlx4_ib_db_map_user(struct mlx4_ib_ucontext *context, unsigned long virt,
  610. struct mlx4_db *db);
  611. void mlx4_ib_db_unmap_user(struct mlx4_ib_ucontext *context, struct mlx4_db *db);
  612. struct ib_mr *mlx4_ib_get_dma_mr(struct ib_pd *pd, int acc);
  613. int mlx4_ib_umem_write_mtt(struct mlx4_ib_dev *dev, struct mlx4_mtt *mtt,
  614. struct ib_umem *umem);
  615. struct ib_mr *mlx4_ib_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
  616. u64 virt_addr, int access_flags,
  617. struct ib_udata *udata);
  618. int mlx4_ib_dereg_mr(struct ib_mr *mr);
  619. struct ib_mw *mlx4_ib_alloc_mw(struct ib_pd *pd, enum ib_mw_type type,
  620. struct ib_udata *udata);
  621. int mlx4_ib_dealloc_mw(struct ib_mw *mw);
  622. struct ib_mr *mlx4_ib_alloc_mr(struct ib_pd *pd,
  623. enum ib_mr_type mr_type,
  624. u32 max_num_sg);
  625. int mlx4_ib_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg, int sg_nents,
  626. unsigned int *sg_offset);
  627. int mlx4_ib_modify_cq(struct ib_cq *cq, u16 cq_count, u16 cq_period);
  628. int mlx4_ib_resize_cq(struct ib_cq *ibcq, int entries, struct ib_udata *udata);
  629. struct ib_cq *mlx4_ib_create_cq(struct ib_device *ibdev,
  630. const struct ib_cq_init_attr *attr,
  631. struct ib_ucontext *context,
  632. struct ib_udata *udata);
  633. int mlx4_ib_destroy_cq(struct ib_cq *cq);
  634. int mlx4_ib_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc);
  635. int mlx4_ib_arm_cq(struct ib_cq *cq, enum ib_cq_notify_flags flags);
  636. void __mlx4_ib_cq_clean(struct mlx4_ib_cq *cq, u32 qpn, struct mlx4_ib_srq *srq);
  637. void mlx4_ib_cq_clean(struct mlx4_ib_cq *cq, u32 qpn, struct mlx4_ib_srq *srq);
  638. struct ib_ah *mlx4_ib_create_ah(struct ib_pd *pd, struct ib_ah_attr *ah_attr);
  639. int mlx4_ib_query_ah(struct ib_ah *ibah, struct ib_ah_attr *ah_attr);
  640. int mlx4_ib_destroy_ah(struct ib_ah *ah);
  641. struct ib_srq *mlx4_ib_create_srq(struct ib_pd *pd,
  642. struct ib_srq_init_attr *init_attr,
  643. struct ib_udata *udata);
  644. int mlx4_ib_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
  645. enum ib_srq_attr_mask attr_mask, struct ib_udata *udata);
  646. int mlx4_ib_query_srq(struct ib_srq *srq, struct ib_srq_attr *srq_attr);
  647. int mlx4_ib_destroy_srq(struct ib_srq *srq);
  648. void mlx4_ib_free_srq_wqe(struct mlx4_ib_srq *srq, int wqe_index);
  649. int mlx4_ib_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
  650. struct ib_recv_wr **bad_wr);
  651. struct ib_qp *mlx4_ib_create_qp(struct ib_pd *pd,
  652. struct ib_qp_init_attr *init_attr,
  653. struct ib_udata *udata);
  654. int mlx4_ib_destroy_qp(struct ib_qp *qp);
  655. int mlx4_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
  656. int attr_mask, struct ib_udata *udata);
  657. int mlx4_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, int qp_attr_mask,
  658. struct ib_qp_init_attr *qp_init_attr);
  659. int mlx4_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
  660. struct ib_send_wr **bad_wr);
  661. int mlx4_ib_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr,
  662. struct ib_recv_wr **bad_wr);
  663. int mlx4_MAD_IFC(struct mlx4_ib_dev *dev, int mad_ifc_flags,
  664. int port, const struct ib_wc *in_wc, const struct ib_grh *in_grh,
  665. const void *in_mad, void *response_mad);
  666. int mlx4_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
  667. const struct ib_wc *in_wc, const struct ib_grh *in_grh,
  668. const struct ib_mad_hdr *in, size_t in_mad_size,
  669. struct ib_mad_hdr *out, size_t *out_mad_size,
  670. u16 *out_mad_pkey_index);
  671. int mlx4_ib_mad_init(struct mlx4_ib_dev *dev);
  672. void mlx4_ib_mad_cleanup(struct mlx4_ib_dev *dev);
  673. struct ib_fmr *mlx4_ib_fmr_alloc(struct ib_pd *pd, int mr_access_flags,
  674. struct ib_fmr_attr *fmr_attr);
  675. int mlx4_ib_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list, int npages,
  676. u64 iova);
  677. int mlx4_ib_unmap_fmr(struct list_head *fmr_list);
  678. int mlx4_ib_fmr_dealloc(struct ib_fmr *fmr);
  679. int __mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
  680. struct ib_port_attr *props, int netw_view);
  681. int __mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
  682. u16 *pkey, int netw_view);
  683. int __mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
  684. union ib_gid *gid, int netw_view);
  685. static inline bool mlx4_ib_ah_grh_present(struct mlx4_ib_ah *ah)
  686. {
  687. u8 port = be32_to_cpu(ah->av.ib.port_pd) >> 24 & 3;
  688. if (rdma_port_get_link_layer(ah->ibah.device, port) == IB_LINK_LAYER_ETHERNET)
  689. return true;
  690. return !!(ah->av.ib.g_slid & 0x80);
  691. }
  692. int mlx4_ib_mcg_port_init(struct mlx4_ib_demux_ctx *ctx);
  693. void mlx4_ib_mcg_port_cleanup(struct mlx4_ib_demux_ctx *ctx, int destroy_wq);
  694. void clean_vf_mcast(struct mlx4_ib_demux_ctx *ctx, int slave);
  695. int mlx4_ib_mcg_init(void);
  696. void mlx4_ib_mcg_destroy(void);
  697. int mlx4_ib_find_real_gid(struct ib_device *ibdev, u8 port, __be64 guid);
  698. int mlx4_ib_mcg_multiplex_handler(struct ib_device *ibdev, int port, int slave,
  699. struct ib_sa_mad *sa_mad);
  700. int mlx4_ib_mcg_demux_handler(struct ib_device *ibdev, int port, int slave,
  701. struct ib_sa_mad *mad);
  702. int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
  703. union ib_gid *gid);
  704. void mlx4_ib_dispatch_event(struct mlx4_ib_dev *dev, u8 port_num,
  705. enum ib_event_type type);
  706. void mlx4_ib_tunnels_update_work(struct work_struct *work);
  707. int mlx4_ib_send_to_slave(struct mlx4_ib_dev *dev, int slave, u8 port,
  708. enum ib_qp_type qpt, struct ib_wc *wc,
  709. struct ib_grh *grh, struct ib_mad *mad);
  710. int mlx4_ib_send_to_wire(struct mlx4_ib_dev *dev, int slave, u8 port,
  711. enum ib_qp_type dest_qpt, u16 pkey_index, u32 remote_qpn,
  712. u32 qkey, struct ib_ah_attr *attr, u8 *s_mac,
  713. u16 vlan_id, struct ib_mad *mad);
  714. __be64 mlx4_ib_get_new_demux_tid(struct mlx4_ib_demux_ctx *ctx);
  715. int mlx4_ib_demux_cm_handler(struct ib_device *ibdev, int port, int *slave,
  716. struct ib_mad *mad);
  717. int mlx4_ib_multiplex_cm_handler(struct ib_device *ibdev, int port, int slave_id,
  718. struct ib_mad *mad);
  719. void mlx4_ib_cm_paravirt_init(struct mlx4_ib_dev *dev);
  720. void mlx4_ib_cm_paravirt_clean(struct mlx4_ib_dev *dev, int slave_id);
  721. /* alias guid support */
  722. void mlx4_ib_init_alias_guid_work(struct mlx4_ib_dev *dev, int port);
  723. int mlx4_ib_init_alias_guid_service(struct mlx4_ib_dev *dev);
  724. void mlx4_ib_destroy_alias_guid_service(struct mlx4_ib_dev *dev);
  725. void mlx4_ib_invalidate_all_guid_record(struct mlx4_ib_dev *dev, int port);
  726. void mlx4_ib_notify_slaves_on_guid_change(struct mlx4_ib_dev *dev,
  727. int block_num,
  728. u8 port_num, u8 *p_data);
  729. void mlx4_ib_update_cache_on_guid_change(struct mlx4_ib_dev *dev,
  730. int block_num, u8 port_num,
  731. u8 *p_data);
  732. int add_sysfs_port_mcg_attr(struct mlx4_ib_dev *device, int port_num,
  733. struct attribute *attr);
  734. void del_sysfs_port_mcg_attr(struct mlx4_ib_dev *device, int port_num,
  735. struct attribute *attr);
  736. ib_sa_comp_mask mlx4_ib_get_aguid_comp_mask_from_ix(int index);
  737. void mlx4_ib_slave_alias_guid_event(struct mlx4_ib_dev *dev, int slave,
  738. int port, int slave_init);
  739. int mlx4_ib_device_register_sysfs(struct mlx4_ib_dev *device) ;
  740. void mlx4_ib_device_unregister_sysfs(struct mlx4_ib_dev *device);
  741. __be64 mlx4_ib_gen_node_guid(void);
  742. int mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev *dev, int count, int *qpn);
  743. void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count);
  744. int mlx4_ib_steer_qp_reg(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
  745. int is_attach);
  746. int mlx4_ib_rereg_user_mr(struct ib_mr *mr, int flags,
  747. u64 start, u64 length, u64 virt_addr,
  748. int mr_access_flags, struct ib_pd *pd,
  749. struct ib_udata *udata);
  750. int mlx4_ib_gid_index_to_real_index(struct mlx4_ib_dev *ibdev,
  751. u8 port_num, int index);
  752. void mlx4_sched_ib_sl2vl_update_work(struct mlx4_ib_dev *ibdev,
  753. int port);
  754. void mlx4_ib_sl2vl_update(struct mlx4_ib_dev *mdev, int port);
  755. #endif /* MLX4_IB_H */