mcp3422.c 10 KB

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  1. /*
  2. * mcp3422.c - driver for the Microchip mcp3421/2/3/4/5/6/7/8 chip family
  3. *
  4. * Copyright (C) 2013, Angelo Compagnucci
  5. * Author: Angelo Compagnucci <angelo.compagnucci@gmail.com>
  6. *
  7. * Datasheet: http://ww1.microchip.com/downloads/en/devicedoc/22088b.pdf
  8. * http://ww1.microchip.com/downloads/en/DeviceDoc/22226a.pdf
  9. * http://ww1.microchip.com/downloads/en/DeviceDoc/22072b.pdf
  10. *
  11. * This driver exports the value of analog input voltage to sysfs, the
  12. * voltage unit is nV.
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or
  17. * (at your option) any later version.
  18. */
  19. #include <linux/err.h>
  20. #include <linux/i2c.h>
  21. #include <linux/module.h>
  22. #include <linux/delay.h>
  23. #include <linux/sysfs.h>
  24. #include <linux/of.h>
  25. #include <linux/iio/iio.h>
  26. #include <linux/iio/sysfs.h>
  27. /* Masks */
  28. #define MCP3422_CHANNEL_MASK 0x60
  29. #define MCP3422_PGA_MASK 0x03
  30. #define MCP3422_SRATE_MASK 0x0C
  31. #define MCP3422_SRATE_240 0x0
  32. #define MCP3422_SRATE_60 0x1
  33. #define MCP3422_SRATE_15 0x2
  34. #define MCP3422_SRATE_3 0x3
  35. #define MCP3422_PGA_1 0
  36. #define MCP3422_PGA_2 1
  37. #define MCP3422_PGA_4 2
  38. #define MCP3422_PGA_8 3
  39. #define MCP3422_CONT_SAMPLING 0x10
  40. #define MCP3422_CHANNEL(config) (((config) & MCP3422_CHANNEL_MASK) >> 5)
  41. #define MCP3422_PGA(config) ((config) & MCP3422_PGA_MASK)
  42. #define MCP3422_SAMPLE_RATE(config) (((config) & MCP3422_SRATE_MASK) >> 2)
  43. #define MCP3422_CHANNEL_VALUE(value) (((value) << 5) & MCP3422_CHANNEL_MASK)
  44. #define MCP3422_PGA_VALUE(value) ((value) & MCP3422_PGA_MASK)
  45. #define MCP3422_SAMPLE_RATE_VALUE(value) ((value << 2) & MCP3422_SRATE_MASK)
  46. #define MCP3422_CHAN(_index) \
  47. { \
  48. .type = IIO_VOLTAGE, \
  49. .indexed = 1, \
  50. .channel = _index, \
  51. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \
  52. | BIT(IIO_CHAN_INFO_SCALE), \
  53. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
  54. }
  55. static const int mcp3422_scales[4][4] = {
  56. { 1000000, 500000, 250000, 125000 },
  57. { 250000, 125000, 62500, 31250 },
  58. { 62500, 31250, 15625, 7812 },
  59. { 15625, 7812, 3906, 1953 } };
  60. /* Constant msleep times for data acquisitions */
  61. static const int mcp3422_read_times[4] = {
  62. [MCP3422_SRATE_240] = 1000 / 240,
  63. [MCP3422_SRATE_60] = 1000 / 60,
  64. [MCP3422_SRATE_15] = 1000 / 15,
  65. [MCP3422_SRATE_3] = 1000 / 3 };
  66. /* sample rates to integer conversion table */
  67. static const int mcp3422_sample_rates[4] = {
  68. [MCP3422_SRATE_240] = 240,
  69. [MCP3422_SRATE_60] = 60,
  70. [MCP3422_SRATE_15] = 15,
  71. [MCP3422_SRATE_3] = 3 };
  72. /* sample rates to sign extension table */
  73. static const int mcp3422_sign_extend[4] = {
  74. [MCP3422_SRATE_240] = 11,
  75. [MCP3422_SRATE_60] = 13,
  76. [MCP3422_SRATE_15] = 15,
  77. [MCP3422_SRATE_3] = 17 };
  78. /* Client data (each client gets its own) */
  79. struct mcp3422 {
  80. struct i2c_client *i2c;
  81. u8 id;
  82. u8 config;
  83. u8 pga[4];
  84. struct mutex lock;
  85. };
  86. static int mcp3422_update_config(struct mcp3422 *adc, u8 newconfig)
  87. {
  88. int ret;
  89. mutex_lock(&adc->lock);
  90. ret = i2c_master_send(adc->i2c, &newconfig, 1);
  91. if (ret > 0) {
  92. adc->config = newconfig;
  93. ret = 0;
  94. }
  95. mutex_unlock(&adc->lock);
  96. return ret;
  97. }
  98. static int mcp3422_read(struct mcp3422 *adc, int *value, u8 *config)
  99. {
  100. int ret = 0;
  101. u8 sample_rate = MCP3422_SAMPLE_RATE(adc->config);
  102. u8 buf[4] = {0, 0, 0, 0};
  103. u32 temp;
  104. if (sample_rate == MCP3422_SRATE_3) {
  105. ret = i2c_master_recv(adc->i2c, buf, 4);
  106. temp = buf[0] << 16 | buf[1] << 8 | buf[2];
  107. *config = buf[3];
  108. } else {
  109. ret = i2c_master_recv(adc->i2c, buf, 3);
  110. temp = buf[0] << 8 | buf[1];
  111. *config = buf[2];
  112. }
  113. *value = sign_extend32(temp, mcp3422_sign_extend[sample_rate]);
  114. return ret;
  115. }
  116. static int mcp3422_read_channel(struct mcp3422 *adc,
  117. struct iio_chan_spec const *channel, int *value)
  118. {
  119. int ret;
  120. u8 config;
  121. u8 req_channel = channel->channel;
  122. if (req_channel != MCP3422_CHANNEL(adc->config)) {
  123. config = adc->config;
  124. config &= ~MCP3422_CHANNEL_MASK;
  125. config |= MCP3422_CHANNEL_VALUE(req_channel);
  126. config &= ~MCP3422_PGA_MASK;
  127. config |= MCP3422_PGA_VALUE(adc->pga[req_channel]);
  128. ret = mcp3422_update_config(adc, config);
  129. if (ret < 0)
  130. return ret;
  131. msleep(mcp3422_read_times[MCP3422_SAMPLE_RATE(adc->config)]);
  132. }
  133. return mcp3422_read(adc, value, &config);
  134. }
  135. static int mcp3422_read_raw(struct iio_dev *iio,
  136. struct iio_chan_spec const *channel, int *val1,
  137. int *val2, long mask)
  138. {
  139. struct mcp3422 *adc = iio_priv(iio);
  140. int err;
  141. u8 sample_rate = MCP3422_SAMPLE_RATE(adc->config);
  142. u8 pga = MCP3422_PGA(adc->config);
  143. switch (mask) {
  144. case IIO_CHAN_INFO_RAW:
  145. err = mcp3422_read_channel(adc, channel, val1);
  146. if (err < 0)
  147. return -EINVAL;
  148. return IIO_VAL_INT;
  149. case IIO_CHAN_INFO_SCALE:
  150. *val1 = 0;
  151. *val2 = mcp3422_scales[sample_rate][pga];
  152. return IIO_VAL_INT_PLUS_NANO;
  153. case IIO_CHAN_INFO_SAMP_FREQ:
  154. *val1 = mcp3422_sample_rates[MCP3422_SAMPLE_RATE(adc->config)];
  155. return IIO_VAL_INT;
  156. default:
  157. break;
  158. }
  159. return -EINVAL;
  160. }
  161. static int mcp3422_write_raw(struct iio_dev *iio,
  162. struct iio_chan_spec const *channel, int val1,
  163. int val2, long mask)
  164. {
  165. struct mcp3422 *adc = iio_priv(iio);
  166. u8 temp;
  167. u8 config = adc->config;
  168. u8 req_channel = channel->channel;
  169. u8 sample_rate = MCP3422_SAMPLE_RATE(config);
  170. u8 i;
  171. switch (mask) {
  172. case IIO_CHAN_INFO_SCALE:
  173. if (val1 != 0)
  174. return -EINVAL;
  175. for (i = 0; i < ARRAY_SIZE(mcp3422_scales[0]); i++) {
  176. if (val2 == mcp3422_scales[sample_rate][i]) {
  177. adc->pga[req_channel] = i;
  178. config &= ~MCP3422_CHANNEL_MASK;
  179. config |= MCP3422_CHANNEL_VALUE(req_channel);
  180. config &= ~MCP3422_PGA_MASK;
  181. config |= MCP3422_PGA_VALUE(adc->pga[req_channel]);
  182. return mcp3422_update_config(adc, config);
  183. }
  184. }
  185. return -EINVAL;
  186. case IIO_CHAN_INFO_SAMP_FREQ:
  187. switch (val1) {
  188. case 240:
  189. temp = MCP3422_SRATE_240;
  190. break;
  191. case 60:
  192. temp = MCP3422_SRATE_60;
  193. break;
  194. case 15:
  195. temp = MCP3422_SRATE_15;
  196. break;
  197. case 3:
  198. if (adc->id > 4)
  199. return -EINVAL;
  200. temp = MCP3422_SRATE_3;
  201. break;
  202. default:
  203. return -EINVAL;
  204. }
  205. config &= ~MCP3422_CHANNEL_MASK;
  206. config |= MCP3422_CHANNEL_VALUE(req_channel);
  207. config &= ~MCP3422_SRATE_MASK;
  208. config |= MCP3422_SAMPLE_RATE_VALUE(temp);
  209. return mcp3422_update_config(adc, config);
  210. default:
  211. break;
  212. }
  213. return -EINVAL;
  214. }
  215. static int mcp3422_write_raw_get_fmt(struct iio_dev *indio_dev,
  216. struct iio_chan_spec const *chan, long mask)
  217. {
  218. switch (mask) {
  219. case IIO_CHAN_INFO_SCALE:
  220. return IIO_VAL_INT_PLUS_NANO;
  221. case IIO_CHAN_INFO_SAMP_FREQ:
  222. return IIO_VAL_INT_PLUS_MICRO;
  223. default:
  224. return -EINVAL;
  225. }
  226. }
  227. static ssize_t mcp3422_show_samp_freqs(struct device *dev,
  228. struct device_attribute *attr, char *buf)
  229. {
  230. struct mcp3422 *adc = iio_priv(dev_to_iio_dev(dev));
  231. if (adc->id > 4)
  232. return sprintf(buf, "240 60 15\n");
  233. return sprintf(buf, "240 60 15 3\n");
  234. }
  235. static ssize_t mcp3422_show_scales(struct device *dev,
  236. struct device_attribute *attr, char *buf)
  237. {
  238. struct mcp3422 *adc = iio_priv(dev_to_iio_dev(dev));
  239. u8 sample_rate = MCP3422_SAMPLE_RATE(adc->config);
  240. return sprintf(buf, "0.%09u 0.%09u 0.%09u 0.%09u\n",
  241. mcp3422_scales[sample_rate][0],
  242. mcp3422_scales[sample_rate][1],
  243. mcp3422_scales[sample_rate][2],
  244. mcp3422_scales[sample_rate][3]);
  245. }
  246. static IIO_DEVICE_ATTR(sampling_frequency_available, S_IRUGO,
  247. mcp3422_show_samp_freqs, NULL, 0);
  248. static IIO_DEVICE_ATTR(in_voltage_scale_available, S_IRUGO,
  249. mcp3422_show_scales, NULL, 0);
  250. static struct attribute *mcp3422_attributes[] = {
  251. &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
  252. &iio_dev_attr_in_voltage_scale_available.dev_attr.attr,
  253. NULL,
  254. };
  255. static const struct attribute_group mcp3422_attribute_group = {
  256. .attrs = mcp3422_attributes,
  257. };
  258. static const struct iio_chan_spec mcp3421_channels[] = {
  259. MCP3422_CHAN(0),
  260. };
  261. static const struct iio_chan_spec mcp3422_channels[] = {
  262. MCP3422_CHAN(0),
  263. MCP3422_CHAN(1),
  264. };
  265. static const struct iio_chan_spec mcp3424_channels[] = {
  266. MCP3422_CHAN(0),
  267. MCP3422_CHAN(1),
  268. MCP3422_CHAN(2),
  269. MCP3422_CHAN(3),
  270. };
  271. static const struct iio_info mcp3422_info = {
  272. .read_raw = mcp3422_read_raw,
  273. .write_raw = mcp3422_write_raw,
  274. .write_raw_get_fmt = mcp3422_write_raw_get_fmt,
  275. .attrs = &mcp3422_attribute_group,
  276. .driver_module = THIS_MODULE,
  277. };
  278. static int mcp3422_probe(struct i2c_client *client,
  279. const struct i2c_device_id *id)
  280. {
  281. struct iio_dev *indio_dev;
  282. struct mcp3422 *adc;
  283. int err;
  284. u8 config;
  285. if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
  286. return -EOPNOTSUPP;
  287. indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*adc));
  288. if (!indio_dev)
  289. return -ENOMEM;
  290. adc = iio_priv(indio_dev);
  291. adc->i2c = client;
  292. adc->id = (u8)(id->driver_data);
  293. mutex_init(&adc->lock);
  294. indio_dev->dev.parent = &client->dev;
  295. indio_dev->dev.of_node = client->dev.of_node;
  296. indio_dev->name = dev_name(&client->dev);
  297. indio_dev->modes = INDIO_DIRECT_MODE;
  298. indio_dev->info = &mcp3422_info;
  299. switch (adc->id) {
  300. case 1:
  301. case 5:
  302. indio_dev->channels = mcp3421_channels;
  303. indio_dev->num_channels = ARRAY_SIZE(mcp3421_channels);
  304. break;
  305. case 2:
  306. case 3:
  307. case 6:
  308. case 7:
  309. indio_dev->channels = mcp3422_channels;
  310. indio_dev->num_channels = ARRAY_SIZE(mcp3422_channels);
  311. break;
  312. case 4:
  313. case 8:
  314. indio_dev->channels = mcp3424_channels;
  315. indio_dev->num_channels = ARRAY_SIZE(mcp3424_channels);
  316. break;
  317. }
  318. /* meaningful default configuration */
  319. config = (MCP3422_CONT_SAMPLING
  320. | MCP3422_CHANNEL_VALUE(1)
  321. | MCP3422_PGA_VALUE(MCP3422_PGA_1)
  322. | MCP3422_SAMPLE_RATE_VALUE(MCP3422_SRATE_240));
  323. mcp3422_update_config(adc, config);
  324. err = devm_iio_device_register(&client->dev, indio_dev);
  325. if (err < 0)
  326. return err;
  327. i2c_set_clientdata(client, indio_dev);
  328. return 0;
  329. }
  330. static const struct i2c_device_id mcp3422_id[] = {
  331. { "mcp3421", 1 },
  332. { "mcp3422", 2 },
  333. { "mcp3423", 3 },
  334. { "mcp3424", 4 },
  335. { "mcp3425", 5 },
  336. { "mcp3426", 6 },
  337. { "mcp3427", 7 },
  338. { "mcp3428", 8 },
  339. { }
  340. };
  341. MODULE_DEVICE_TABLE(i2c, mcp3422_id);
  342. #ifdef CONFIG_OF
  343. static const struct of_device_id mcp3422_of_match[] = {
  344. { .compatible = "mcp3422" },
  345. { }
  346. };
  347. MODULE_DEVICE_TABLE(of, mcp3422_of_match);
  348. #endif
  349. static struct i2c_driver mcp3422_driver = {
  350. .driver = {
  351. .name = "mcp3422",
  352. .of_match_table = of_match_ptr(mcp3422_of_match),
  353. },
  354. .probe = mcp3422_probe,
  355. .id_table = mcp3422_id,
  356. };
  357. module_i2c_driver(mcp3422_driver);
  358. MODULE_AUTHOR("Angelo Compagnucci <angelo.compagnucci@gmail.com>");
  359. MODULE_DESCRIPTION("Microchip mcp3421/2/3/4/5/6/7/8 driver");
  360. MODULE_LICENSE("GPL v2");