mcp320x.c 11 KB

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  1. /*
  2. * Copyright (C) 2013 Oskar Andero <oskar.andero@gmail.com>
  3. * Copyright (C) 2014 Rose Technology
  4. * Allan Bendorff Jensen <abj@rosetechnology.dk>
  5. * Soren Andersen <san@rosetechnology.dk>
  6. *
  7. * Driver for following ADC chips from Microchip Technology's:
  8. * 10 Bit converter
  9. * MCP3001
  10. * MCP3002
  11. * MCP3004
  12. * MCP3008
  13. * ------------
  14. * 12 bit converter
  15. * MCP3201
  16. * MCP3202
  17. * MCP3204
  18. * MCP3208
  19. * ------------
  20. * 13 bit converter
  21. * MCP3301
  22. *
  23. * Datasheet can be found here:
  24. * http://ww1.microchip.com/downloads/en/DeviceDoc/21293C.pdf mcp3001
  25. * http://ww1.microchip.com/downloads/en/DeviceDoc/21294E.pdf mcp3002
  26. * http://ww1.microchip.com/downloads/en/DeviceDoc/21295d.pdf mcp3004/08
  27. * http://ww1.microchip.com/downloads/en/DeviceDoc/21290D.pdf mcp3201
  28. * http://ww1.microchip.com/downloads/en/DeviceDoc/21034D.pdf mcp3202
  29. * http://ww1.microchip.com/downloads/en/DeviceDoc/21298c.pdf mcp3204/08
  30. * http://ww1.microchip.com/downloads/en/DeviceDoc/21700E.pdf mcp3301
  31. *
  32. * This program is free software; you can redistribute it and/or modify
  33. * it under the terms of the GNU General Public License version 2 as
  34. * published by the Free Software Foundation.
  35. */
  36. #include <linux/err.h>
  37. #include <linux/delay.h>
  38. #include <linux/spi/spi.h>
  39. #include <linux/module.h>
  40. #include <linux/iio/iio.h>
  41. #include <linux/regulator/consumer.h>
  42. enum {
  43. mcp3001,
  44. mcp3002,
  45. mcp3004,
  46. mcp3008,
  47. mcp3201,
  48. mcp3202,
  49. mcp3204,
  50. mcp3208,
  51. mcp3301,
  52. };
  53. struct mcp320x_chip_info {
  54. const struct iio_chan_spec *channels;
  55. unsigned int num_channels;
  56. unsigned int resolution;
  57. };
  58. struct mcp320x {
  59. struct spi_device *spi;
  60. struct spi_message msg;
  61. struct spi_transfer transfer[2];
  62. struct regulator *reg;
  63. struct mutex lock;
  64. const struct mcp320x_chip_info *chip_info;
  65. u8 tx_buf ____cacheline_aligned;
  66. u8 rx_buf[2];
  67. };
  68. static int mcp320x_channel_to_tx_data(int device_index,
  69. const unsigned int channel, bool differential)
  70. {
  71. int start_bit = 1;
  72. switch (device_index) {
  73. case mcp3001:
  74. case mcp3201:
  75. case mcp3301:
  76. return 0;
  77. case mcp3002:
  78. case mcp3202:
  79. return ((start_bit << 4) | (!differential << 3) |
  80. (channel << 2));
  81. case mcp3004:
  82. case mcp3204:
  83. case mcp3008:
  84. case mcp3208:
  85. return ((start_bit << 6) | (!differential << 5) |
  86. (channel << 2));
  87. default:
  88. return -EINVAL;
  89. }
  90. }
  91. static int mcp320x_adc_conversion(struct mcp320x *adc, u8 channel,
  92. bool differential, int device_index, int *val)
  93. {
  94. int ret;
  95. adc->rx_buf[0] = 0;
  96. adc->rx_buf[1] = 0;
  97. adc->tx_buf = mcp320x_channel_to_tx_data(device_index,
  98. channel, differential);
  99. if (device_index != mcp3001 && device_index != mcp3201 && device_index != mcp3301) {
  100. ret = spi_sync(adc->spi, &adc->msg);
  101. if (ret < 0)
  102. return ret;
  103. } else {
  104. ret = spi_read(adc->spi, &adc->rx_buf, sizeof(adc->rx_buf));
  105. if (ret < 0)
  106. return ret;
  107. }
  108. switch (device_index) {
  109. case mcp3001:
  110. *val = (adc->rx_buf[0] << 5 | adc->rx_buf[1] >> 3);
  111. return 0;
  112. case mcp3002:
  113. case mcp3004:
  114. case mcp3008:
  115. *val = (adc->rx_buf[0] << 2 | adc->rx_buf[1] >> 6);
  116. return 0;
  117. case mcp3201:
  118. *val = (adc->rx_buf[0] << 7 | adc->rx_buf[1] >> 1);
  119. return 0;
  120. case mcp3202:
  121. case mcp3204:
  122. case mcp3208:
  123. *val = (adc->rx_buf[0] << 4 | adc->rx_buf[1] >> 4);
  124. return 0;
  125. case mcp3301:
  126. *val = sign_extend32((adc->rx_buf[0] & 0x1f) << 8
  127. | adc->rx_buf[1], 12);
  128. return 0;
  129. default:
  130. return -EINVAL;
  131. }
  132. }
  133. static int mcp320x_read_raw(struct iio_dev *indio_dev,
  134. struct iio_chan_spec const *channel, int *val,
  135. int *val2, long mask)
  136. {
  137. struct mcp320x *adc = iio_priv(indio_dev);
  138. int ret = -EINVAL;
  139. int device_index = 0;
  140. mutex_lock(&adc->lock);
  141. device_index = spi_get_device_id(adc->spi)->driver_data;
  142. switch (mask) {
  143. case IIO_CHAN_INFO_RAW:
  144. ret = mcp320x_adc_conversion(adc, channel->address,
  145. channel->differential, device_index, val);
  146. if (ret < 0)
  147. goto out;
  148. ret = IIO_VAL_INT;
  149. break;
  150. case IIO_CHAN_INFO_SCALE:
  151. ret = regulator_get_voltage(adc->reg);
  152. if (ret < 0)
  153. goto out;
  154. /* convert regulator output voltage to mV */
  155. *val = ret / 1000;
  156. *val2 = adc->chip_info->resolution;
  157. ret = IIO_VAL_FRACTIONAL_LOG2;
  158. break;
  159. }
  160. out:
  161. mutex_unlock(&adc->lock);
  162. return ret;
  163. }
  164. #define MCP320X_VOLTAGE_CHANNEL(num) \
  165. { \
  166. .type = IIO_VOLTAGE, \
  167. .indexed = 1, \
  168. .channel = (num), \
  169. .address = (num), \
  170. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
  171. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
  172. }
  173. #define MCP320X_VOLTAGE_CHANNEL_DIFF(chan1, chan2) \
  174. { \
  175. .type = IIO_VOLTAGE, \
  176. .indexed = 1, \
  177. .channel = (chan1), \
  178. .channel2 = (chan2), \
  179. .address = (chan1), \
  180. .differential = 1, \
  181. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
  182. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
  183. }
  184. static const struct iio_chan_spec mcp3201_channels[] = {
  185. MCP320X_VOLTAGE_CHANNEL_DIFF(0, 1),
  186. };
  187. static const struct iio_chan_spec mcp3202_channels[] = {
  188. MCP320X_VOLTAGE_CHANNEL(0),
  189. MCP320X_VOLTAGE_CHANNEL(1),
  190. MCP320X_VOLTAGE_CHANNEL_DIFF(0, 1),
  191. MCP320X_VOLTAGE_CHANNEL_DIFF(1, 0),
  192. };
  193. static const struct iio_chan_spec mcp3204_channels[] = {
  194. MCP320X_VOLTAGE_CHANNEL(0),
  195. MCP320X_VOLTAGE_CHANNEL(1),
  196. MCP320X_VOLTAGE_CHANNEL(2),
  197. MCP320X_VOLTAGE_CHANNEL(3),
  198. MCP320X_VOLTAGE_CHANNEL_DIFF(0, 1),
  199. MCP320X_VOLTAGE_CHANNEL_DIFF(1, 0),
  200. MCP320X_VOLTAGE_CHANNEL_DIFF(2, 3),
  201. MCP320X_VOLTAGE_CHANNEL_DIFF(3, 2),
  202. };
  203. static const struct iio_chan_spec mcp3208_channels[] = {
  204. MCP320X_VOLTAGE_CHANNEL(0),
  205. MCP320X_VOLTAGE_CHANNEL(1),
  206. MCP320X_VOLTAGE_CHANNEL(2),
  207. MCP320X_VOLTAGE_CHANNEL(3),
  208. MCP320X_VOLTAGE_CHANNEL(4),
  209. MCP320X_VOLTAGE_CHANNEL(5),
  210. MCP320X_VOLTAGE_CHANNEL(6),
  211. MCP320X_VOLTAGE_CHANNEL(7),
  212. MCP320X_VOLTAGE_CHANNEL_DIFF(0, 1),
  213. MCP320X_VOLTAGE_CHANNEL_DIFF(1, 0),
  214. MCP320X_VOLTAGE_CHANNEL_DIFF(2, 3),
  215. MCP320X_VOLTAGE_CHANNEL_DIFF(3, 2),
  216. MCP320X_VOLTAGE_CHANNEL_DIFF(4, 5),
  217. MCP320X_VOLTAGE_CHANNEL_DIFF(5, 4),
  218. MCP320X_VOLTAGE_CHANNEL_DIFF(6, 7),
  219. MCP320X_VOLTAGE_CHANNEL_DIFF(7, 6),
  220. };
  221. static const struct iio_info mcp320x_info = {
  222. .read_raw = mcp320x_read_raw,
  223. .driver_module = THIS_MODULE,
  224. };
  225. static const struct mcp320x_chip_info mcp320x_chip_infos[] = {
  226. [mcp3001] = {
  227. .channels = mcp3201_channels,
  228. .num_channels = ARRAY_SIZE(mcp3201_channels),
  229. .resolution = 10
  230. },
  231. [mcp3002] = {
  232. .channels = mcp3202_channels,
  233. .num_channels = ARRAY_SIZE(mcp3202_channels),
  234. .resolution = 10
  235. },
  236. [mcp3004] = {
  237. .channels = mcp3204_channels,
  238. .num_channels = ARRAY_SIZE(mcp3204_channels),
  239. .resolution = 10
  240. },
  241. [mcp3008] = {
  242. .channels = mcp3208_channels,
  243. .num_channels = ARRAY_SIZE(mcp3208_channels),
  244. .resolution = 10
  245. },
  246. [mcp3201] = {
  247. .channels = mcp3201_channels,
  248. .num_channels = ARRAY_SIZE(mcp3201_channels),
  249. .resolution = 12
  250. },
  251. [mcp3202] = {
  252. .channels = mcp3202_channels,
  253. .num_channels = ARRAY_SIZE(mcp3202_channels),
  254. .resolution = 12
  255. },
  256. [mcp3204] = {
  257. .channels = mcp3204_channels,
  258. .num_channels = ARRAY_SIZE(mcp3204_channels),
  259. .resolution = 12
  260. },
  261. [mcp3208] = {
  262. .channels = mcp3208_channels,
  263. .num_channels = ARRAY_SIZE(mcp3208_channels),
  264. .resolution = 12
  265. },
  266. [mcp3301] = {
  267. .channels = mcp3201_channels,
  268. .num_channels = ARRAY_SIZE(mcp3201_channels),
  269. .resolution = 13
  270. },
  271. };
  272. static int mcp320x_probe(struct spi_device *spi)
  273. {
  274. struct iio_dev *indio_dev;
  275. struct mcp320x *adc;
  276. const struct mcp320x_chip_info *chip_info;
  277. int ret;
  278. indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adc));
  279. if (!indio_dev)
  280. return -ENOMEM;
  281. adc = iio_priv(indio_dev);
  282. adc->spi = spi;
  283. indio_dev->dev.parent = &spi->dev;
  284. indio_dev->dev.of_node = spi->dev.of_node;
  285. indio_dev->name = spi_get_device_id(spi)->name;
  286. indio_dev->modes = INDIO_DIRECT_MODE;
  287. indio_dev->info = &mcp320x_info;
  288. spi_set_drvdata(spi, indio_dev);
  289. chip_info = &mcp320x_chip_infos[spi_get_device_id(spi)->driver_data];
  290. indio_dev->channels = chip_info->channels;
  291. indio_dev->num_channels = chip_info->num_channels;
  292. adc->chip_info = chip_info;
  293. adc->transfer[0].tx_buf = &adc->tx_buf;
  294. adc->transfer[0].len = sizeof(adc->tx_buf);
  295. adc->transfer[1].rx_buf = adc->rx_buf;
  296. adc->transfer[1].len = sizeof(adc->rx_buf);
  297. spi_message_init_with_transfers(&adc->msg, adc->transfer,
  298. ARRAY_SIZE(adc->transfer));
  299. adc->reg = devm_regulator_get(&spi->dev, "vref");
  300. if (IS_ERR(adc->reg))
  301. return PTR_ERR(adc->reg);
  302. ret = regulator_enable(adc->reg);
  303. if (ret < 0)
  304. return ret;
  305. mutex_init(&adc->lock);
  306. ret = iio_device_register(indio_dev);
  307. if (ret < 0)
  308. goto reg_disable;
  309. return 0;
  310. reg_disable:
  311. regulator_disable(adc->reg);
  312. return ret;
  313. }
  314. static int mcp320x_remove(struct spi_device *spi)
  315. {
  316. struct iio_dev *indio_dev = spi_get_drvdata(spi);
  317. struct mcp320x *adc = iio_priv(indio_dev);
  318. iio_device_unregister(indio_dev);
  319. regulator_disable(adc->reg);
  320. return 0;
  321. }
  322. #if defined(CONFIG_OF)
  323. static const struct of_device_id mcp320x_dt_ids[] = {
  324. /* NOTE: The use of compatibles with no vendor prefix is deprecated. */
  325. {
  326. .compatible = "mcp3001",
  327. .data = &mcp320x_chip_infos[mcp3001],
  328. }, {
  329. .compatible = "mcp3002",
  330. .data = &mcp320x_chip_infos[mcp3002],
  331. }, {
  332. .compatible = "mcp3004",
  333. .data = &mcp320x_chip_infos[mcp3004],
  334. }, {
  335. .compatible = "mcp3008",
  336. .data = &mcp320x_chip_infos[mcp3008],
  337. }, {
  338. .compatible = "mcp3201",
  339. .data = &mcp320x_chip_infos[mcp3201],
  340. }, {
  341. .compatible = "mcp3202",
  342. .data = &mcp320x_chip_infos[mcp3202],
  343. }, {
  344. .compatible = "mcp3204",
  345. .data = &mcp320x_chip_infos[mcp3204],
  346. }, {
  347. .compatible = "mcp3208",
  348. .data = &mcp320x_chip_infos[mcp3208],
  349. }, {
  350. .compatible = "mcp3301",
  351. .data = &mcp320x_chip_infos[mcp3301],
  352. }, {
  353. .compatible = "microchip,mcp3001",
  354. .data = &mcp320x_chip_infos[mcp3001],
  355. }, {
  356. .compatible = "microchip,mcp3002",
  357. .data = &mcp320x_chip_infos[mcp3002],
  358. }, {
  359. .compatible = "microchip,mcp3004",
  360. .data = &mcp320x_chip_infos[mcp3004],
  361. }, {
  362. .compatible = "microchip,mcp3008",
  363. .data = &mcp320x_chip_infos[mcp3008],
  364. }, {
  365. .compatible = "microchip,mcp3201",
  366. .data = &mcp320x_chip_infos[mcp3201],
  367. }, {
  368. .compatible = "microchip,mcp3202",
  369. .data = &mcp320x_chip_infos[mcp3202],
  370. }, {
  371. .compatible = "microchip,mcp3204",
  372. .data = &mcp320x_chip_infos[mcp3204],
  373. }, {
  374. .compatible = "microchip,mcp3208",
  375. .data = &mcp320x_chip_infos[mcp3208],
  376. }, {
  377. .compatible = "microchip,mcp3301",
  378. .data = &mcp320x_chip_infos[mcp3301],
  379. }, {
  380. }
  381. };
  382. MODULE_DEVICE_TABLE(of, mcp320x_dt_ids);
  383. #endif
  384. static const struct spi_device_id mcp320x_id[] = {
  385. { "mcp3001", mcp3001 },
  386. { "mcp3002", mcp3002 },
  387. { "mcp3004", mcp3004 },
  388. { "mcp3008", mcp3008 },
  389. { "mcp3201", mcp3201 },
  390. { "mcp3202", mcp3202 },
  391. { "mcp3204", mcp3204 },
  392. { "mcp3208", mcp3208 },
  393. { "mcp3301", mcp3301 },
  394. { }
  395. };
  396. MODULE_DEVICE_TABLE(spi, mcp320x_id);
  397. static struct spi_driver mcp320x_driver = {
  398. .driver = {
  399. .name = "mcp320x",
  400. .of_match_table = of_match_ptr(mcp320x_dt_ids),
  401. },
  402. .probe = mcp320x_probe,
  403. .remove = mcp320x_remove,
  404. .id_table = mcp320x_id,
  405. };
  406. module_spi_driver(mcp320x_driver);
  407. MODULE_AUTHOR("Oskar Andero <oskar.andero@gmail.com>");
  408. MODULE_DESCRIPTION("Microchip Technology MCP3x01/02/04/08");
  409. MODULE_LICENSE("GPL v2");