gpio-sa1100.c 5.9 KB

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  1. /*
  2. * linux/arch/arm/mach-sa1100/gpio.c
  3. *
  4. * Generic SA-1100 GPIO handling
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/gpio.h>
  11. #include <linux/init.h>
  12. #include <linux/module.h>
  13. #include <linux/io.h>
  14. #include <linux/syscore_ops.h>
  15. #include <mach/hardware.h>
  16. #include <mach/irqs.h>
  17. static int sa1100_gpio_get(struct gpio_chip *chip, unsigned offset)
  18. {
  19. return !!(GPLR & GPIO_GPIO(offset));
  20. }
  21. static void sa1100_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
  22. {
  23. if (value)
  24. GPSR = GPIO_GPIO(offset);
  25. else
  26. GPCR = GPIO_GPIO(offset);
  27. }
  28. static int sa1100_direction_input(struct gpio_chip *chip, unsigned offset)
  29. {
  30. unsigned long flags;
  31. local_irq_save(flags);
  32. GPDR &= ~GPIO_GPIO(offset);
  33. local_irq_restore(flags);
  34. return 0;
  35. }
  36. static int sa1100_direction_output(struct gpio_chip *chip, unsigned offset, int value)
  37. {
  38. unsigned long flags;
  39. local_irq_save(flags);
  40. sa1100_gpio_set(chip, offset, value);
  41. GPDR |= GPIO_GPIO(offset);
  42. local_irq_restore(flags);
  43. return 0;
  44. }
  45. static int sa1100_to_irq(struct gpio_chip *chip, unsigned offset)
  46. {
  47. return IRQ_GPIO0 + offset;
  48. }
  49. static struct gpio_chip sa1100_gpio_chip = {
  50. .label = "gpio",
  51. .direction_input = sa1100_direction_input,
  52. .direction_output = sa1100_direction_output,
  53. .set = sa1100_gpio_set,
  54. .get = sa1100_gpio_get,
  55. .to_irq = sa1100_to_irq,
  56. .base = 0,
  57. .ngpio = GPIO_MAX + 1,
  58. };
  59. /*
  60. * SA1100 GPIO edge detection for IRQs:
  61. * IRQs are generated on Falling-Edge, Rising-Edge, or both.
  62. * Use this instead of directly setting GRER/GFER.
  63. */
  64. static int GPIO_IRQ_rising_edge;
  65. static int GPIO_IRQ_falling_edge;
  66. static int GPIO_IRQ_mask;
  67. static int sa1100_gpio_type(struct irq_data *d, unsigned int type)
  68. {
  69. unsigned int mask;
  70. mask = BIT(d->hwirq);
  71. if (type == IRQ_TYPE_PROBE) {
  72. if ((GPIO_IRQ_rising_edge | GPIO_IRQ_falling_edge) & mask)
  73. return 0;
  74. type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING;
  75. }
  76. if (type & IRQ_TYPE_EDGE_RISING)
  77. GPIO_IRQ_rising_edge |= mask;
  78. else
  79. GPIO_IRQ_rising_edge &= ~mask;
  80. if (type & IRQ_TYPE_EDGE_FALLING)
  81. GPIO_IRQ_falling_edge |= mask;
  82. else
  83. GPIO_IRQ_falling_edge &= ~mask;
  84. GRER = GPIO_IRQ_rising_edge & GPIO_IRQ_mask;
  85. GFER = GPIO_IRQ_falling_edge & GPIO_IRQ_mask;
  86. return 0;
  87. }
  88. /*
  89. * GPIO IRQs must be acknowledged.
  90. */
  91. static void sa1100_gpio_ack(struct irq_data *d)
  92. {
  93. GEDR = BIT(d->hwirq);
  94. }
  95. static void sa1100_gpio_mask(struct irq_data *d)
  96. {
  97. unsigned int mask = BIT(d->hwirq);
  98. GPIO_IRQ_mask &= ~mask;
  99. GRER &= ~mask;
  100. GFER &= ~mask;
  101. }
  102. static void sa1100_gpio_unmask(struct irq_data *d)
  103. {
  104. unsigned int mask = BIT(d->hwirq);
  105. GPIO_IRQ_mask |= mask;
  106. GRER = GPIO_IRQ_rising_edge & GPIO_IRQ_mask;
  107. GFER = GPIO_IRQ_falling_edge & GPIO_IRQ_mask;
  108. }
  109. static int sa1100_gpio_wake(struct irq_data *d, unsigned int on)
  110. {
  111. if (on)
  112. PWER |= BIT(d->hwirq);
  113. else
  114. PWER &= ~BIT(d->hwirq);
  115. return 0;
  116. }
  117. /*
  118. * This is for GPIO IRQs
  119. */
  120. static struct irq_chip sa1100_gpio_irq_chip = {
  121. .name = "GPIO",
  122. .irq_ack = sa1100_gpio_ack,
  123. .irq_mask = sa1100_gpio_mask,
  124. .irq_unmask = sa1100_gpio_unmask,
  125. .irq_set_type = sa1100_gpio_type,
  126. .irq_set_wake = sa1100_gpio_wake,
  127. };
  128. static int sa1100_gpio_irqdomain_map(struct irq_domain *d,
  129. unsigned int irq, irq_hw_number_t hwirq)
  130. {
  131. irq_set_chip_and_handler(irq, &sa1100_gpio_irq_chip,
  132. handle_edge_irq);
  133. irq_set_probe(irq);
  134. return 0;
  135. }
  136. static const struct irq_domain_ops sa1100_gpio_irqdomain_ops = {
  137. .map = sa1100_gpio_irqdomain_map,
  138. .xlate = irq_domain_xlate_onetwocell,
  139. };
  140. static struct irq_domain *sa1100_gpio_irqdomain;
  141. /*
  142. * IRQ 0-11 (GPIO) handler. We enter here with the
  143. * irq_controller_lock held, and IRQs disabled. Decode the IRQ
  144. * and call the handler.
  145. */
  146. static void sa1100_gpio_handler(struct irq_desc *desc)
  147. {
  148. unsigned int irq, mask;
  149. mask = GEDR;
  150. do {
  151. /*
  152. * clear down all currently active IRQ sources.
  153. * We will be processing them all.
  154. */
  155. GEDR = mask;
  156. irq = IRQ_GPIO0;
  157. do {
  158. if (mask & 1)
  159. generic_handle_irq(irq);
  160. mask >>= 1;
  161. irq++;
  162. } while (mask);
  163. mask = GEDR;
  164. } while (mask);
  165. }
  166. static int sa1100_gpio_suspend(void)
  167. {
  168. /*
  169. * Set the appropriate edges for wakeup.
  170. */
  171. GRER = PWER & GPIO_IRQ_rising_edge;
  172. GFER = PWER & GPIO_IRQ_falling_edge;
  173. /*
  174. * Clear any pending GPIO interrupts.
  175. */
  176. GEDR = GEDR;
  177. return 0;
  178. }
  179. static void sa1100_gpio_resume(void)
  180. {
  181. GRER = GPIO_IRQ_rising_edge & GPIO_IRQ_mask;
  182. GFER = GPIO_IRQ_falling_edge & GPIO_IRQ_mask;
  183. }
  184. static struct syscore_ops sa1100_gpio_syscore_ops = {
  185. .suspend = sa1100_gpio_suspend,
  186. .resume = sa1100_gpio_resume,
  187. };
  188. static int __init sa1100_gpio_init_devicefs(void)
  189. {
  190. register_syscore_ops(&sa1100_gpio_syscore_ops);
  191. return 0;
  192. }
  193. device_initcall(sa1100_gpio_init_devicefs);
  194. void __init sa1100_init_gpio(void)
  195. {
  196. /* clear all GPIO edge detects */
  197. GFER = 0;
  198. GRER = 0;
  199. GEDR = -1;
  200. gpiochip_add_data(&sa1100_gpio_chip, NULL);
  201. sa1100_gpio_irqdomain = irq_domain_add_simple(NULL,
  202. 28, IRQ_GPIO0,
  203. &sa1100_gpio_irqdomain_ops, NULL);
  204. /*
  205. * Install handlers for GPIO 0-10 edge detect interrupts
  206. */
  207. irq_set_chained_handler(IRQ_GPIO0_SC, sa1100_gpio_handler);
  208. irq_set_chained_handler(IRQ_GPIO1_SC, sa1100_gpio_handler);
  209. irq_set_chained_handler(IRQ_GPIO2_SC, sa1100_gpio_handler);
  210. irq_set_chained_handler(IRQ_GPIO3_SC, sa1100_gpio_handler);
  211. irq_set_chained_handler(IRQ_GPIO4_SC, sa1100_gpio_handler);
  212. irq_set_chained_handler(IRQ_GPIO5_SC, sa1100_gpio_handler);
  213. irq_set_chained_handler(IRQ_GPIO6_SC, sa1100_gpio_handler);
  214. irq_set_chained_handler(IRQ_GPIO7_SC, sa1100_gpio_handler);
  215. irq_set_chained_handler(IRQ_GPIO8_SC, sa1100_gpio_handler);
  216. irq_set_chained_handler(IRQ_GPIO9_SC, sa1100_gpio_handler);
  217. irq_set_chained_handler(IRQ_GPIO10_SC, sa1100_gpio_handler);
  218. /*
  219. * Install handler for GPIO 11-27 edge detect interrupts
  220. */
  221. irq_set_chained_handler(IRQ_GPIO11_27, sa1100_gpio_handler);
  222. }