gpio-pcf857x.c 12 KB

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  1. /*
  2. * Driver for pcf857x, pca857x, and pca967x I2C GPIO expanders
  3. *
  4. * Copyright (C) 2007 David Brownell
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19. */
  20. #include <linux/gpio.h>
  21. #include <linux/i2c.h>
  22. #include <linux/i2c/pcf857x.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/irq.h>
  25. #include <linux/irqdomain.h>
  26. #include <linux/kernel.h>
  27. #include <linux/module.h>
  28. #include <linux/of.h>
  29. #include <linux/of_device.h>
  30. #include <linux/slab.h>
  31. #include <linux/spinlock.h>
  32. static const struct i2c_device_id pcf857x_id[] = {
  33. { "pcf8574", 8 },
  34. { "pcf8574a", 8 },
  35. { "pca8574", 8 },
  36. { "pca9670", 8 },
  37. { "pca9672", 8 },
  38. { "pca9674", 8 },
  39. { "pcf8575", 16 },
  40. { "pca8575", 16 },
  41. { "pca9671", 16 },
  42. { "pca9673", 16 },
  43. { "pca9675", 16 },
  44. { "max7328", 8 },
  45. { "max7329", 8 },
  46. { "tca9554", 8 },
  47. { }
  48. };
  49. MODULE_DEVICE_TABLE(i2c, pcf857x_id);
  50. #ifdef CONFIG_OF
  51. static const struct of_device_id pcf857x_of_table[] = {
  52. { .compatible = "nxp,pcf8574" },
  53. { .compatible = "nxp,pcf8574a" },
  54. { .compatible = "nxp,pca8574" },
  55. { .compatible = "nxp,pca9670" },
  56. { .compatible = "nxp,pca9672" },
  57. { .compatible = "nxp,pca9674" },
  58. { .compatible = "nxp,pcf8575" },
  59. { .compatible = "nxp,pca8575" },
  60. { .compatible = "nxp,pca9671" },
  61. { .compatible = "nxp,pca9673" },
  62. { .compatible = "nxp,pca9675" },
  63. { .compatible = "maxim,max7328" },
  64. { .compatible = "maxim,max7329" },
  65. { .compatible = "ti,tca9554" },
  66. { }
  67. };
  68. MODULE_DEVICE_TABLE(of, pcf857x_of_table);
  69. #endif
  70. /*
  71. * The pcf857x, pca857x, and pca967x chips only expose one read and one
  72. * write register. Writing a "one" bit (to match the reset state) lets
  73. * that pin be used as an input; it's not an open-drain model, but acts
  74. * a bit like one. This is described as "quasi-bidirectional"; read the
  75. * chip documentation for details.
  76. *
  77. * Many other I2C GPIO expander chips (like the pca953x models) have
  78. * more complex register models and more conventional circuitry using
  79. * push/pull drivers. They often use the same 0x20..0x27 addresses as
  80. * pcf857x parts, making the "legacy" I2C driver model problematic.
  81. */
  82. struct pcf857x {
  83. struct gpio_chip chip;
  84. struct i2c_client *client;
  85. struct mutex lock; /* protect 'out' */
  86. unsigned out; /* software latch */
  87. unsigned status; /* current status */
  88. unsigned int irq_parent;
  89. unsigned irq_enabled; /* enabled irqs */
  90. int (*write)(struct i2c_client *client, unsigned data);
  91. int (*read)(struct i2c_client *client);
  92. };
  93. /*-------------------------------------------------------------------------*/
  94. /* Talk to 8-bit I/O expander */
  95. static int i2c_write_le8(struct i2c_client *client, unsigned data)
  96. {
  97. return i2c_smbus_write_byte(client, data);
  98. }
  99. static int i2c_read_le8(struct i2c_client *client)
  100. {
  101. return (int)i2c_smbus_read_byte(client);
  102. }
  103. /* Talk to 16-bit I/O expander */
  104. static int i2c_write_le16(struct i2c_client *client, unsigned word)
  105. {
  106. u8 buf[2] = { word & 0xff, word >> 8, };
  107. int status;
  108. status = i2c_master_send(client, buf, 2);
  109. return (status < 0) ? status : 0;
  110. }
  111. static int i2c_read_le16(struct i2c_client *client)
  112. {
  113. u8 buf[2];
  114. int status;
  115. status = i2c_master_recv(client, buf, 2);
  116. if (status < 0)
  117. return status;
  118. return (buf[1] << 8) | buf[0];
  119. }
  120. /*-------------------------------------------------------------------------*/
  121. static int pcf857x_input(struct gpio_chip *chip, unsigned offset)
  122. {
  123. struct pcf857x *gpio = gpiochip_get_data(chip);
  124. int status;
  125. mutex_lock(&gpio->lock);
  126. gpio->out |= (1 << offset);
  127. status = gpio->write(gpio->client, gpio->out);
  128. mutex_unlock(&gpio->lock);
  129. return status;
  130. }
  131. static int pcf857x_get(struct gpio_chip *chip, unsigned offset)
  132. {
  133. struct pcf857x *gpio = gpiochip_get_data(chip);
  134. int value;
  135. value = gpio->read(gpio->client);
  136. return (value < 0) ? value : !!(value & (1 << offset));
  137. }
  138. static int pcf857x_output(struct gpio_chip *chip, unsigned offset, int value)
  139. {
  140. struct pcf857x *gpio = gpiochip_get_data(chip);
  141. unsigned bit = 1 << offset;
  142. int status;
  143. mutex_lock(&gpio->lock);
  144. if (value)
  145. gpio->out |= bit;
  146. else
  147. gpio->out &= ~bit;
  148. status = gpio->write(gpio->client, gpio->out);
  149. mutex_unlock(&gpio->lock);
  150. return status;
  151. }
  152. static void pcf857x_set(struct gpio_chip *chip, unsigned offset, int value)
  153. {
  154. pcf857x_output(chip, offset, value);
  155. }
  156. /*-------------------------------------------------------------------------*/
  157. static irqreturn_t pcf857x_irq(int irq, void *data)
  158. {
  159. struct pcf857x *gpio = data;
  160. unsigned long change, i, status;
  161. status = gpio->read(gpio->client);
  162. /*
  163. * call the interrupt handler iff gpio is used as
  164. * interrupt source, just to avoid bad irqs
  165. */
  166. mutex_lock(&gpio->lock);
  167. change = (gpio->status ^ status) & gpio->irq_enabled;
  168. gpio->status = status;
  169. mutex_unlock(&gpio->lock);
  170. for_each_set_bit(i, &change, gpio->chip.ngpio)
  171. handle_nested_irq(irq_find_mapping(gpio->chip.irqdomain, i));
  172. return IRQ_HANDLED;
  173. }
  174. /*
  175. * NOP functions
  176. */
  177. static void noop(struct irq_data *data) { }
  178. static int pcf857x_irq_set_wake(struct irq_data *data, unsigned int on)
  179. {
  180. struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
  181. int error = 0;
  182. if (gpio->irq_parent) {
  183. error = irq_set_irq_wake(gpio->irq_parent, on);
  184. if (error) {
  185. dev_dbg(&gpio->client->dev,
  186. "irq %u doesn't support irq_set_wake\n",
  187. gpio->irq_parent);
  188. gpio->irq_parent = 0;
  189. }
  190. }
  191. return error;
  192. }
  193. static void pcf857x_irq_enable(struct irq_data *data)
  194. {
  195. struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
  196. gpio->irq_enabled |= (1 << data->hwirq);
  197. }
  198. static void pcf857x_irq_disable(struct irq_data *data)
  199. {
  200. struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
  201. gpio->irq_enabled &= ~(1 << data->hwirq);
  202. }
  203. static void pcf857x_irq_bus_lock(struct irq_data *data)
  204. {
  205. struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
  206. mutex_lock(&gpio->lock);
  207. }
  208. static void pcf857x_irq_bus_sync_unlock(struct irq_data *data)
  209. {
  210. struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
  211. mutex_unlock(&gpio->lock);
  212. }
  213. static struct irq_chip pcf857x_irq_chip = {
  214. .name = "pcf857x",
  215. .irq_enable = pcf857x_irq_enable,
  216. .irq_disable = pcf857x_irq_disable,
  217. .irq_ack = noop,
  218. .irq_mask = noop,
  219. .irq_unmask = noop,
  220. .irq_set_wake = pcf857x_irq_set_wake,
  221. .irq_bus_lock = pcf857x_irq_bus_lock,
  222. .irq_bus_sync_unlock = pcf857x_irq_bus_sync_unlock,
  223. };
  224. /*-------------------------------------------------------------------------*/
  225. static int pcf857x_probe(struct i2c_client *client,
  226. const struct i2c_device_id *id)
  227. {
  228. struct pcf857x_platform_data *pdata = dev_get_platdata(&client->dev);
  229. struct device_node *np = client->dev.of_node;
  230. struct pcf857x *gpio;
  231. unsigned int n_latch = 0;
  232. int status;
  233. if (IS_ENABLED(CONFIG_OF) && np)
  234. of_property_read_u32(np, "lines-initial-states", &n_latch);
  235. else if (pdata)
  236. n_latch = pdata->n_latch;
  237. else
  238. dev_dbg(&client->dev, "no platform data\n");
  239. /* Allocate, initialize, and register this gpio_chip. */
  240. gpio = devm_kzalloc(&client->dev, sizeof(*gpio), GFP_KERNEL);
  241. if (!gpio)
  242. return -ENOMEM;
  243. mutex_init(&gpio->lock);
  244. gpio->chip.base = pdata ? pdata->gpio_base : -1;
  245. gpio->chip.can_sleep = true;
  246. gpio->chip.parent = &client->dev;
  247. gpio->chip.owner = THIS_MODULE;
  248. gpio->chip.get = pcf857x_get;
  249. gpio->chip.set = pcf857x_set;
  250. gpio->chip.direction_input = pcf857x_input;
  251. gpio->chip.direction_output = pcf857x_output;
  252. gpio->chip.ngpio = id->driver_data;
  253. /* NOTE: the OnSemi jlc1562b is also largely compatible with
  254. * these parts, notably for output. It has a low-resolution
  255. * DAC instead of pin change IRQs; and its inputs can be the
  256. * result of comparators.
  257. */
  258. /* 8574 addresses are 0x20..0x27; 8574a uses 0x38..0x3f;
  259. * 9670, 9672, 9764, and 9764a use quite a variety.
  260. *
  261. * NOTE: we don't distinguish here between *4 and *4a parts.
  262. */
  263. if (gpio->chip.ngpio == 8) {
  264. gpio->write = i2c_write_le8;
  265. gpio->read = i2c_read_le8;
  266. if (!i2c_check_functionality(client->adapter,
  267. I2C_FUNC_SMBUS_BYTE))
  268. status = -EIO;
  269. /* fail if there's no chip present */
  270. else
  271. status = i2c_smbus_read_byte(client);
  272. /* '75/'75c addresses are 0x20..0x27, just like the '74;
  273. * the '75c doesn't have a current source pulling high.
  274. * 9671, 9673, and 9765 use quite a variety of addresses.
  275. *
  276. * NOTE: we don't distinguish here between '75 and '75c parts.
  277. */
  278. } else if (gpio->chip.ngpio == 16) {
  279. gpio->write = i2c_write_le16;
  280. gpio->read = i2c_read_le16;
  281. if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
  282. status = -EIO;
  283. /* fail if there's no chip present */
  284. else
  285. status = i2c_read_le16(client);
  286. } else {
  287. dev_dbg(&client->dev, "unsupported number of gpios\n");
  288. status = -EINVAL;
  289. }
  290. if (status < 0)
  291. goto fail;
  292. gpio->chip.label = client->name;
  293. gpio->client = client;
  294. i2c_set_clientdata(client, gpio);
  295. /* NOTE: these chips have strange "quasi-bidirectional" I/O pins.
  296. * We can't actually know whether a pin is configured (a) as output
  297. * and driving the signal low, or (b) as input and reporting a low
  298. * value ... without knowing the last value written since the chip
  299. * came out of reset (if any). We can't read the latched output.
  300. *
  301. * In short, the only reliable solution for setting up pin direction
  302. * is to do it explicitly. The setup() method can do that, but it
  303. * may cause transient glitching since it can't know the last value
  304. * written (some pins may need to be driven low).
  305. *
  306. * Using n_latch avoids that trouble. When left initialized to zero,
  307. * our software copy of the "latch" then matches the chip's all-ones
  308. * reset state. Otherwise it flags pins to be driven low.
  309. */
  310. gpio->out = ~n_latch;
  311. gpio->status = gpio->out;
  312. status = devm_gpiochip_add_data(&client->dev, &gpio->chip, gpio);
  313. if (status < 0)
  314. goto fail;
  315. /* Enable irqchip if we have an interrupt */
  316. if (client->irq) {
  317. status = gpiochip_irqchip_add(&gpio->chip, &pcf857x_irq_chip,
  318. 0, handle_level_irq,
  319. IRQ_TYPE_NONE);
  320. if (status) {
  321. dev_err(&client->dev, "cannot add irqchip\n");
  322. goto fail;
  323. }
  324. status = devm_request_threaded_irq(&client->dev, client->irq,
  325. NULL, pcf857x_irq, IRQF_ONESHOT |
  326. IRQF_TRIGGER_FALLING | IRQF_SHARED,
  327. dev_name(&client->dev), gpio);
  328. if (status)
  329. goto fail;
  330. gpiochip_set_chained_irqchip(&gpio->chip, &pcf857x_irq_chip,
  331. client->irq, NULL);
  332. gpio->irq_parent = client->irq;
  333. }
  334. /* Let platform code set up the GPIOs and their users.
  335. * Now is the first time anyone could use them.
  336. */
  337. if (pdata && pdata->setup) {
  338. status = pdata->setup(client,
  339. gpio->chip.base, gpio->chip.ngpio,
  340. pdata->context);
  341. if (status < 0)
  342. dev_warn(&client->dev, "setup --> %d\n", status);
  343. }
  344. dev_info(&client->dev, "probed\n");
  345. return 0;
  346. fail:
  347. dev_dbg(&client->dev, "probe error %d for '%s'\n", status,
  348. client->name);
  349. return status;
  350. }
  351. static int pcf857x_remove(struct i2c_client *client)
  352. {
  353. struct pcf857x_platform_data *pdata = dev_get_platdata(&client->dev);
  354. struct pcf857x *gpio = i2c_get_clientdata(client);
  355. int status = 0;
  356. if (pdata && pdata->teardown) {
  357. status = pdata->teardown(client,
  358. gpio->chip.base, gpio->chip.ngpio,
  359. pdata->context);
  360. if (status < 0) {
  361. dev_err(&client->dev, "%s --> %d\n",
  362. "teardown", status);
  363. return status;
  364. }
  365. }
  366. return status;
  367. }
  368. static void pcf857x_shutdown(struct i2c_client *client)
  369. {
  370. struct pcf857x *gpio = i2c_get_clientdata(client);
  371. /* Drive all the I/O lines high */
  372. gpio->write(gpio->client, BIT(gpio->chip.ngpio) - 1);
  373. }
  374. static struct i2c_driver pcf857x_driver = {
  375. .driver = {
  376. .name = "pcf857x",
  377. .of_match_table = of_match_ptr(pcf857x_of_table),
  378. },
  379. .probe = pcf857x_probe,
  380. .remove = pcf857x_remove,
  381. .shutdown = pcf857x_shutdown,
  382. .id_table = pcf857x_id,
  383. };
  384. static int __init pcf857x_init(void)
  385. {
  386. return i2c_add_driver(&pcf857x_driver);
  387. }
  388. /* register after i2c postcore initcall and before
  389. * subsys initcalls that may rely on these GPIOs
  390. */
  391. subsys_initcall(pcf857x_init);
  392. static void __exit pcf857x_exit(void)
  393. {
  394. i2c_del_driver(&pcf857x_driver);
  395. }
  396. module_exit(pcf857x_exit);
  397. MODULE_LICENSE("GPL");
  398. MODULE_AUTHOR("David Brownell");