gx-suspmod.c 14 KB

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  1. /*
  2. * Cyrix MediaGX and NatSemi Geode Suspend Modulation
  3. * (C) 2002 Zwane Mwaikambo <zwane@commfireservices.com>
  4. * (C) 2002 Hiroshi Miura <miura@da-cha.org>
  5. * All Rights Reserved
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * version 2 as published by the Free Software Foundation
  10. *
  11. * The author(s) of this software shall not be held liable for damages
  12. * of any nature resulting due to the use of this software. This
  13. * software is provided AS-IS with no warranties.
  14. *
  15. * Theoretical note:
  16. *
  17. * (see Geode(tm) CS5530 manual (rev.4.1) page.56)
  18. *
  19. * CPU frequency control on NatSemi Geode GX1/GXLV processor and CS55x0
  20. * are based on Suspend Modulation.
  21. *
  22. * Suspend Modulation works by asserting and de-asserting the SUSP# pin
  23. * to CPU(GX1/GXLV) for configurable durations. When asserting SUSP#
  24. * the CPU enters an idle state. GX1 stops its core clock when SUSP# is
  25. * asserted then power consumption is reduced.
  26. *
  27. * Suspend Modulation's OFF/ON duration are configurable
  28. * with 'Suspend Modulation OFF Count Register'
  29. * and 'Suspend Modulation ON Count Register'.
  30. * These registers are 8bit counters that represent the number of
  31. * 32us intervals which the SUSP# pin is asserted(ON)/de-asserted(OFF)
  32. * to the processor.
  33. *
  34. * These counters define a ratio which is the effective frequency
  35. * of operation of the system.
  36. *
  37. * OFF Count
  38. * F_eff = Fgx * ----------------------
  39. * OFF Count + ON Count
  40. *
  41. * 0 <= On Count, Off Count <= 255
  42. *
  43. * From these limits, we can get register values
  44. *
  45. * off_duration + on_duration <= MAX_DURATION
  46. * on_duration = off_duration * (stock_freq - freq) / freq
  47. *
  48. * off_duration = (freq * DURATION) / stock_freq
  49. * on_duration = DURATION - off_duration
  50. *
  51. *
  52. *---------------------------------------------------------------------------
  53. *
  54. * ChangeLog:
  55. * Dec. 12, 2003 Hiroshi Miura <miura@da-cha.org>
  56. * - fix on/off register mistake
  57. * - fix cpu_khz calc when it stops cpu modulation.
  58. *
  59. * Dec. 11, 2002 Hiroshi Miura <miura@da-cha.org>
  60. * - rewrite for Cyrix MediaGX Cx5510/5520 and
  61. * NatSemi Geode Cs5530(A).
  62. *
  63. * Jul. ??, 2002 Zwane Mwaikambo <zwane@commfireservices.com>
  64. * - cs5530_mod patch for 2.4.19-rc1.
  65. *
  66. *---------------------------------------------------------------------------
  67. *
  68. * Todo
  69. * Test on machines with 5510, 5530, 5530A
  70. */
  71. /************************************************************************
  72. * Suspend Modulation - Definitions *
  73. ************************************************************************/
  74. #include <linux/kernel.h>
  75. #include <linux/module.h>
  76. #include <linux/init.h>
  77. #include <linux/smp.h>
  78. #include <linux/cpufreq.h>
  79. #include <linux/pci.h>
  80. #include <linux/errno.h>
  81. #include <linux/slab.h>
  82. #include <asm/cpu_device_id.h>
  83. #include <asm/processor-cyrix.h>
  84. /* PCI config registers, all at F0 */
  85. #define PCI_PMER1 0x80 /* power management enable register 1 */
  86. #define PCI_PMER2 0x81 /* power management enable register 2 */
  87. #define PCI_PMER3 0x82 /* power management enable register 3 */
  88. #define PCI_IRQTC 0x8c /* irq speedup timer counter register:typical 2 to 4ms */
  89. #define PCI_VIDTC 0x8d /* video speedup timer counter register: typical 50 to 100ms */
  90. #define PCI_MODOFF 0x94 /* suspend modulation OFF counter register, 1 = 32us */
  91. #define PCI_MODON 0x95 /* suspend modulation ON counter register */
  92. #define PCI_SUSCFG 0x96 /* suspend configuration register */
  93. /* PMER1 bits */
  94. #define GPM (1<<0) /* global power management */
  95. #define GIT (1<<1) /* globally enable PM device idle timers */
  96. #define GTR (1<<2) /* globally enable IO traps */
  97. #define IRQ_SPDUP (1<<3) /* disable clock throttle during interrupt handling */
  98. #define VID_SPDUP (1<<4) /* disable clock throttle during vga video handling */
  99. /* SUSCFG bits */
  100. #define SUSMOD (1<<0) /* enable/disable suspend modulation */
  101. /* the below is supported only with cs5530 (after rev.1.2)/cs5530A */
  102. #define SMISPDUP (1<<1) /* select how SMI re-enable suspend modulation: */
  103. /* IRQTC timer or read SMI speedup disable reg.(F1BAR[08-09h]) */
  104. #define SUSCFG (1<<2) /* enable powering down a GXLV processor. "Special 3Volt Suspend" mode */
  105. /* the below is supported only with cs5530A */
  106. #define PWRSVE_ISA (1<<3) /* stop ISA clock */
  107. #define PWRSVE (1<<4) /* active idle */
  108. struct gxfreq_params {
  109. u8 on_duration;
  110. u8 off_duration;
  111. u8 pci_suscfg;
  112. u8 pci_pmer1;
  113. u8 pci_pmer2;
  114. struct pci_dev *cs55x0;
  115. };
  116. static struct gxfreq_params *gx_params;
  117. static int stock_freq;
  118. /* PCI bus clock - defaults to 30.000 if cpu_khz is not available */
  119. static int pci_busclk;
  120. module_param(pci_busclk, int, 0444);
  121. /* maximum duration for which the cpu may be suspended
  122. * (32us * MAX_DURATION). If no parameter is given, this defaults
  123. * to 255.
  124. * Note that this leads to a maximum of 8 ms(!) where the CPU clock
  125. * is suspended -- processing power is just 0.39% of what it used to be,
  126. * though. 781.25 kHz(!) for a 200 MHz processor -- wow. */
  127. static int max_duration = 255;
  128. module_param(max_duration, int, 0444);
  129. /* For the default policy, we want at least some processing power
  130. * - let's say 5%. (min = maxfreq / POLICY_MIN_DIV)
  131. */
  132. #define POLICY_MIN_DIV 20
  133. /**
  134. * we can detect a core multiplier from dir0_lsb
  135. * from GX1 datasheet p.56,
  136. * MULT[3:0]:
  137. * 0000 = SYSCLK multiplied by 4 (test only)
  138. * 0001 = SYSCLK multiplied by 10
  139. * 0010 = SYSCLK multiplied by 4
  140. * 0011 = SYSCLK multiplied by 6
  141. * 0100 = SYSCLK multiplied by 9
  142. * 0101 = SYSCLK multiplied by 5
  143. * 0110 = SYSCLK multiplied by 7
  144. * 0111 = SYSCLK multiplied by 8
  145. * of 33.3MHz
  146. **/
  147. static int gx_freq_mult[16] = {
  148. 4, 10, 4, 6, 9, 5, 7, 8,
  149. 0, 0, 0, 0, 0, 0, 0, 0
  150. };
  151. /****************************************************************
  152. * Low Level chipset interface *
  153. ****************************************************************/
  154. static struct pci_device_id gx_chipset_tbl[] __initdata = {
  155. { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5530_LEGACY), },
  156. { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5520), },
  157. { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5510), },
  158. { 0, },
  159. };
  160. MODULE_DEVICE_TABLE(pci, gx_chipset_tbl);
  161. static void gx_write_byte(int reg, int value)
  162. {
  163. pci_write_config_byte(gx_params->cs55x0, reg, value);
  164. }
  165. /**
  166. * gx_detect_chipset:
  167. *
  168. **/
  169. static struct pci_dev * __init gx_detect_chipset(void)
  170. {
  171. struct pci_dev *gx_pci = NULL;
  172. /* detect which companion chip is used */
  173. for_each_pci_dev(gx_pci) {
  174. if ((pci_match_id(gx_chipset_tbl, gx_pci)) != NULL)
  175. return gx_pci;
  176. }
  177. pr_debug("error: no supported chipset found!\n");
  178. return NULL;
  179. }
  180. /**
  181. * gx_get_cpuspeed:
  182. *
  183. * Finds out at which efficient frequency the Cyrix MediaGX/NatSemi
  184. * Geode CPU runs.
  185. */
  186. static unsigned int gx_get_cpuspeed(unsigned int cpu)
  187. {
  188. if ((gx_params->pci_suscfg & SUSMOD) == 0)
  189. return stock_freq;
  190. return (stock_freq * gx_params->off_duration)
  191. / (gx_params->on_duration + gx_params->off_duration);
  192. }
  193. /**
  194. * gx_validate_speed:
  195. * determine current cpu speed
  196. *
  197. **/
  198. static unsigned int gx_validate_speed(unsigned int khz, u8 *on_duration,
  199. u8 *off_duration)
  200. {
  201. unsigned int i;
  202. u8 tmp_on, tmp_off;
  203. int old_tmp_freq = stock_freq;
  204. int tmp_freq;
  205. *off_duration = 1;
  206. *on_duration = 0;
  207. for (i = max_duration; i > 0; i--) {
  208. tmp_off = ((khz * i) / stock_freq) & 0xff;
  209. tmp_on = i - tmp_off;
  210. tmp_freq = (stock_freq * tmp_off) / i;
  211. /* if this relation is closer to khz, use this. If it's equal,
  212. * prefer it, too - lower latency */
  213. if (abs(tmp_freq - khz) <= abs(old_tmp_freq - khz)) {
  214. *on_duration = tmp_on;
  215. *off_duration = tmp_off;
  216. old_tmp_freq = tmp_freq;
  217. }
  218. }
  219. return old_tmp_freq;
  220. }
  221. /**
  222. * gx_set_cpuspeed:
  223. * set cpu speed in khz.
  224. **/
  225. static void gx_set_cpuspeed(struct cpufreq_policy *policy, unsigned int khz)
  226. {
  227. u8 suscfg, pmer1;
  228. unsigned int new_khz;
  229. unsigned long flags;
  230. struct cpufreq_freqs freqs;
  231. freqs.old = gx_get_cpuspeed(0);
  232. new_khz = gx_validate_speed(khz, &gx_params->on_duration,
  233. &gx_params->off_duration);
  234. freqs.new = new_khz;
  235. cpufreq_freq_transition_begin(policy, &freqs);
  236. local_irq_save(flags);
  237. if (new_khz != stock_freq) {
  238. /* if new khz == 100% of CPU speed, it is special case */
  239. switch (gx_params->cs55x0->device) {
  240. case PCI_DEVICE_ID_CYRIX_5530_LEGACY:
  241. pmer1 = gx_params->pci_pmer1 | IRQ_SPDUP | VID_SPDUP;
  242. /* FIXME: need to test other values -- Zwane,Miura */
  243. /* typical 2 to 4ms */
  244. gx_write_byte(PCI_IRQTC, 4);
  245. /* typical 50 to 100ms */
  246. gx_write_byte(PCI_VIDTC, 100);
  247. gx_write_byte(PCI_PMER1, pmer1);
  248. if (gx_params->cs55x0->revision < 0x10) {
  249. /* CS5530(rev 1.2, 1.3) */
  250. suscfg = gx_params->pci_suscfg|SUSMOD;
  251. } else {
  252. /* CS5530A,B.. */
  253. suscfg = gx_params->pci_suscfg|SUSMOD|PWRSVE;
  254. }
  255. break;
  256. case PCI_DEVICE_ID_CYRIX_5520:
  257. case PCI_DEVICE_ID_CYRIX_5510:
  258. suscfg = gx_params->pci_suscfg | SUSMOD;
  259. break;
  260. default:
  261. local_irq_restore(flags);
  262. pr_debug("fatal: try to set unknown chipset.\n");
  263. return;
  264. }
  265. } else {
  266. suscfg = gx_params->pci_suscfg & ~(SUSMOD);
  267. gx_params->off_duration = 0;
  268. gx_params->on_duration = 0;
  269. pr_debug("suspend modulation disabled: cpu runs 100%% speed.\n");
  270. }
  271. gx_write_byte(PCI_MODOFF, gx_params->off_duration);
  272. gx_write_byte(PCI_MODON, gx_params->on_duration);
  273. gx_write_byte(PCI_SUSCFG, suscfg);
  274. pci_read_config_byte(gx_params->cs55x0, PCI_SUSCFG, &suscfg);
  275. local_irq_restore(flags);
  276. gx_params->pci_suscfg = suscfg;
  277. cpufreq_freq_transition_end(policy, &freqs, 0);
  278. pr_debug("suspend modulation w/ duration of ON:%d us, OFF:%d us\n",
  279. gx_params->on_duration * 32, gx_params->off_duration * 32);
  280. pr_debug("suspend modulation w/ clock speed: %d kHz.\n", freqs.new);
  281. }
  282. /****************************************************************
  283. * High level functions *
  284. ****************************************************************/
  285. /*
  286. * cpufreq_gx_verify: test if frequency range is valid
  287. *
  288. * This function checks if a given frequency range in kHz is valid
  289. * for the hardware supported by the driver.
  290. */
  291. static int cpufreq_gx_verify(struct cpufreq_policy *policy)
  292. {
  293. unsigned int tmp_freq = 0;
  294. u8 tmp1, tmp2;
  295. if (!stock_freq || !policy)
  296. return -EINVAL;
  297. policy->cpu = 0;
  298. cpufreq_verify_within_limits(policy, (stock_freq / max_duration),
  299. stock_freq);
  300. /* it needs to be assured that at least one supported frequency is
  301. * within policy->min and policy->max. If it is not, policy->max
  302. * needs to be increased until one frequency is supported.
  303. * policy->min may not be decreased, though. This way we guarantee a
  304. * specific processing capacity.
  305. */
  306. tmp_freq = gx_validate_speed(policy->min, &tmp1, &tmp2);
  307. if (tmp_freq < policy->min)
  308. tmp_freq += stock_freq / max_duration;
  309. policy->min = tmp_freq;
  310. if (policy->min > policy->max)
  311. policy->max = tmp_freq;
  312. tmp_freq = gx_validate_speed(policy->max, &tmp1, &tmp2);
  313. if (tmp_freq > policy->max)
  314. tmp_freq -= stock_freq / max_duration;
  315. policy->max = tmp_freq;
  316. if (policy->max < policy->min)
  317. policy->max = policy->min;
  318. cpufreq_verify_within_limits(policy, (stock_freq / max_duration),
  319. stock_freq);
  320. return 0;
  321. }
  322. /*
  323. * cpufreq_gx_target:
  324. *
  325. */
  326. static int cpufreq_gx_target(struct cpufreq_policy *policy,
  327. unsigned int target_freq,
  328. unsigned int relation)
  329. {
  330. u8 tmp1, tmp2;
  331. unsigned int tmp_freq;
  332. if (!stock_freq || !policy)
  333. return -EINVAL;
  334. policy->cpu = 0;
  335. tmp_freq = gx_validate_speed(target_freq, &tmp1, &tmp2);
  336. while (tmp_freq < policy->min) {
  337. tmp_freq += stock_freq / max_duration;
  338. tmp_freq = gx_validate_speed(tmp_freq, &tmp1, &tmp2);
  339. }
  340. while (tmp_freq > policy->max) {
  341. tmp_freq -= stock_freq / max_duration;
  342. tmp_freq = gx_validate_speed(tmp_freq, &tmp1, &tmp2);
  343. }
  344. gx_set_cpuspeed(policy, tmp_freq);
  345. return 0;
  346. }
  347. static int cpufreq_gx_cpu_init(struct cpufreq_policy *policy)
  348. {
  349. unsigned int maxfreq;
  350. if (!policy || policy->cpu != 0)
  351. return -ENODEV;
  352. /* determine maximum frequency */
  353. if (pci_busclk)
  354. maxfreq = pci_busclk * gx_freq_mult[getCx86(CX86_DIR1) & 0x0f];
  355. else if (cpu_khz)
  356. maxfreq = cpu_khz;
  357. else
  358. maxfreq = 30000 * gx_freq_mult[getCx86(CX86_DIR1) & 0x0f];
  359. stock_freq = maxfreq;
  360. pr_debug("cpu max frequency is %d.\n", maxfreq);
  361. /* setup basic struct for cpufreq API */
  362. policy->cpu = 0;
  363. if (max_duration < POLICY_MIN_DIV)
  364. policy->min = maxfreq / max_duration;
  365. else
  366. policy->min = maxfreq / POLICY_MIN_DIV;
  367. policy->max = maxfreq;
  368. policy->cpuinfo.min_freq = maxfreq / max_duration;
  369. policy->cpuinfo.max_freq = maxfreq;
  370. policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
  371. return 0;
  372. }
  373. /*
  374. * cpufreq_gx_init:
  375. * MediaGX/Geode GX initialize cpufreq driver
  376. */
  377. static struct cpufreq_driver gx_suspmod_driver = {
  378. .get = gx_get_cpuspeed,
  379. .verify = cpufreq_gx_verify,
  380. .target = cpufreq_gx_target,
  381. .init = cpufreq_gx_cpu_init,
  382. .name = "gx-suspmod",
  383. };
  384. static int __init cpufreq_gx_init(void)
  385. {
  386. int ret;
  387. struct gxfreq_params *params;
  388. struct pci_dev *gx_pci;
  389. /* Test if we have the right hardware */
  390. gx_pci = gx_detect_chipset();
  391. if (gx_pci == NULL)
  392. return -ENODEV;
  393. /* check whether module parameters are sane */
  394. if (max_duration > 0xff)
  395. max_duration = 0xff;
  396. pr_debug("geode suspend modulation available.\n");
  397. params = kzalloc(sizeof(*params), GFP_KERNEL);
  398. if (params == NULL)
  399. return -ENOMEM;
  400. params->cs55x0 = gx_pci;
  401. gx_params = params;
  402. /* keep cs55x0 configurations */
  403. pci_read_config_byte(params->cs55x0, PCI_SUSCFG, &(params->pci_suscfg));
  404. pci_read_config_byte(params->cs55x0, PCI_PMER1, &(params->pci_pmer1));
  405. pci_read_config_byte(params->cs55x0, PCI_PMER2, &(params->pci_pmer2));
  406. pci_read_config_byte(params->cs55x0, PCI_MODON, &(params->on_duration));
  407. pci_read_config_byte(params->cs55x0, PCI_MODOFF,
  408. &(params->off_duration));
  409. ret = cpufreq_register_driver(&gx_suspmod_driver);
  410. if (ret) {
  411. kfree(params);
  412. return ret; /* register error! */
  413. }
  414. return 0;
  415. }
  416. static void __exit cpufreq_gx_exit(void)
  417. {
  418. cpufreq_unregister_driver(&gx_suspmod_driver);
  419. pci_dev_put(gx_params->cs55x0);
  420. kfree(gx_params);
  421. }
  422. MODULE_AUTHOR("Hiroshi Miura <miura@da-cha.org>");
  423. MODULE_DESCRIPTION("Cpufreq driver for Cyrix MediaGX and NatSemi Geode");
  424. MODULE_LICENSE("GPL");
  425. module_init(cpufreq_gx_init);
  426. module_exit(cpufreq_gx_exit);