clk-s2mps11.c 6.7 KB

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  1. /*
  2. * clk-s2mps11.c - Clock driver for S2MPS11.
  3. *
  4. * Copyright (C) 2013,2014 Samsung Electornics
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. */
  17. #include <linux/module.h>
  18. #include <linux/err.h>
  19. #include <linux/of.h>
  20. #include <linux/clkdev.h>
  21. #include <linux/regmap.h>
  22. #include <linux/clk-provider.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/mfd/samsung/s2mps11.h>
  25. #include <linux/mfd/samsung/s2mps13.h>
  26. #include <linux/mfd/samsung/s2mps14.h>
  27. #include <linux/mfd/samsung/s5m8767.h>
  28. #include <linux/mfd/samsung/core.h>
  29. enum {
  30. S2MPS11_CLK_AP = 0,
  31. S2MPS11_CLK_CP,
  32. S2MPS11_CLK_BT,
  33. S2MPS11_CLKS_NUM,
  34. };
  35. struct s2mps11_clk {
  36. struct sec_pmic_dev *iodev;
  37. struct device_node *clk_np;
  38. struct clk_hw hw;
  39. struct clk *clk;
  40. struct clk_lookup *lookup;
  41. u32 mask;
  42. unsigned int reg;
  43. };
  44. static struct s2mps11_clk *to_s2mps11_clk(struct clk_hw *hw)
  45. {
  46. return container_of(hw, struct s2mps11_clk, hw);
  47. }
  48. static int s2mps11_clk_prepare(struct clk_hw *hw)
  49. {
  50. struct s2mps11_clk *s2mps11 = to_s2mps11_clk(hw);
  51. return regmap_update_bits(s2mps11->iodev->regmap_pmic,
  52. s2mps11->reg,
  53. s2mps11->mask, s2mps11->mask);
  54. }
  55. static void s2mps11_clk_unprepare(struct clk_hw *hw)
  56. {
  57. struct s2mps11_clk *s2mps11 = to_s2mps11_clk(hw);
  58. regmap_update_bits(s2mps11->iodev->regmap_pmic, s2mps11->reg,
  59. s2mps11->mask, ~s2mps11->mask);
  60. }
  61. static int s2mps11_clk_is_prepared(struct clk_hw *hw)
  62. {
  63. int ret;
  64. u32 val;
  65. struct s2mps11_clk *s2mps11 = to_s2mps11_clk(hw);
  66. ret = regmap_read(s2mps11->iodev->regmap_pmic,
  67. s2mps11->reg, &val);
  68. if (ret < 0)
  69. return -EINVAL;
  70. return val & s2mps11->mask;
  71. }
  72. static unsigned long s2mps11_clk_recalc_rate(struct clk_hw *hw,
  73. unsigned long parent_rate)
  74. {
  75. return 32768;
  76. }
  77. static struct clk_ops s2mps11_clk_ops = {
  78. .prepare = s2mps11_clk_prepare,
  79. .unprepare = s2mps11_clk_unprepare,
  80. .is_prepared = s2mps11_clk_is_prepared,
  81. .recalc_rate = s2mps11_clk_recalc_rate,
  82. };
  83. /* This s2mps11_clks_init tructure is common to s2mps11, s2mps13 and s2mps14 */
  84. static struct clk_init_data s2mps11_clks_init[S2MPS11_CLKS_NUM] = {
  85. [S2MPS11_CLK_AP] = {
  86. .name = "s2mps11_ap",
  87. .ops = &s2mps11_clk_ops,
  88. },
  89. [S2MPS11_CLK_CP] = {
  90. .name = "s2mps11_cp",
  91. .ops = &s2mps11_clk_ops,
  92. },
  93. [S2MPS11_CLK_BT] = {
  94. .name = "s2mps11_bt",
  95. .ops = &s2mps11_clk_ops,
  96. },
  97. };
  98. static struct device_node *s2mps11_clk_parse_dt(struct platform_device *pdev,
  99. struct clk_init_data *clks_init)
  100. {
  101. struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
  102. struct device_node *clk_np;
  103. int i;
  104. if (!iodev->dev->of_node)
  105. return ERR_PTR(-EINVAL);
  106. clk_np = of_get_child_by_name(iodev->dev->of_node, "clocks");
  107. if (!clk_np) {
  108. dev_err(&pdev->dev, "could not find clock sub-node\n");
  109. return ERR_PTR(-EINVAL);
  110. }
  111. for (i = 0; i < S2MPS11_CLKS_NUM; i++)
  112. of_property_read_string_index(clk_np, "clock-output-names", i,
  113. &clks_init[i].name);
  114. return clk_np;
  115. }
  116. static int s2mps11_clk_probe(struct platform_device *pdev)
  117. {
  118. struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
  119. struct s2mps11_clk *s2mps11_clks;
  120. struct clk_hw_onecell_data *clk_data;
  121. unsigned int s2mps11_reg;
  122. int i, ret = 0;
  123. enum sec_device_type hwid = platform_get_device_id(pdev)->driver_data;
  124. s2mps11_clks = devm_kcalloc(&pdev->dev, S2MPS11_CLKS_NUM,
  125. sizeof(*s2mps11_clks), GFP_KERNEL);
  126. if (!s2mps11_clks)
  127. return -ENOMEM;
  128. clk_data = devm_kzalloc(&pdev->dev, sizeof(*clk_data) +
  129. sizeof(*clk_data->hws) * S2MPS11_CLKS_NUM,
  130. GFP_KERNEL);
  131. if (!clk_data)
  132. return -ENOMEM;
  133. switch (hwid) {
  134. case S2MPS11X:
  135. s2mps11_reg = S2MPS11_REG_RTC_CTRL;
  136. break;
  137. case S2MPS13X:
  138. s2mps11_reg = S2MPS13_REG_RTCCTRL;
  139. break;
  140. case S2MPS14X:
  141. s2mps11_reg = S2MPS14_REG_RTCCTRL;
  142. break;
  143. case S5M8767X:
  144. s2mps11_reg = S5M8767_REG_CTRL1;
  145. break;
  146. default:
  147. dev_err(&pdev->dev, "Invalid device type\n");
  148. return -EINVAL;
  149. }
  150. /* Store clocks of_node in first element of s2mps11_clks array */
  151. s2mps11_clks->clk_np = s2mps11_clk_parse_dt(pdev, s2mps11_clks_init);
  152. if (IS_ERR(s2mps11_clks->clk_np))
  153. return PTR_ERR(s2mps11_clks->clk_np);
  154. for (i = 0; i < S2MPS11_CLKS_NUM; i++) {
  155. if (i == S2MPS11_CLK_CP && hwid == S2MPS14X)
  156. continue; /* Skip clocks not present in some devices */
  157. s2mps11_clks[i].iodev = iodev;
  158. s2mps11_clks[i].hw.init = &s2mps11_clks_init[i];
  159. s2mps11_clks[i].mask = 1 << i;
  160. s2mps11_clks[i].reg = s2mps11_reg;
  161. s2mps11_clks[i].clk = devm_clk_register(&pdev->dev,
  162. &s2mps11_clks[i].hw);
  163. if (IS_ERR(s2mps11_clks[i].clk)) {
  164. dev_err(&pdev->dev, "Fail to register : %s\n",
  165. s2mps11_clks_init[i].name);
  166. ret = PTR_ERR(s2mps11_clks[i].clk);
  167. goto err_reg;
  168. }
  169. s2mps11_clks[i].lookup = clkdev_hw_create(&s2mps11_clks[i].hw,
  170. s2mps11_clks_init[i].name, NULL);
  171. if (!s2mps11_clks[i].lookup) {
  172. ret = -ENOMEM;
  173. goto err_reg;
  174. }
  175. clk_data->hws[i] = &s2mps11_clks[i].hw;
  176. }
  177. clk_data->num = S2MPS11_CLKS_NUM;
  178. of_clk_add_hw_provider(s2mps11_clks->clk_np, of_clk_hw_onecell_get,
  179. clk_data);
  180. platform_set_drvdata(pdev, s2mps11_clks);
  181. return ret;
  182. err_reg:
  183. while (--i >= 0)
  184. clkdev_drop(s2mps11_clks[i].lookup);
  185. return ret;
  186. }
  187. static int s2mps11_clk_remove(struct platform_device *pdev)
  188. {
  189. struct s2mps11_clk *s2mps11_clks = platform_get_drvdata(pdev);
  190. int i;
  191. of_clk_del_provider(s2mps11_clks[0].clk_np);
  192. /* Drop the reference obtained in s2mps11_clk_parse_dt */
  193. of_node_put(s2mps11_clks[0].clk_np);
  194. for (i = 0; i < S2MPS11_CLKS_NUM; i++) {
  195. /* Skip clocks not present on S2MPS14 */
  196. if (!s2mps11_clks[i].lookup)
  197. continue;
  198. clkdev_drop(s2mps11_clks[i].lookup);
  199. }
  200. return 0;
  201. }
  202. static const struct platform_device_id s2mps11_clk_id[] = {
  203. { "s2mps11-clk", S2MPS11X},
  204. { "s2mps13-clk", S2MPS13X},
  205. { "s2mps14-clk", S2MPS14X},
  206. { "s5m8767-clk", S5M8767X},
  207. { },
  208. };
  209. MODULE_DEVICE_TABLE(platform, s2mps11_clk_id);
  210. static struct platform_driver s2mps11_clk_driver = {
  211. .driver = {
  212. .name = "s2mps11-clk",
  213. },
  214. .probe = s2mps11_clk_probe,
  215. .remove = s2mps11_clk_remove,
  216. .id_table = s2mps11_clk_id,
  217. };
  218. static int __init s2mps11_clk_init(void)
  219. {
  220. return platform_driver_register(&s2mps11_clk_driver);
  221. }
  222. subsys_initcall(s2mps11_clk_init);
  223. static void __exit s2mps11_clk_cleanup(void)
  224. {
  225. platform_driver_unregister(&s2mps11_clk_driver);
  226. }
  227. module_exit(s2mps11_clk_cleanup);
  228. MODULE_DESCRIPTION("S2MPS11 Clock Driver");
  229. MODULE_AUTHOR("Yadwinder Singh Brar <yadi.brar@samsung.com>");
  230. MODULE_LICENSE("GPL");