clk-gpio.c 7.8 KB

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  1. /*
  2. * Copyright (C) 2013 - 2014 Texas Instruments Incorporated - http://www.ti.com
  3. *
  4. * Authors:
  5. * Jyri Sarha <jsarha@ti.com>
  6. * Sergej Sawazki <ce3a@gmx.de>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. * Gpio controlled clock implementation
  13. */
  14. #include <linux/clk-provider.h>
  15. #include <linux/export.h>
  16. #include <linux/slab.h>
  17. #include <linux/gpio.h>
  18. #include <linux/gpio/consumer.h>
  19. #include <linux/of_gpio.h>
  20. #include <linux/err.h>
  21. #include <linux/device.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/of_device.h>
  24. /**
  25. * DOC: basic gpio gated clock which can be enabled and disabled
  26. * with gpio output
  27. * Traits of this clock:
  28. * prepare - clk_(un)prepare only ensures parent is (un)prepared
  29. * enable - clk_enable and clk_disable are functional & control gpio
  30. * rate - inherits rate from parent. No clk_set_rate support
  31. * parent - fixed parent. No clk_set_parent support
  32. */
  33. static int clk_gpio_gate_enable(struct clk_hw *hw)
  34. {
  35. struct clk_gpio *clk = to_clk_gpio(hw);
  36. gpiod_set_value(clk->gpiod, 1);
  37. return 0;
  38. }
  39. static void clk_gpio_gate_disable(struct clk_hw *hw)
  40. {
  41. struct clk_gpio *clk = to_clk_gpio(hw);
  42. gpiod_set_value(clk->gpiod, 0);
  43. }
  44. static int clk_gpio_gate_is_enabled(struct clk_hw *hw)
  45. {
  46. struct clk_gpio *clk = to_clk_gpio(hw);
  47. return gpiod_get_value(clk->gpiod);
  48. }
  49. const struct clk_ops clk_gpio_gate_ops = {
  50. .enable = clk_gpio_gate_enable,
  51. .disable = clk_gpio_gate_disable,
  52. .is_enabled = clk_gpio_gate_is_enabled,
  53. };
  54. EXPORT_SYMBOL_GPL(clk_gpio_gate_ops);
  55. /**
  56. * DOC: basic clock multiplexer which can be controlled with a gpio output
  57. * Traits of this clock:
  58. * prepare - clk_prepare only ensures that parents are prepared
  59. * rate - rate is only affected by parent switching. No clk_set_rate support
  60. * parent - parent is adjustable through clk_set_parent
  61. */
  62. static u8 clk_gpio_mux_get_parent(struct clk_hw *hw)
  63. {
  64. struct clk_gpio *clk = to_clk_gpio(hw);
  65. return gpiod_get_value(clk->gpiod);
  66. }
  67. static int clk_gpio_mux_set_parent(struct clk_hw *hw, u8 index)
  68. {
  69. struct clk_gpio *clk = to_clk_gpio(hw);
  70. gpiod_set_value(clk->gpiod, index);
  71. return 0;
  72. }
  73. const struct clk_ops clk_gpio_mux_ops = {
  74. .get_parent = clk_gpio_mux_get_parent,
  75. .set_parent = clk_gpio_mux_set_parent,
  76. .determine_rate = __clk_mux_determine_rate,
  77. };
  78. EXPORT_SYMBOL_GPL(clk_gpio_mux_ops);
  79. static struct clk_hw *clk_register_gpio(struct device *dev, const char *name,
  80. const char * const *parent_names, u8 num_parents, unsigned gpio,
  81. bool active_low, unsigned long flags,
  82. const struct clk_ops *clk_gpio_ops)
  83. {
  84. struct clk_gpio *clk_gpio;
  85. struct clk_hw *hw;
  86. struct clk_init_data init = {};
  87. unsigned long gpio_flags;
  88. int err;
  89. if (dev)
  90. clk_gpio = devm_kzalloc(dev, sizeof(*clk_gpio), GFP_KERNEL);
  91. else
  92. clk_gpio = kzalloc(sizeof(*clk_gpio), GFP_KERNEL);
  93. if (!clk_gpio)
  94. return ERR_PTR(-ENOMEM);
  95. if (active_low)
  96. gpio_flags = GPIOF_ACTIVE_LOW | GPIOF_OUT_INIT_HIGH;
  97. else
  98. gpio_flags = GPIOF_OUT_INIT_LOW;
  99. if (dev)
  100. err = devm_gpio_request_one(dev, gpio, gpio_flags, name);
  101. else
  102. err = gpio_request_one(gpio, gpio_flags, name);
  103. if (err) {
  104. if (err != -EPROBE_DEFER)
  105. pr_err("%s: %s: Error requesting clock control gpio %u\n",
  106. __func__, name, gpio);
  107. if (!dev)
  108. kfree(clk_gpio);
  109. return ERR_PTR(err);
  110. }
  111. init.name = name;
  112. init.ops = clk_gpio_ops;
  113. init.flags = flags | CLK_IS_BASIC;
  114. init.parent_names = parent_names;
  115. init.num_parents = num_parents;
  116. clk_gpio->gpiod = gpio_to_desc(gpio);
  117. clk_gpio->hw.init = &init;
  118. hw = &clk_gpio->hw;
  119. if (dev)
  120. err = devm_clk_hw_register(dev, hw);
  121. else
  122. err = clk_hw_register(NULL, hw);
  123. if (!err)
  124. return hw;
  125. if (!dev) {
  126. gpiod_put(clk_gpio->gpiod);
  127. kfree(clk_gpio);
  128. }
  129. return ERR_PTR(err);
  130. }
  131. /**
  132. * clk_hw_register_gpio_gate - register a gpio clock gate with the clock
  133. * framework
  134. * @dev: device that is registering this clock
  135. * @name: name of this clock
  136. * @parent_name: name of this clock's parent
  137. * @gpio: gpio number to gate this clock
  138. * @active_low: true if gpio should be set to 0 to enable clock
  139. * @flags: clock flags
  140. */
  141. struct clk_hw *clk_hw_register_gpio_gate(struct device *dev, const char *name,
  142. const char *parent_name, unsigned gpio, bool active_low,
  143. unsigned long flags)
  144. {
  145. return clk_register_gpio(dev, name,
  146. (parent_name ? &parent_name : NULL),
  147. (parent_name ? 1 : 0), gpio, active_low, flags,
  148. &clk_gpio_gate_ops);
  149. }
  150. EXPORT_SYMBOL_GPL(clk_hw_register_gpio_gate);
  151. struct clk *clk_register_gpio_gate(struct device *dev, const char *name,
  152. const char *parent_name, unsigned gpio, bool active_low,
  153. unsigned long flags)
  154. {
  155. struct clk_hw *hw;
  156. hw = clk_hw_register_gpio_gate(dev, name, parent_name, gpio, active_low,
  157. flags);
  158. if (IS_ERR(hw))
  159. return ERR_CAST(hw);
  160. return hw->clk;
  161. }
  162. EXPORT_SYMBOL_GPL(clk_register_gpio_gate);
  163. /**
  164. * clk_hw_register_gpio_mux - register a gpio clock mux with the clock framework
  165. * @dev: device that is registering this clock
  166. * @name: name of this clock
  167. * @parent_names: names of this clock's parents
  168. * @num_parents: number of parents listed in @parent_names
  169. * @gpio: gpio number to gate this clock
  170. * @active_low: true if gpio should be set to 0 to enable clock
  171. * @flags: clock flags
  172. */
  173. struct clk_hw *clk_hw_register_gpio_mux(struct device *dev, const char *name,
  174. const char * const *parent_names, u8 num_parents, unsigned gpio,
  175. bool active_low, unsigned long flags)
  176. {
  177. if (num_parents != 2) {
  178. pr_err("mux-clock %s must have 2 parents\n", name);
  179. return ERR_PTR(-EINVAL);
  180. }
  181. return clk_register_gpio(dev, name, parent_names, num_parents,
  182. gpio, active_low, flags, &clk_gpio_mux_ops);
  183. }
  184. EXPORT_SYMBOL_GPL(clk_hw_register_gpio_mux);
  185. struct clk *clk_register_gpio_mux(struct device *dev, const char *name,
  186. const char * const *parent_names, u8 num_parents, unsigned gpio,
  187. bool active_low, unsigned long flags)
  188. {
  189. struct clk_hw *hw;
  190. hw = clk_hw_register_gpio_mux(dev, name, parent_names, num_parents,
  191. gpio, active_low, flags);
  192. if (IS_ERR(hw))
  193. return ERR_CAST(hw);
  194. return hw->clk;
  195. }
  196. EXPORT_SYMBOL_GPL(clk_register_gpio_mux);
  197. static int gpio_clk_driver_probe(struct platform_device *pdev)
  198. {
  199. struct device_node *node = pdev->dev.of_node;
  200. const char **parent_names, *gpio_name;
  201. unsigned int num_parents;
  202. int gpio;
  203. enum of_gpio_flags of_flags;
  204. struct clk *clk;
  205. bool active_low, is_mux;
  206. num_parents = of_clk_get_parent_count(node);
  207. if (num_parents) {
  208. parent_names = devm_kcalloc(&pdev->dev, num_parents,
  209. sizeof(char *), GFP_KERNEL);
  210. if (!parent_names)
  211. return -ENOMEM;
  212. of_clk_parent_fill(node, parent_names, num_parents);
  213. } else {
  214. parent_names = NULL;
  215. }
  216. is_mux = of_device_is_compatible(node, "gpio-mux-clock");
  217. gpio_name = is_mux ? "select-gpios" : "enable-gpios";
  218. gpio = of_get_named_gpio_flags(node, gpio_name, 0, &of_flags);
  219. if (gpio < 0) {
  220. if (gpio == -EPROBE_DEFER)
  221. pr_debug("%s: %s: GPIOs not yet available, retry later\n",
  222. node->name, __func__);
  223. else
  224. pr_err("%s: %s: Can't get '%s' DT property\n",
  225. node->name, __func__,
  226. gpio_name);
  227. return gpio;
  228. }
  229. active_low = of_flags & OF_GPIO_ACTIVE_LOW;
  230. if (is_mux)
  231. clk = clk_register_gpio_mux(&pdev->dev, node->name,
  232. parent_names, num_parents, gpio, active_low, 0);
  233. else
  234. clk = clk_register_gpio_gate(&pdev->dev, node->name,
  235. parent_names ? parent_names[0] : NULL, gpio,
  236. active_low, 0);
  237. if (IS_ERR(clk))
  238. return PTR_ERR(clk);
  239. return of_clk_add_provider(node, of_clk_src_simple_get, clk);
  240. }
  241. static const struct of_device_id gpio_clk_match_table[] = {
  242. { .compatible = "gpio-mux-clock" },
  243. { .compatible = "gpio-gate-clock" },
  244. { }
  245. };
  246. static struct platform_driver gpio_clk_driver = {
  247. .probe = gpio_clk_driver_probe,
  248. .driver = {
  249. .name = "gpio-clk",
  250. .of_match_table = gpio_clk_match_table,
  251. },
  252. };
  253. builtin_platform_driver(gpio_clk_driver);