smp.c 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609
  1. /*
  2. * Xtensa SMP support functions.
  3. *
  4. * This file is subject to the terms and conditions of the GNU General Public
  5. * License. See the file "COPYING" in the main directory of this archive
  6. * for more details.
  7. *
  8. * Copyright (C) 2008 - 2013 Tensilica Inc.
  9. *
  10. * Chris Zankel <chris@zankel.net>
  11. * Joe Taylor <joe@tensilica.com>
  12. * Pete Delaney <piet@tensilica.com
  13. */
  14. #include <linux/cpu.h>
  15. #include <linux/cpumask.h>
  16. #include <linux/delay.h>
  17. #include <linux/init.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/irqdomain.h>
  20. #include <linux/irq.h>
  21. #include <linux/kdebug.h>
  22. #include <linux/module.h>
  23. #include <linux/reboot.h>
  24. #include <linux/seq_file.h>
  25. #include <linux/smp.h>
  26. #include <linux/thread_info.h>
  27. #include <asm/cacheflush.h>
  28. #include <asm/kdebug.h>
  29. #include <asm/mmu_context.h>
  30. #include <asm/mxregs.h>
  31. #include <asm/platform.h>
  32. #include <asm/tlbflush.h>
  33. #include <asm/traps.h>
  34. #ifdef CONFIG_SMP
  35. # if XCHAL_HAVE_S32C1I == 0
  36. # error "The S32C1I option is required for SMP."
  37. # endif
  38. #endif
  39. static void system_invalidate_dcache_range(unsigned long start,
  40. unsigned long size);
  41. static void system_flush_invalidate_dcache_range(unsigned long start,
  42. unsigned long size);
  43. /* IPI (Inter Process Interrupt) */
  44. #define IPI_IRQ 0
  45. static irqreturn_t ipi_interrupt(int irq, void *dev_id);
  46. static struct irqaction ipi_irqaction = {
  47. .handler = ipi_interrupt,
  48. .flags = IRQF_PERCPU,
  49. .name = "ipi",
  50. };
  51. void ipi_init(void)
  52. {
  53. unsigned irq = irq_create_mapping(NULL, IPI_IRQ);
  54. setup_irq(irq, &ipi_irqaction);
  55. }
  56. static inline unsigned int get_core_count(void)
  57. {
  58. /* Bits 18..21 of SYSCFGID contain the core count minus 1. */
  59. unsigned int syscfgid = get_er(SYSCFGID);
  60. return ((syscfgid >> 18) & 0xf) + 1;
  61. }
  62. static inline int get_core_id(void)
  63. {
  64. /* Bits 0...18 of SYSCFGID contain the core id */
  65. unsigned int core_id = get_er(SYSCFGID);
  66. return core_id & 0x3fff;
  67. }
  68. void __init smp_prepare_cpus(unsigned int max_cpus)
  69. {
  70. unsigned i;
  71. for (i = 0; i < max_cpus; ++i)
  72. set_cpu_present(i, true);
  73. }
  74. void __init smp_init_cpus(void)
  75. {
  76. unsigned i;
  77. unsigned int ncpus = get_core_count();
  78. unsigned int core_id = get_core_id();
  79. pr_info("%s: Core Count = %d\n", __func__, ncpus);
  80. pr_info("%s: Core Id = %d\n", __func__, core_id);
  81. for (i = 0; i < ncpus; ++i)
  82. set_cpu_possible(i, true);
  83. }
  84. void __init smp_prepare_boot_cpu(void)
  85. {
  86. unsigned int cpu = smp_processor_id();
  87. BUG_ON(cpu != 0);
  88. cpu_asid_cache(cpu) = ASID_USER_FIRST;
  89. }
  90. void __init smp_cpus_done(unsigned int max_cpus)
  91. {
  92. }
  93. static int boot_secondary_processors = 1; /* Set with xt-gdb via .xt-gdb */
  94. static DECLARE_COMPLETION(cpu_running);
  95. void secondary_start_kernel(void)
  96. {
  97. struct mm_struct *mm = &init_mm;
  98. unsigned int cpu = smp_processor_id();
  99. init_mmu();
  100. #ifdef CONFIG_DEBUG_KERNEL
  101. if (boot_secondary_processors == 0) {
  102. pr_debug("%s: boot_secondary_processors:%d; Hanging cpu:%d\n",
  103. __func__, boot_secondary_processors, cpu);
  104. for (;;)
  105. __asm__ __volatile__ ("waiti " __stringify(LOCKLEVEL));
  106. }
  107. pr_debug("%s: boot_secondary_processors:%d; Booting cpu:%d\n",
  108. __func__, boot_secondary_processors, cpu);
  109. #endif
  110. /* Init EXCSAVE1 */
  111. secondary_trap_init();
  112. /* All kernel threads share the same mm context. */
  113. atomic_inc(&mm->mm_users);
  114. atomic_inc(&mm->mm_count);
  115. current->active_mm = mm;
  116. cpumask_set_cpu(cpu, mm_cpumask(mm));
  117. enter_lazy_tlb(mm, current);
  118. preempt_disable();
  119. trace_hardirqs_off();
  120. calibrate_delay();
  121. notify_cpu_starting(cpu);
  122. secondary_init_irq();
  123. local_timer_setup(cpu);
  124. set_cpu_online(cpu, true);
  125. local_irq_enable();
  126. complete(&cpu_running);
  127. cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
  128. }
  129. static void mx_cpu_start(void *p)
  130. {
  131. unsigned cpu = (unsigned)p;
  132. unsigned long run_stall_mask = get_er(MPSCORE);
  133. set_er(run_stall_mask & ~(1u << cpu), MPSCORE);
  134. pr_debug("%s: cpu: %d, run_stall_mask: %lx ---> %lx\n",
  135. __func__, cpu, run_stall_mask, get_er(MPSCORE));
  136. }
  137. static void mx_cpu_stop(void *p)
  138. {
  139. unsigned cpu = (unsigned)p;
  140. unsigned long run_stall_mask = get_er(MPSCORE);
  141. set_er(run_stall_mask | (1u << cpu), MPSCORE);
  142. pr_debug("%s: cpu: %d, run_stall_mask: %lx ---> %lx\n",
  143. __func__, cpu, run_stall_mask, get_er(MPSCORE));
  144. }
  145. #ifdef CONFIG_HOTPLUG_CPU
  146. unsigned long cpu_start_id __cacheline_aligned;
  147. #endif
  148. unsigned long cpu_start_ccount;
  149. static int boot_secondary(unsigned int cpu, struct task_struct *ts)
  150. {
  151. unsigned long timeout = jiffies + msecs_to_jiffies(1000);
  152. unsigned long ccount;
  153. int i;
  154. #ifdef CONFIG_HOTPLUG_CPU
  155. cpu_start_id = cpu;
  156. system_flush_invalidate_dcache_range(
  157. (unsigned long)&cpu_start_id, sizeof(cpu_start_id));
  158. #endif
  159. smp_call_function_single(0, mx_cpu_start, (void *)cpu, 1);
  160. for (i = 0; i < 2; ++i) {
  161. do
  162. ccount = get_ccount();
  163. while (!ccount);
  164. cpu_start_ccount = ccount;
  165. while (time_before(jiffies, timeout)) {
  166. mb();
  167. if (!cpu_start_ccount)
  168. break;
  169. }
  170. if (cpu_start_ccount) {
  171. smp_call_function_single(0, mx_cpu_stop,
  172. (void *)cpu, 1);
  173. cpu_start_ccount = 0;
  174. return -EIO;
  175. }
  176. }
  177. return 0;
  178. }
  179. int __cpu_up(unsigned int cpu, struct task_struct *idle)
  180. {
  181. int ret = 0;
  182. if (cpu_asid_cache(cpu) == 0)
  183. cpu_asid_cache(cpu) = ASID_USER_FIRST;
  184. start_info.stack = (unsigned long)task_pt_regs(idle);
  185. wmb();
  186. pr_debug("%s: Calling wakeup_secondary(cpu:%d, idle:%p, sp: %08lx)\n",
  187. __func__, cpu, idle, start_info.stack);
  188. ret = boot_secondary(cpu, idle);
  189. if (ret == 0) {
  190. wait_for_completion_timeout(&cpu_running,
  191. msecs_to_jiffies(1000));
  192. if (!cpu_online(cpu))
  193. ret = -EIO;
  194. }
  195. if (ret)
  196. pr_err("CPU %u failed to boot\n", cpu);
  197. return ret;
  198. }
  199. #ifdef CONFIG_HOTPLUG_CPU
  200. /*
  201. * __cpu_disable runs on the processor to be shutdown.
  202. */
  203. int __cpu_disable(void)
  204. {
  205. unsigned int cpu = smp_processor_id();
  206. /*
  207. * Take this CPU offline. Once we clear this, we can't return,
  208. * and we must not schedule until we're ready to give up the cpu.
  209. */
  210. set_cpu_online(cpu, false);
  211. /*
  212. * OK - migrate IRQs away from this CPU
  213. */
  214. migrate_irqs();
  215. /*
  216. * Flush user cache and TLB mappings, and then remove this CPU
  217. * from the vm mask set of all processes.
  218. */
  219. local_flush_cache_all();
  220. local_flush_tlb_all();
  221. invalidate_page_directory();
  222. clear_tasks_mm_cpumask(cpu);
  223. return 0;
  224. }
  225. static void platform_cpu_kill(unsigned int cpu)
  226. {
  227. smp_call_function_single(0, mx_cpu_stop, (void *)cpu, true);
  228. }
  229. /*
  230. * called on the thread which is asking for a CPU to be shutdown -
  231. * waits until shutdown has completed, or it is timed out.
  232. */
  233. void __cpu_die(unsigned int cpu)
  234. {
  235. unsigned long timeout = jiffies + msecs_to_jiffies(1000);
  236. while (time_before(jiffies, timeout)) {
  237. system_invalidate_dcache_range((unsigned long)&cpu_start_id,
  238. sizeof(cpu_start_id));
  239. if (cpu_start_id == -cpu) {
  240. platform_cpu_kill(cpu);
  241. return;
  242. }
  243. }
  244. pr_err("CPU%u: unable to kill\n", cpu);
  245. }
  246. void arch_cpu_idle_dead(void)
  247. {
  248. cpu_die();
  249. }
  250. /*
  251. * Called from the idle thread for the CPU which has been shutdown.
  252. *
  253. * Note that we disable IRQs here, but do not re-enable them
  254. * before returning to the caller. This is also the behaviour
  255. * of the other hotplug-cpu capable cores, so presumably coming
  256. * out of idle fixes this.
  257. */
  258. void __ref cpu_die(void)
  259. {
  260. idle_task_exit();
  261. local_irq_disable();
  262. __asm__ __volatile__(
  263. " movi a2, cpu_restart\n"
  264. " jx a2\n");
  265. }
  266. #endif /* CONFIG_HOTPLUG_CPU */
  267. enum ipi_msg_type {
  268. IPI_RESCHEDULE = 0,
  269. IPI_CALL_FUNC,
  270. IPI_CPU_STOP,
  271. IPI_MAX
  272. };
  273. static const struct {
  274. const char *short_text;
  275. const char *long_text;
  276. } ipi_text[] = {
  277. { .short_text = "RES", .long_text = "Rescheduling interrupts" },
  278. { .short_text = "CAL", .long_text = "Function call interrupts" },
  279. { .short_text = "DIE", .long_text = "CPU shutdown interrupts" },
  280. };
  281. struct ipi_data {
  282. unsigned long ipi_count[IPI_MAX];
  283. };
  284. static DEFINE_PER_CPU(struct ipi_data, ipi_data);
  285. static void send_ipi_message(const struct cpumask *callmask,
  286. enum ipi_msg_type msg_id)
  287. {
  288. int index;
  289. unsigned long mask = 0;
  290. for_each_cpu(index, callmask)
  291. if (index != smp_processor_id())
  292. mask |= 1 << index;
  293. set_er(mask, MIPISET(msg_id));
  294. }
  295. void arch_send_call_function_ipi_mask(const struct cpumask *mask)
  296. {
  297. send_ipi_message(mask, IPI_CALL_FUNC);
  298. }
  299. void arch_send_call_function_single_ipi(int cpu)
  300. {
  301. send_ipi_message(cpumask_of(cpu), IPI_CALL_FUNC);
  302. }
  303. void smp_send_reschedule(int cpu)
  304. {
  305. send_ipi_message(cpumask_of(cpu), IPI_RESCHEDULE);
  306. }
  307. void smp_send_stop(void)
  308. {
  309. struct cpumask targets;
  310. cpumask_copy(&targets, cpu_online_mask);
  311. cpumask_clear_cpu(smp_processor_id(), &targets);
  312. send_ipi_message(&targets, IPI_CPU_STOP);
  313. }
  314. static void ipi_cpu_stop(unsigned int cpu)
  315. {
  316. set_cpu_online(cpu, false);
  317. machine_halt();
  318. }
  319. irqreturn_t ipi_interrupt(int irq, void *dev_id)
  320. {
  321. unsigned int cpu = smp_processor_id();
  322. struct ipi_data *ipi = &per_cpu(ipi_data, cpu);
  323. unsigned int msg;
  324. unsigned i;
  325. msg = get_er(MIPICAUSE(cpu));
  326. for (i = 0; i < IPI_MAX; i++)
  327. if (msg & (1 << i)) {
  328. set_er(1 << i, MIPICAUSE(cpu));
  329. ++ipi->ipi_count[i];
  330. }
  331. if (msg & (1 << IPI_RESCHEDULE))
  332. scheduler_ipi();
  333. if (msg & (1 << IPI_CALL_FUNC))
  334. generic_smp_call_function_interrupt();
  335. if (msg & (1 << IPI_CPU_STOP))
  336. ipi_cpu_stop(cpu);
  337. return IRQ_HANDLED;
  338. }
  339. void show_ipi_list(struct seq_file *p, int prec)
  340. {
  341. unsigned int cpu;
  342. unsigned i;
  343. for (i = 0; i < IPI_MAX; ++i) {
  344. seq_printf(p, "%*s:", prec, ipi_text[i].short_text);
  345. for_each_online_cpu(cpu)
  346. seq_printf(p, " %10lu",
  347. per_cpu(ipi_data, cpu).ipi_count[i]);
  348. seq_printf(p, " %s\n", ipi_text[i].long_text);
  349. }
  350. }
  351. int setup_profiling_timer(unsigned int multiplier)
  352. {
  353. pr_debug("setup_profiling_timer %d\n", multiplier);
  354. return 0;
  355. }
  356. /* TLB flush functions */
  357. struct flush_data {
  358. struct vm_area_struct *vma;
  359. unsigned long addr1;
  360. unsigned long addr2;
  361. };
  362. static void ipi_flush_tlb_all(void *arg)
  363. {
  364. local_flush_tlb_all();
  365. }
  366. void flush_tlb_all(void)
  367. {
  368. on_each_cpu(ipi_flush_tlb_all, NULL, 1);
  369. }
  370. static void ipi_flush_tlb_mm(void *arg)
  371. {
  372. local_flush_tlb_mm(arg);
  373. }
  374. void flush_tlb_mm(struct mm_struct *mm)
  375. {
  376. on_each_cpu(ipi_flush_tlb_mm, mm, 1);
  377. }
  378. static void ipi_flush_tlb_page(void *arg)
  379. {
  380. struct flush_data *fd = arg;
  381. local_flush_tlb_page(fd->vma, fd->addr1);
  382. }
  383. void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr)
  384. {
  385. struct flush_data fd = {
  386. .vma = vma,
  387. .addr1 = addr,
  388. };
  389. on_each_cpu(ipi_flush_tlb_page, &fd, 1);
  390. }
  391. static void ipi_flush_tlb_range(void *arg)
  392. {
  393. struct flush_data *fd = arg;
  394. local_flush_tlb_range(fd->vma, fd->addr1, fd->addr2);
  395. }
  396. void flush_tlb_range(struct vm_area_struct *vma,
  397. unsigned long start, unsigned long end)
  398. {
  399. struct flush_data fd = {
  400. .vma = vma,
  401. .addr1 = start,
  402. .addr2 = end,
  403. };
  404. on_each_cpu(ipi_flush_tlb_range, &fd, 1);
  405. }
  406. static void ipi_flush_tlb_kernel_range(void *arg)
  407. {
  408. struct flush_data *fd = arg;
  409. local_flush_tlb_kernel_range(fd->addr1, fd->addr2);
  410. }
  411. void flush_tlb_kernel_range(unsigned long start, unsigned long end)
  412. {
  413. struct flush_data fd = {
  414. .addr1 = start,
  415. .addr2 = end,
  416. };
  417. on_each_cpu(ipi_flush_tlb_kernel_range, &fd, 1);
  418. }
  419. /* Cache flush functions */
  420. static void ipi_flush_cache_all(void *arg)
  421. {
  422. local_flush_cache_all();
  423. }
  424. void flush_cache_all(void)
  425. {
  426. on_each_cpu(ipi_flush_cache_all, NULL, 1);
  427. }
  428. static void ipi_flush_cache_page(void *arg)
  429. {
  430. struct flush_data *fd = arg;
  431. local_flush_cache_page(fd->vma, fd->addr1, fd->addr2);
  432. }
  433. void flush_cache_page(struct vm_area_struct *vma,
  434. unsigned long address, unsigned long pfn)
  435. {
  436. struct flush_data fd = {
  437. .vma = vma,
  438. .addr1 = address,
  439. .addr2 = pfn,
  440. };
  441. on_each_cpu(ipi_flush_cache_page, &fd, 1);
  442. }
  443. static void ipi_flush_cache_range(void *arg)
  444. {
  445. struct flush_data *fd = arg;
  446. local_flush_cache_range(fd->vma, fd->addr1, fd->addr2);
  447. }
  448. void flush_cache_range(struct vm_area_struct *vma,
  449. unsigned long start, unsigned long end)
  450. {
  451. struct flush_data fd = {
  452. .vma = vma,
  453. .addr1 = start,
  454. .addr2 = end,
  455. };
  456. on_each_cpu(ipi_flush_cache_range, &fd, 1);
  457. }
  458. static void ipi_flush_icache_range(void *arg)
  459. {
  460. struct flush_data *fd = arg;
  461. local_flush_icache_range(fd->addr1, fd->addr2);
  462. }
  463. void flush_icache_range(unsigned long start, unsigned long end)
  464. {
  465. struct flush_data fd = {
  466. .addr1 = start,
  467. .addr2 = end,
  468. };
  469. on_each_cpu(ipi_flush_icache_range, &fd, 1);
  470. }
  471. EXPORT_SYMBOL(flush_icache_range);
  472. /* ------------------------------------------------------------------------- */
  473. static void ipi_invalidate_dcache_range(void *arg)
  474. {
  475. struct flush_data *fd = arg;
  476. __invalidate_dcache_range(fd->addr1, fd->addr2);
  477. }
  478. static void system_invalidate_dcache_range(unsigned long start,
  479. unsigned long size)
  480. {
  481. struct flush_data fd = {
  482. .addr1 = start,
  483. .addr2 = size,
  484. };
  485. on_each_cpu(ipi_invalidate_dcache_range, &fd, 1);
  486. }
  487. static void ipi_flush_invalidate_dcache_range(void *arg)
  488. {
  489. struct flush_data *fd = arg;
  490. __flush_invalidate_dcache_range(fd->addr1, fd->addr2);
  491. }
  492. static void system_flush_invalidate_dcache_range(unsigned long start,
  493. unsigned long size)
  494. {
  495. struct flush_data fd = {
  496. .addr1 = start,
  497. .addr2 = size,
  498. };
  499. on_each_cpu(ipi_flush_invalidate_dcache_range, &fd, 1);
  500. }