csp.dts 1.0 KB

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  1. /dts-v1/;
  2. / {
  3. compatible = "cdns,xtensa-xtfpga";
  4. #address-cells = <1>;
  5. #size-cells = <1>;
  6. interrupt-parent = <&pic>;
  7. chosen {
  8. bootargs = "earlycon=cdns,0xfd000000,115200 console=tty0 console=ttyPS0,115200 root=/dev/ram0 rw earlyprintk xilinx_uartps.rx_trigger_level=32 loglevel=8 nohz=off ignore_loglevel";
  9. };
  10. memory@0 {
  11. device_type = "memory";
  12. reg = <0x00000000 0x40000000>;
  13. };
  14. cpus {
  15. #address-cells = <1>;
  16. #size-cells = <0>;
  17. cpu@0 {
  18. compatible = "cdns,xtensa-cpu";
  19. reg = <0>;
  20. };
  21. };
  22. pic: pic {
  23. compatible = "cdns,xtensa-pic";
  24. #interrupt-cells = <2>;
  25. interrupt-controller;
  26. };
  27. clocks {
  28. osc: main-oscillator {
  29. #clock-cells = <0>;
  30. compatible = "fixed-clock";
  31. };
  32. };
  33. soc {
  34. #address-cells = <1>;
  35. #size-cells = <1>;
  36. compatible = "simple-bus";
  37. ranges = <0x00000000 0xf0000000 0x10000000>;
  38. uart0: serial@0d000000 {
  39. compatible = "xlnx,xuartps", "cdns,uart-r1p8";
  40. clocks = <&osc>, <&osc>;
  41. clock-names = "uart_clk", "pclk";
  42. reg = <0x0d000000 0x1000>;
  43. interrupts = <0 1>;
  44. };
  45. };
  46. };