errors.c 18 KB

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  1. /*---------------------------------------------------------------------------+
  2. | errors.c |
  3. | |
  4. | The error handling functions for wm-FPU-emu |
  5. | |
  6. | Copyright (C) 1992,1993,1994,1996 |
  7. | W. Metzenthen, 22 Parker St, Ormond, Vic 3163, Australia |
  8. | E-mail billm@jacobi.maths.monash.edu.au |
  9. | |
  10. | |
  11. +---------------------------------------------------------------------------*/
  12. /*---------------------------------------------------------------------------+
  13. | Note: |
  14. | The file contains code which accesses user memory. |
  15. | Emulator static data may change when user memory is accessed, due to |
  16. | other processes using the emulator while swapping is in progress. |
  17. +---------------------------------------------------------------------------*/
  18. #include <linux/signal.h>
  19. #include <asm/uaccess.h>
  20. #include "fpu_emu.h"
  21. #include "fpu_system.h"
  22. #include "exception.h"
  23. #include "status_w.h"
  24. #include "control_w.h"
  25. #include "reg_constant.h"
  26. #include "version.h"
  27. /* */
  28. #undef PRINT_MESSAGES
  29. /* */
  30. #if 0
  31. void Un_impl(void)
  32. {
  33. u_char byte1, FPU_modrm;
  34. unsigned long address = FPU_ORIG_EIP;
  35. RE_ENTRANT_CHECK_OFF;
  36. /* No need to check access_ok(), we have previously fetched these bytes. */
  37. printk("Unimplemented FPU Opcode at eip=%p : ", (void __user *)address);
  38. if (FPU_CS == __USER_CS) {
  39. while (1) {
  40. FPU_get_user(byte1, (u_char __user *) address);
  41. if ((byte1 & 0xf8) == 0xd8)
  42. break;
  43. printk("[%02x]", byte1);
  44. address++;
  45. }
  46. printk("%02x ", byte1);
  47. FPU_get_user(FPU_modrm, 1 + (u_char __user *) address);
  48. if (FPU_modrm >= 0300)
  49. printk("%02x (%02x+%d)\n", FPU_modrm, FPU_modrm & 0xf8,
  50. FPU_modrm & 7);
  51. else
  52. printk("/%d\n", (FPU_modrm >> 3) & 7);
  53. } else {
  54. printk("cs selector = %04x\n", FPU_CS);
  55. }
  56. RE_ENTRANT_CHECK_ON;
  57. EXCEPTION(EX_Invalid);
  58. }
  59. #endif /* 0 */
  60. /*
  61. Called for opcodes which are illegal and which are known to result in a
  62. SIGILL with a real 80486.
  63. */
  64. void FPU_illegal(void)
  65. {
  66. math_abort(FPU_info, SIGILL);
  67. }
  68. void FPU_printall(void)
  69. {
  70. int i;
  71. static const char *tag_desc[] = { "Valid", "Zero", "ERROR", "Empty",
  72. "DeNorm", "Inf", "NaN"
  73. };
  74. u_char byte1, FPU_modrm;
  75. unsigned long address = FPU_ORIG_EIP;
  76. RE_ENTRANT_CHECK_OFF;
  77. /* No need to check access_ok(), we have previously fetched these bytes. */
  78. printk("At %p:", (void *)address);
  79. if (FPU_CS == __USER_CS) {
  80. #define MAX_PRINTED_BYTES 20
  81. for (i = 0; i < MAX_PRINTED_BYTES; i++) {
  82. FPU_get_user(byte1, (u_char __user *) address);
  83. if ((byte1 & 0xf8) == 0xd8) {
  84. printk(" %02x", byte1);
  85. break;
  86. }
  87. printk(" [%02x]", byte1);
  88. address++;
  89. }
  90. if (i == MAX_PRINTED_BYTES)
  91. printk(" [more..]\n");
  92. else {
  93. FPU_get_user(FPU_modrm, 1 + (u_char __user *) address);
  94. if (FPU_modrm >= 0300)
  95. printk(" %02x (%02x+%d)\n", FPU_modrm,
  96. FPU_modrm & 0xf8, FPU_modrm & 7);
  97. else
  98. printk(" /%d, mod=%d rm=%d\n",
  99. (FPU_modrm >> 3) & 7,
  100. (FPU_modrm >> 6) & 3, FPU_modrm & 7);
  101. }
  102. } else {
  103. printk("%04x\n", FPU_CS);
  104. }
  105. partial_status = status_word();
  106. #ifdef DEBUGGING
  107. if (partial_status & SW_Backward)
  108. printk("SW: backward compatibility\n");
  109. if (partial_status & SW_C3)
  110. printk("SW: condition bit 3\n");
  111. if (partial_status & SW_C2)
  112. printk("SW: condition bit 2\n");
  113. if (partial_status & SW_C1)
  114. printk("SW: condition bit 1\n");
  115. if (partial_status & SW_C0)
  116. printk("SW: condition bit 0\n");
  117. if (partial_status & SW_Summary)
  118. printk("SW: exception summary\n");
  119. if (partial_status & SW_Stack_Fault)
  120. printk("SW: stack fault\n");
  121. if (partial_status & SW_Precision)
  122. printk("SW: loss of precision\n");
  123. if (partial_status & SW_Underflow)
  124. printk("SW: underflow\n");
  125. if (partial_status & SW_Overflow)
  126. printk("SW: overflow\n");
  127. if (partial_status & SW_Zero_Div)
  128. printk("SW: divide by zero\n");
  129. if (partial_status & SW_Denorm_Op)
  130. printk("SW: denormalized operand\n");
  131. if (partial_status & SW_Invalid)
  132. printk("SW: invalid operation\n");
  133. #endif /* DEBUGGING */
  134. printk(" SW: b=%d st=%d es=%d sf=%d cc=%d%d%d%d ef=%d%d%d%d%d%d\n", partial_status & 0x8000 ? 1 : 0, /* busy */
  135. (partial_status & 0x3800) >> 11, /* stack top pointer */
  136. partial_status & 0x80 ? 1 : 0, /* Error summary status */
  137. partial_status & 0x40 ? 1 : 0, /* Stack flag */
  138. partial_status & SW_C3 ? 1 : 0, partial_status & SW_C2 ? 1 : 0, /* cc */
  139. partial_status & SW_C1 ? 1 : 0, partial_status & SW_C0 ? 1 : 0, /* cc */
  140. partial_status & SW_Precision ? 1 : 0,
  141. partial_status & SW_Underflow ? 1 : 0,
  142. partial_status & SW_Overflow ? 1 : 0,
  143. partial_status & SW_Zero_Div ? 1 : 0,
  144. partial_status & SW_Denorm_Op ? 1 : 0,
  145. partial_status & SW_Invalid ? 1 : 0);
  146. printk(" CW: ic=%d rc=%d%d pc=%d%d iem=%d ef=%d%d%d%d%d%d\n",
  147. control_word & 0x1000 ? 1 : 0,
  148. (control_word & 0x800) >> 11, (control_word & 0x400) >> 10,
  149. (control_word & 0x200) >> 9, (control_word & 0x100) >> 8,
  150. control_word & 0x80 ? 1 : 0,
  151. control_word & SW_Precision ? 1 : 0,
  152. control_word & SW_Underflow ? 1 : 0,
  153. control_word & SW_Overflow ? 1 : 0,
  154. control_word & SW_Zero_Div ? 1 : 0,
  155. control_word & SW_Denorm_Op ? 1 : 0,
  156. control_word & SW_Invalid ? 1 : 0);
  157. for (i = 0; i < 8; i++) {
  158. FPU_REG *r = &st(i);
  159. u_char tagi = FPU_gettagi(i);
  160. switch (tagi) {
  161. case TAG_Empty:
  162. continue;
  163. break;
  164. case TAG_Zero:
  165. case TAG_Special:
  166. tagi = FPU_Special(r);
  167. case TAG_Valid:
  168. printk("st(%d) %c .%04lx %04lx %04lx %04lx e%+-6d ", i,
  169. getsign(r) ? '-' : '+',
  170. (long)(r->sigh >> 16),
  171. (long)(r->sigh & 0xFFFF),
  172. (long)(r->sigl >> 16),
  173. (long)(r->sigl & 0xFFFF),
  174. exponent(r) - EXP_BIAS + 1);
  175. break;
  176. default:
  177. printk("Whoops! Error in errors.c: tag%d is %d ", i,
  178. tagi);
  179. continue;
  180. break;
  181. }
  182. printk("%s\n", tag_desc[(int)(unsigned)tagi]);
  183. }
  184. RE_ENTRANT_CHECK_ON;
  185. }
  186. static struct {
  187. int type;
  188. const char *name;
  189. } exception_names[] = {
  190. {
  191. EX_StackOver, "stack overflow"}, {
  192. EX_StackUnder, "stack underflow"}, {
  193. EX_Precision, "loss of precision"}, {
  194. EX_Underflow, "underflow"}, {
  195. EX_Overflow, "overflow"}, {
  196. EX_ZeroDiv, "divide by zero"}, {
  197. EX_Denormal, "denormalized operand"}, {
  198. EX_Invalid, "invalid operation"}, {
  199. EX_INTERNAL, "INTERNAL BUG in " FPU_VERSION}, {
  200. 0, NULL}
  201. };
  202. /*
  203. EX_INTERNAL is always given with a code which indicates where the
  204. error was detected.
  205. Internal error types:
  206. 0x14 in fpu_etc.c
  207. 0x1nn in a *.c file:
  208. 0x101 in reg_add_sub.c
  209. 0x102 in reg_mul.c
  210. 0x104 in poly_atan.c
  211. 0x105 in reg_mul.c
  212. 0x107 in fpu_trig.c
  213. 0x108 in reg_compare.c
  214. 0x109 in reg_compare.c
  215. 0x110 in reg_add_sub.c
  216. 0x111 in fpe_entry.c
  217. 0x112 in fpu_trig.c
  218. 0x113 in errors.c
  219. 0x115 in fpu_trig.c
  220. 0x116 in fpu_trig.c
  221. 0x117 in fpu_trig.c
  222. 0x118 in fpu_trig.c
  223. 0x119 in fpu_trig.c
  224. 0x120 in poly_atan.c
  225. 0x121 in reg_compare.c
  226. 0x122 in reg_compare.c
  227. 0x123 in reg_compare.c
  228. 0x125 in fpu_trig.c
  229. 0x126 in fpu_entry.c
  230. 0x127 in poly_2xm1.c
  231. 0x128 in fpu_entry.c
  232. 0x129 in fpu_entry.c
  233. 0x130 in get_address.c
  234. 0x131 in get_address.c
  235. 0x132 in get_address.c
  236. 0x133 in get_address.c
  237. 0x140 in load_store.c
  238. 0x141 in load_store.c
  239. 0x150 in poly_sin.c
  240. 0x151 in poly_sin.c
  241. 0x160 in reg_ld_str.c
  242. 0x161 in reg_ld_str.c
  243. 0x162 in reg_ld_str.c
  244. 0x163 in reg_ld_str.c
  245. 0x164 in reg_ld_str.c
  246. 0x170 in fpu_tags.c
  247. 0x171 in fpu_tags.c
  248. 0x172 in fpu_tags.c
  249. 0x180 in reg_convert.c
  250. 0x2nn in an *.S file:
  251. 0x201 in reg_u_add.S
  252. 0x202 in reg_u_div.S
  253. 0x203 in reg_u_div.S
  254. 0x204 in reg_u_div.S
  255. 0x205 in reg_u_mul.S
  256. 0x206 in reg_u_sub.S
  257. 0x207 in wm_sqrt.S
  258. 0x208 in reg_div.S
  259. 0x209 in reg_u_sub.S
  260. 0x210 in reg_u_sub.S
  261. 0x211 in reg_u_sub.S
  262. 0x212 in reg_u_sub.S
  263. 0x213 in wm_sqrt.S
  264. 0x214 in wm_sqrt.S
  265. 0x215 in wm_sqrt.S
  266. 0x220 in reg_norm.S
  267. 0x221 in reg_norm.S
  268. 0x230 in reg_round.S
  269. 0x231 in reg_round.S
  270. 0x232 in reg_round.S
  271. 0x233 in reg_round.S
  272. 0x234 in reg_round.S
  273. 0x235 in reg_round.S
  274. 0x236 in reg_round.S
  275. 0x240 in div_Xsig.S
  276. 0x241 in div_Xsig.S
  277. 0x242 in div_Xsig.S
  278. */
  279. asmlinkage __visible void FPU_exception(int n)
  280. {
  281. int i, int_type;
  282. int_type = 0; /* Needed only to stop compiler warnings */
  283. if (n & EX_INTERNAL) {
  284. int_type = n - EX_INTERNAL;
  285. n = EX_INTERNAL;
  286. /* Set lots of exception bits! */
  287. partial_status |= (SW_Exc_Mask | SW_Summary | SW_Backward);
  288. } else {
  289. /* Extract only the bits which we use to set the status word */
  290. n &= (SW_Exc_Mask);
  291. /* Set the corresponding exception bit */
  292. partial_status |= n;
  293. /* Set summary bits iff exception isn't masked */
  294. if (partial_status & ~control_word & CW_Exceptions)
  295. partial_status |= (SW_Summary | SW_Backward);
  296. if (n & (SW_Stack_Fault | EX_Precision)) {
  297. if (!(n & SW_C1))
  298. /* This bit distinguishes over- from underflow for a stack fault,
  299. and roundup from round-down for precision loss. */
  300. partial_status &= ~SW_C1;
  301. }
  302. }
  303. RE_ENTRANT_CHECK_OFF;
  304. if ((~control_word & n & CW_Exceptions) || (n == EX_INTERNAL)) {
  305. /* Get a name string for error reporting */
  306. for (i = 0; exception_names[i].type; i++)
  307. if ((exception_names[i].type & n) ==
  308. exception_names[i].type)
  309. break;
  310. if (exception_names[i].type) {
  311. #ifdef PRINT_MESSAGES
  312. printk("FP Exception: %s!\n", exception_names[i].name);
  313. #endif /* PRINT_MESSAGES */
  314. } else
  315. printk("FPU emulator: Unknown Exception: 0x%04x!\n", n);
  316. if (n == EX_INTERNAL) {
  317. printk("FPU emulator: Internal error type 0x%04x\n",
  318. int_type);
  319. FPU_printall();
  320. }
  321. #ifdef PRINT_MESSAGES
  322. else
  323. FPU_printall();
  324. #endif /* PRINT_MESSAGES */
  325. /*
  326. * The 80486 generates an interrupt on the next non-control FPU
  327. * instruction. So we need some means of flagging it.
  328. * We use the ES (Error Summary) bit for this.
  329. */
  330. }
  331. RE_ENTRANT_CHECK_ON;
  332. #ifdef __DEBUG__
  333. math_abort(FPU_info, SIGFPE);
  334. #endif /* __DEBUG__ */
  335. }
  336. /* Real operation attempted on a NaN. */
  337. /* Returns < 0 if the exception is unmasked */
  338. int real_1op_NaN(FPU_REG *a)
  339. {
  340. int signalling, isNaN;
  341. isNaN = (exponent(a) == EXP_OVER) && (a->sigh & 0x80000000);
  342. /* The default result for the case of two "equal" NaNs (signs may
  343. differ) is chosen to reproduce 80486 behaviour */
  344. signalling = isNaN && !(a->sigh & 0x40000000);
  345. if (!signalling) {
  346. if (!isNaN) { /* pseudo-NaN, or other unsupported? */
  347. if (control_word & CW_Invalid) {
  348. /* Masked response */
  349. reg_copy(&CONST_QNaN, a);
  350. }
  351. EXCEPTION(EX_Invalid);
  352. return (!(control_word & CW_Invalid) ? FPU_Exception :
  353. 0) | TAG_Special;
  354. }
  355. return TAG_Special;
  356. }
  357. if (control_word & CW_Invalid) {
  358. /* The masked response */
  359. if (!(a->sigh & 0x80000000)) { /* pseudo-NaN ? */
  360. reg_copy(&CONST_QNaN, a);
  361. }
  362. /* ensure a Quiet NaN */
  363. a->sigh |= 0x40000000;
  364. }
  365. EXCEPTION(EX_Invalid);
  366. return (!(control_word & CW_Invalid) ? FPU_Exception : 0) | TAG_Special;
  367. }
  368. /* Real operation attempted on two operands, one a NaN. */
  369. /* Returns < 0 if the exception is unmasked */
  370. int real_2op_NaN(FPU_REG const *b, u_char tagb,
  371. int deststnr, FPU_REG const *defaultNaN)
  372. {
  373. FPU_REG *dest = &st(deststnr);
  374. FPU_REG const *a = dest;
  375. u_char taga = FPU_gettagi(deststnr);
  376. FPU_REG const *x;
  377. int signalling, unsupported;
  378. if (taga == TAG_Special)
  379. taga = FPU_Special(a);
  380. if (tagb == TAG_Special)
  381. tagb = FPU_Special(b);
  382. /* TW_NaN is also used for unsupported data types. */
  383. unsupported = ((taga == TW_NaN)
  384. && !((exponent(a) == EXP_OVER)
  385. && (a->sigh & 0x80000000)))
  386. || ((tagb == TW_NaN)
  387. && !((exponent(b) == EXP_OVER) && (b->sigh & 0x80000000)));
  388. if (unsupported) {
  389. if (control_word & CW_Invalid) {
  390. /* Masked response */
  391. FPU_copy_to_regi(&CONST_QNaN, TAG_Special, deststnr);
  392. }
  393. EXCEPTION(EX_Invalid);
  394. return (!(control_word & CW_Invalid) ? FPU_Exception : 0) |
  395. TAG_Special;
  396. }
  397. if (taga == TW_NaN) {
  398. x = a;
  399. if (tagb == TW_NaN) {
  400. signalling = !(a->sigh & b->sigh & 0x40000000);
  401. if (significand(b) > significand(a))
  402. x = b;
  403. else if (significand(b) == significand(a)) {
  404. /* The default result for the case of two "equal" NaNs (signs may
  405. differ) is chosen to reproduce 80486 behaviour */
  406. x = defaultNaN;
  407. }
  408. } else {
  409. /* return the quiet version of the NaN in a */
  410. signalling = !(a->sigh & 0x40000000);
  411. }
  412. } else
  413. #ifdef PARANOID
  414. if (tagb == TW_NaN)
  415. #endif /* PARANOID */
  416. {
  417. signalling = !(b->sigh & 0x40000000);
  418. x = b;
  419. }
  420. #ifdef PARANOID
  421. else {
  422. signalling = 0;
  423. EXCEPTION(EX_INTERNAL | 0x113);
  424. x = &CONST_QNaN;
  425. }
  426. #endif /* PARANOID */
  427. if ((!signalling) || (control_word & CW_Invalid)) {
  428. if (!x)
  429. x = b;
  430. if (!(x->sigh & 0x80000000)) /* pseudo-NaN ? */
  431. x = &CONST_QNaN;
  432. FPU_copy_to_regi(x, TAG_Special, deststnr);
  433. if (!signalling)
  434. return TAG_Special;
  435. /* ensure a Quiet NaN */
  436. dest->sigh |= 0x40000000;
  437. }
  438. EXCEPTION(EX_Invalid);
  439. return (!(control_word & CW_Invalid) ? FPU_Exception : 0) | TAG_Special;
  440. }
  441. /* Invalid arith operation on Valid registers */
  442. /* Returns < 0 if the exception is unmasked */
  443. asmlinkage __visible int arith_invalid(int deststnr)
  444. {
  445. EXCEPTION(EX_Invalid);
  446. if (control_word & CW_Invalid) {
  447. /* The masked response */
  448. FPU_copy_to_regi(&CONST_QNaN, TAG_Special, deststnr);
  449. }
  450. return (!(control_word & CW_Invalid) ? FPU_Exception : 0) | TAG_Valid;
  451. }
  452. /* Divide a finite number by zero */
  453. asmlinkage __visible int FPU_divide_by_zero(int deststnr, u_char sign)
  454. {
  455. FPU_REG *dest = &st(deststnr);
  456. int tag = TAG_Valid;
  457. if (control_word & CW_ZeroDiv) {
  458. /* The masked response */
  459. FPU_copy_to_regi(&CONST_INF, TAG_Special, deststnr);
  460. setsign(dest, sign);
  461. tag = TAG_Special;
  462. }
  463. EXCEPTION(EX_ZeroDiv);
  464. return (!(control_word & CW_ZeroDiv) ? FPU_Exception : 0) | tag;
  465. }
  466. /* This may be called often, so keep it lean */
  467. int set_precision_flag(int flags)
  468. {
  469. if (control_word & CW_Precision) {
  470. partial_status &= ~(SW_C1 & flags);
  471. partial_status |= flags; /* The masked response */
  472. return 0;
  473. } else {
  474. EXCEPTION(flags);
  475. return 1;
  476. }
  477. }
  478. /* This may be called often, so keep it lean */
  479. asmlinkage __visible void set_precision_flag_up(void)
  480. {
  481. if (control_word & CW_Precision)
  482. partial_status |= (SW_Precision | SW_C1); /* The masked response */
  483. else
  484. EXCEPTION(EX_Precision | SW_C1);
  485. }
  486. /* This may be called often, so keep it lean */
  487. asmlinkage __visible void set_precision_flag_down(void)
  488. {
  489. if (control_word & CW_Precision) { /* The masked response */
  490. partial_status &= ~SW_C1;
  491. partial_status |= SW_Precision;
  492. } else
  493. EXCEPTION(EX_Precision);
  494. }
  495. asmlinkage __visible int denormal_operand(void)
  496. {
  497. if (control_word & CW_Denormal) { /* The masked response */
  498. partial_status |= SW_Denorm_Op;
  499. return TAG_Special;
  500. } else {
  501. EXCEPTION(EX_Denormal);
  502. return TAG_Special | FPU_Exception;
  503. }
  504. }
  505. asmlinkage __visible int arith_overflow(FPU_REG *dest)
  506. {
  507. int tag = TAG_Valid;
  508. if (control_word & CW_Overflow) {
  509. /* The masked response */
  510. /* ###### The response here depends upon the rounding mode */
  511. reg_copy(&CONST_INF, dest);
  512. tag = TAG_Special;
  513. } else {
  514. /* Subtract the magic number from the exponent */
  515. addexponent(dest, (-3 * (1 << 13)));
  516. }
  517. EXCEPTION(EX_Overflow);
  518. if (control_word & CW_Overflow) {
  519. /* The overflow exception is masked. */
  520. /* By definition, precision is lost.
  521. The roundup bit (C1) is also set because we have
  522. "rounded" upwards to Infinity. */
  523. EXCEPTION(EX_Precision | SW_C1);
  524. return tag;
  525. }
  526. return tag;
  527. }
  528. asmlinkage __visible int arith_underflow(FPU_REG *dest)
  529. {
  530. int tag = TAG_Valid;
  531. if (control_word & CW_Underflow) {
  532. /* The masked response */
  533. if (exponent16(dest) <= EXP_UNDER - 63) {
  534. reg_copy(&CONST_Z, dest);
  535. partial_status &= ~SW_C1; /* Round down. */
  536. tag = TAG_Zero;
  537. } else {
  538. stdexp(dest);
  539. }
  540. } else {
  541. /* Add the magic number to the exponent. */
  542. addexponent(dest, (3 * (1 << 13)) + EXTENDED_Ebias);
  543. }
  544. EXCEPTION(EX_Underflow);
  545. if (control_word & CW_Underflow) {
  546. /* The underflow exception is masked. */
  547. EXCEPTION(EX_Precision);
  548. return tag;
  549. }
  550. return tag;
  551. }
  552. void FPU_stack_overflow(void)
  553. {
  554. if (control_word & CW_Invalid) {
  555. /* The masked response */
  556. top--;
  557. FPU_copy_to_reg0(&CONST_QNaN, TAG_Special);
  558. }
  559. EXCEPTION(EX_StackOver);
  560. return;
  561. }
  562. void FPU_stack_underflow(void)
  563. {
  564. if (control_word & CW_Invalid) {
  565. /* The masked response */
  566. FPU_copy_to_reg0(&CONST_QNaN, TAG_Special);
  567. }
  568. EXCEPTION(EX_StackUnder);
  569. return;
  570. }
  571. void FPU_stack_underflow_i(int i)
  572. {
  573. if (control_word & CW_Invalid) {
  574. /* The masked response */
  575. FPU_copy_to_regi(&CONST_QNaN, TAG_Special, i);
  576. }
  577. EXCEPTION(EX_StackUnder);
  578. return;
  579. }
  580. void FPU_stack_underflow_pop(int i)
  581. {
  582. if (control_word & CW_Invalid) {
  583. /* The masked response */
  584. FPU_copy_to_regi(&CONST_QNaN, TAG_Special, i);
  585. FPU_pop();
  586. }
  587. EXCEPTION(EX_StackUnder);
  588. return;
  589. }