common.c 2.9 KB

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  1. /*
  2. * Routines common to most mpc85xx-based boards.
  3. *
  4. * This is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. #include <linux/of_irq.h>
  9. #include <linux/of_platform.h>
  10. #include <asm/fsl_pm.h>
  11. #include <soc/fsl/qe/qe.h>
  12. #include <sysdev/cpm2_pic.h>
  13. #include "mpc85xx.h"
  14. const struct fsl_pm_ops *qoriq_pm_ops;
  15. static const struct of_device_id mpc85xx_common_ids[] __initconst = {
  16. { .type = "soc", },
  17. { .compatible = "soc", },
  18. { .compatible = "simple-bus", },
  19. { .name = "cpm", },
  20. { .name = "localbus", },
  21. { .compatible = "gianfar", },
  22. { .compatible = "fsl,qe", },
  23. { .compatible = "fsl,cpm2", },
  24. { .compatible = "fsl,srio", },
  25. /* So that the DMA channel nodes can be probed individually: */
  26. { .compatible = "fsl,eloplus-dma", },
  27. /* For the PMC driver */
  28. { .compatible = "fsl,mpc8548-guts", },
  29. /* Probably unnecessary? */
  30. { .compatible = "gpio-leds", },
  31. /* For all PCI controllers */
  32. { .compatible = "fsl,mpc8540-pci", },
  33. { .compatible = "fsl,mpc8548-pcie", },
  34. { .compatible = "fsl,p1022-pcie", },
  35. { .compatible = "fsl,p1010-pcie", },
  36. { .compatible = "fsl,p1023-pcie", },
  37. { .compatible = "fsl,p4080-pcie", },
  38. { .compatible = "fsl,qoriq-pcie-v2.4", },
  39. { .compatible = "fsl,qoriq-pcie-v2.3", },
  40. { .compatible = "fsl,qoriq-pcie-v2.2", },
  41. { .compatible = "fsl,fman", },
  42. {},
  43. };
  44. int __init mpc85xx_common_publish_devices(void)
  45. {
  46. return of_platform_bus_probe(NULL, mpc85xx_common_ids, NULL);
  47. }
  48. #ifdef CONFIG_CPM2
  49. static void cpm2_cascade(struct irq_desc *desc)
  50. {
  51. struct irq_chip *chip = irq_desc_get_chip(desc);
  52. int cascade_irq;
  53. while ((cascade_irq = cpm2_get_irq()) >= 0)
  54. generic_handle_irq(cascade_irq);
  55. chip->irq_eoi(&desc->irq_data);
  56. }
  57. void __init mpc85xx_cpm2_pic_init(void)
  58. {
  59. struct device_node *np;
  60. int irq;
  61. /* Setup CPM2 PIC */
  62. np = of_find_compatible_node(NULL, NULL, "fsl,cpm2-pic");
  63. if (np == NULL) {
  64. printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n");
  65. return;
  66. }
  67. irq = irq_of_parse_and_map(np, 0);
  68. if (!irq) {
  69. of_node_put(np);
  70. printk(KERN_ERR "PIC init: got no IRQ for cpm cascade\n");
  71. return;
  72. }
  73. cpm2_pic_init(np);
  74. of_node_put(np);
  75. irq_set_chained_handler(irq, cpm2_cascade);
  76. }
  77. #endif
  78. #ifdef CONFIG_QUICC_ENGINE
  79. void __init mpc85xx_qe_init(void)
  80. {
  81. struct device_node *np;
  82. np = of_find_compatible_node(NULL, NULL, "fsl,qe");
  83. if (!np) {
  84. np = of_find_node_by_name(NULL, "qe");
  85. if (!np) {
  86. pr_err("%s: Could not find Quicc Engine node\n",
  87. __func__);
  88. return;
  89. }
  90. }
  91. if (!of_device_is_available(np)) {
  92. of_node_put(np);
  93. return;
  94. }
  95. of_node_put(np);
  96. }
  97. void __init mpc85xx_qe_par_io_init(void)
  98. {
  99. struct device_node *np;
  100. np = of_find_node_by_name(NULL, "par_io");
  101. if (np) {
  102. struct device_node *ucc;
  103. par_io_init(np);
  104. of_node_put(np);
  105. for_each_node_by_name(ucc, "ucc")
  106. par_io_of_config(ucc);
  107. }
  108. }
  109. #endif