km82xx.c 6.1 KB

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  1. /*
  2. * Keymile km82xx support
  3. * Copyright 2008-2011 DENX Software Engineering GmbH
  4. * Author: Heiko Schocher <hs@denx.de>
  5. *
  6. * based on code from:
  7. * Copyright 2007 Freescale Semiconductor, Inc.
  8. * Author: Scott Wood <scottwood@freescale.com>
  9. *
  10. * This program is free software; you can redistribute it and/or modify it
  11. * under the terms of the GNU General Public License as published by the
  12. * Free Software Foundation; either version 2 of the License, or (at your
  13. * option) any later version.
  14. */
  15. #include <linux/init.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/fsl_devices.h>
  18. #include <linux/of_platform.h>
  19. #include <linux/io.h>
  20. #include <asm/cpm2.h>
  21. #include <asm/udbg.h>
  22. #include <asm/machdep.h>
  23. #include <linux/time.h>
  24. #include <asm/mpc8260.h>
  25. #include <asm/prom.h>
  26. #include <sysdev/fsl_soc.h>
  27. #include <sysdev/cpm2_pic.h>
  28. #include "pq2.h"
  29. static void __init km82xx_pic_init(void)
  30. {
  31. struct device_node *np = of_find_compatible_node(NULL, NULL,
  32. "fsl,pq2-pic");
  33. if (!np) {
  34. pr_err("PIC init: can not find cpm-pic node\n");
  35. return;
  36. }
  37. cpm2_pic_init(np);
  38. of_node_put(np);
  39. }
  40. struct cpm_pin {
  41. int port, pin, flags;
  42. };
  43. static __initdata struct cpm_pin km82xx_pins[] = {
  44. /* SMC1 */
  45. {2, 4, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  46. {2, 5, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  47. /* SMC2 */
  48. {0, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  49. {0, 9, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  50. /* SCC1 */
  51. {2, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  52. {2, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  53. {3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  54. {3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
  55. /* SCC4 */
  56. {2, 25, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  57. {2, 24, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  58. {2, 9, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  59. {2, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  60. {3, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  61. {3, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  62. /* FCC1 */
  63. {0, 14, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  64. {0, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  65. {0, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  66. {0, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  67. {0, 18, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  68. {0, 19, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  69. {0, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  70. {0, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  71. {0, 26, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
  72. {0, 27, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
  73. {0, 28, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
  74. {0, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
  75. {0, 30, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
  76. {0, 31, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
  77. {2, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  78. {2, 23, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  79. /* FCC2 */
  80. {1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  81. {1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  82. {1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  83. {1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  84. {1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  85. {1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  86. {1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  87. {1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  88. {1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  89. {1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  90. {1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  91. {1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
  92. {1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  93. {1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  94. {2, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  95. {2, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  96. /* MDC */
  97. {0, 13, CPM_PIN_OUTPUT | CPM_PIN_GPIO},
  98. #if defined(CONFIG_I2C_CPM)
  99. /* I2C */
  100. {3, 14, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN},
  101. {3, 15, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN},
  102. #endif
  103. /* USB */
  104. {0, 10, CPM_PIN_OUTPUT | CPM_PIN_GPIO}, /* FULL_SPEED */
  105. {0, 11, CPM_PIN_OUTPUT | CPM_PIN_GPIO}, /*/SLAVE */
  106. {2, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* RXN */
  107. {2, 11, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* RXP */
  108. {2, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, /* /OE */
  109. {2, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* RXCLK */
  110. {3, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, /* TXP */
  111. {3, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, /* TXN */
  112. {3, 25, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* RXD */
  113. /* SPI */
  114. {3, 16, CPM_PIN_INPUT | CPM_PIN_SECONDARY},/* SPI_MISO PD16 */
  115. {3, 17, CPM_PIN_INPUT | CPM_PIN_SECONDARY},/* SPI_MOSI PD17 */
  116. {3, 18, CPM_PIN_INPUT | CPM_PIN_SECONDARY},/* SPI_CLK PD18 */
  117. };
  118. static void __init init_ioports(void)
  119. {
  120. int i;
  121. for (i = 0; i < ARRAY_SIZE(km82xx_pins); i++) {
  122. const struct cpm_pin *pin = &km82xx_pins[i];
  123. cpm2_set_pin(pin->port, pin->pin, pin->flags);
  124. }
  125. cpm2_smc_clk_setup(CPM_CLK_SMC2, CPM_BRG8);
  126. cpm2_smc_clk_setup(CPM_CLK_SMC1, CPM_BRG7);
  127. cpm2_clk_setup(CPM_CLK_SCC1, CPM_CLK11, CPM_CLK_RX);
  128. cpm2_clk_setup(CPM_CLK_SCC1, CPM_CLK11, CPM_CLK_TX);
  129. cpm2_clk_setup(CPM_CLK_SCC3, CPM_CLK5, CPM_CLK_RTX);
  130. cpm2_clk_setup(CPM_CLK_SCC4, CPM_CLK7, CPM_CLK_RX);
  131. cpm2_clk_setup(CPM_CLK_SCC4, CPM_CLK8, CPM_CLK_TX);
  132. cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK10, CPM_CLK_RX);
  133. cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK9, CPM_CLK_TX);
  134. cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK13, CPM_CLK_RX);
  135. cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX);
  136. /* Force USB FULL SPEED bit to '1' */
  137. setbits32(&cpm2_immr->im_ioport.iop_pdata, 1 << (31 - 10));
  138. /* clear USB_SLAVE */
  139. clrbits32(&cpm2_immr->im_ioport.iop_pdata, 1 << (31 - 11));
  140. }
  141. static void __init km82xx_setup_arch(void)
  142. {
  143. if (ppc_md.progress)
  144. ppc_md.progress("km82xx_setup_arch()", 0);
  145. cpm2_reset();
  146. /* When this is set, snooping CPM DMA from RAM causes
  147. * machine checks. See erratum SIU18.
  148. */
  149. clrbits32(&cpm2_immr->im_siu_conf.siu_82xx.sc_bcr, MPC82XX_BCR_PLDP);
  150. init_ioports();
  151. if (ppc_md.progress)
  152. ppc_md.progress("km82xx_setup_arch(), finish", 0);
  153. }
  154. static const struct of_device_id of_bus_ids[] __initconst = {
  155. { .compatible = "simple-bus", },
  156. {},
  157. };
  158. static int __init declare_of_platform_devices(void)
  159. {
  160. of_platform_bus_probe(NULL, of_bus_ids, NULL);
  161. return 0;
  162. }
  163. machine_device_initcall(km82xx, declare_of_platform_devices);
  164. /*
  165. * Called very early, device-tree isn't unflattened
  166. */
  167. static int __init km82xx_probe(void)
  168. {
  169. return of_machine_is_compatible("keymile,km82xx");
  170. }
  171. define_machine(km82xx)
  172. {
  173. .name = "Keymile km82xx",
  174. .probe = km82xx_probe,
  175. .setup_arch = km82xx_setup_arch,
  176. .init_IRQ = km82xx_pic_init,
  177. .get_irq = cpm2_get_irq,
  178. .calibrate_decr = generic_calibrate_decr,
  179. .restart = pq2_restart,
  180. .progress = udbg_progress,
  181. };