vdk_axs10x_mb.dtsi 2.2 KB

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  1. /*
  2. * Support for peripherals on the AXS10x mainboard (VDK version)
  3. *
  4. * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com)
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. / {
  11. axs10x_mb_vdk {
  12. compatible = "simple-bus";
  13. #address-cells = <1>;
  14. #size-cells = <1>;
  15. ranges = <0x00000000 0xe0000000 0x10000000>;
  16. interrupt-parent = <&mb_intc>;
  17. clocks {
  18. apbclk: apbclk {
  19. compatible = "fixed-clock";
  20. clock-frequency = <50000000>;
  21. #clock-cells = <0>;
  22. };
  23. pguclk: pguclk {
  24. #clock-cells = <0>;
  25. compatible = "fixed-clock";
  26. clock-frequency = <25175000>;
  27. };
  28. };
  29. ethernet@0x18000 {
  30. #interrupt-cells = <1>;
  31. compatible = "snps,dwmac";
  32. reg = < 0x18000 0x2000 >;
  33. interrupts = < 4 >;
  34. interrupt-names = "macirq";
  35. phy-mode = "rgmii";
  36. snps,phy-addr = < 0 >; // VDK model phy address is 0
  37. snps,pbl = < 32 >;
  38. clocks = <&apbclk>;
  39. clock-names = "stmmaceth";
  40. };
  41. ehci@0x40000 {
  42. compatible = "generic-ehci";
  43. reg = < 0x40000 0x100 >;
  44. interrupts = < 8 >;
  45. };
  46. uart@0x20000 {
  47. compatible = "snps,dw-apb-uart";
  48. reg = <0x20000 0x100>;
  49. clock-frequency = <2403200>;
  50. interrupts = <17>;
  51. baud = <115200>;
  52. reg-shift = <2>;
  53. reg-io-width = <4>;
  54. };
  55. uart@0x21000 {
  56. compatible = "snps,dw-apb-uart";
  57. reg = <0x21000 0x100>;
  58. clock-frequency = <2403200>;
  59. interrupts = <18>;
  60. baud = <115200>;
  61. reg-shift = <2>;
  62. reg-io-width = <4>;
  63. };
  64. uart@0x22000 {
  65. compatible = "snps,dw-apb-uart";
  66. reg = <0x22000 0x100>;
  67. clock-frequency = <2403200>;
  68. interrupts = <19>;
  69. baud = <115200>;
  70. reg-shift = <2>;
  71. reg-io-width = <4>;
  72. };
  73. /* PGU output directly sent to virtual LCD screen; hdmi controller not modelled */
  74. pgu@17000 {
  75. compatible = "snps,arcpgu";
  76. reg = <0x17000 0x400>;
  77. clocks = <&pguclk>;
  78. clock-names = "pxlclk";
  79. };
  80. /* VDK has additional ps2 keyboard/mouse interface integrated in LCD screen model */
  81. ps2: ps2@e0017400 {
  82. compatible = "snps,arc_ps2";
  83. reg = <0x17400 0x14>;
  84. interrupts = <5>;
  85. interrupt-names = "arc_ps2_irq";
  86. };
  87. };
  88. };