nsimosci_hs.dts 2.0 KB

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  1. /*
  2. * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. /dts-v1/;
  9. /include/ "skeleton_hs.dtsi"
  10. / {
  11. model = "snps,nsimosci_hs";
  12. compatible = "snps,nsimosci_hs";
  13. #address-cells = <1>;
  14. #size-cells = <1>;
  15. interrupt-parent = <&core_intc>;
  16. chosen {
  17. /* this is for console on PGU */
  18. /* bootargs = "console=tty0 consoleblank=0"; */
  19. /* this is for console on serial */
  20. bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=tty0 console=ttyS0,115200n8 consoleblank=0 debug video=640x480-24";
  21. };
  22. aliases {
  23. serial0 = &uart0;
  24. };
  25. fpga {
  26. compatible = "simple-bus";
  27. #address-cells = <1>;
  28. #size-cells = <1>;
  29. /* child and parent address space 1:1 mapped */
  30. ranges;
  31. core_clk: core_clk {
  32. #clock-cells = <0>;
  33. compatible = "fixed-clock";
  34. clock-frequency = <20000000>;
  35. };
  36. core_intc: core-interrupt-controller {
  37. compatible = "snps,archs-intc";
  38. interrupt-controller;
  39. #interrupt-cells = <1>;
  40. };
  41. uart0: serial@f0000000 {
  42. compatible = "ns8250";
  43. reg = <0xf0000000 0x2000>;
  44. interrupts = <24>;
  45. clock-frequency = <3686400>;
  46. baud = <115200>;
  47. reg-shift = <2>;
  48. reg-io-width = <4>;
  49. no-loopback-test = <1>;
  50. };
  51. pguclk: pguclk {
  52. #clock-cells = <0>;
  53. compatible = "fixed-clock";
  54. clock-frequency = <25175000>;
  55. };
  56. pgu@f9000000 {
  57. compatible = "snps,arcpgu";
  58. reg = <0xf9000000 0x400>;
  59. clocks = <&pguclk>;
  60. clock-names = "pxlclk";
  61. };
  62. ps2: ps2@f9001000 {
  63. compatible = "snps,arc_ps2";
  64. reg = <0xf9000400 0x14>;
  65. interrupts = <27>;
  66. interrupt-names = "arc_ps2_irq";
  67. };
  68. eth0: ethernet@f0003000 {
  69. compatible = "ezchip,nps-mgt-enet";
  70. reg = <0xf0003000 0x44>;
  71. interrupts = <25>;
  72. };
  73. arcpct0: pct {
  74. compatible = "snps,archs-pct";
  75. #interrupt-cells = <1>;
  76. interrupts = <20>;
  77. };
  78. };
  79. };