nsim_700.dts 1.5 KB

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  1. /*
  2. * Copyright (C) 2012 Synopsys, Inc. (www.synopsys.com)
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. /dts-v1/;
  9. /include/ "skeleton.dtsi"
  10. / {
  11. model = "snps,nsim";
  12. compatible = "snps,nsim";
  13. #address-cells = <1>;
  14. #size-cells = <1>;
  15. interrupt-parent = <&core_intc>;
  16. chosen {
  17. bootargs = "earlycon=arc_uart,mmio32,0xc0fc1000,115200n8 console=ttyARC0,115200n8";
  18. };
  19. aliases {
  20. serial0 = &arcuart0;
  21. };
  22. fpga {
  23. compatible = "simple-bus";
  24. #address-cells = <1>;
  25. #size-cells = <1>;
  26. /* child and parent address space 1:1 mapped */
  27. ranges;
  28. core_clk: core_clk {
  29. #clock-cells = <0>;
  30. compatible = "fixed-clock";
  31. clock-frequency = <80000000>;
  32. };
  33. core_intc: interrupt-controller {
  34. compatible = "snps,arc700-intc";
  35. interrupt-controller;
  36. #interrupt-cells = <1>;
  37. };
  38. arcuart0: serial@c0fc1000 {
  39. compatible = "snps,arc-uart";
  40. reg = <0xc0fc1000 0x100>;
  41. interrupts = <5>;
  42. clock-frequency = <80000000>;
  43. current-speed = <115200>;
  44. status = "okay";
  45. };
  46. ethernet@c0fc2000 {
  47. compatible = "snps,arc-emac";
  48. reg = <0xc0fc2000 0x3c>;
  49. interrupts = <6>;
  50. mac-address = [ 00 11 22 33 44 55 ];
  51. clock-frequency = <80000000>;
  52. max-speed = <100>;
  53. phy = <&phy0>;
  54. #address-cells = <1>;
  55. #size-cells = <0>;
  56. phy0: ethernet-phy@0 {
  57. reg = <1>;
  58. };
  59. };
  60. arcpct0: pct {
  61. compatible = "snps,arc700-pct";
  62. };
  63. };
  64. };