wm8940.c 22 KB

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  1. /*
  2. * wm8940.c -- WM8940 ALSA Soc Audio driver
  3. *
  4. * Author: Jonathan Cameron <jic23@cam.ac.uk>
  5. *
  6. * Based on wm8510.c
  7. * Copyright 2006 Wolfson Microelectronics PLC.
  8. * Author: Liam Girdwood <lrg@slimlogic.co.uk>
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. *
  14. * Not currently handled:
  15. * Notch filter control
  16. * AUXMode (inverting vs mixer)
  17. * No means to obtain current gain if alc enabled.
  18. * No use made of gpio
  19. * Fast VMID discharge for power down
  20. * Soft Start
  21. * DLR and ALR Swaps not enabled
  22. * Digital Sidetone not supported
  23. */
  24. #include <linux/module.h>
  25. #include <linux/moduleparam.h>
  26. #include <linux/kernel.h>
  27. #include <linux/init.h>
  28. #include <linux/delay.h>
  29. #include <linux/pm.h>
  30. #include <linux/i2c.h>
  31. #include <linux/regmap.h>
  32. #include <linux/slab.h>
  33. #include <sound/core.h>
  34. #include <sound/pcm.h>
  35. #include <sound/pcm_params.h>
  36. #include <sound/soc.h>
  37. #include <sound/initval.h>
  38. #include <sound/tlv.h>
  39. #include "wm8940.h"
  40. struct wm8940_priv {
  41. unsigned int sysclk;
  42. struct regmap *regmap;
  43. };
  44. static bool wm8940_volatile_register(struct device *dev, unsigned int reg)
  45. {
  46. switch (reg) {
  47. case WM8940_SOFTRESET:
  48. return true;
  49. default:
  50. return false;
  51. }
  52. }
  53. static bool wm8940_readable_register(struct device *dev, unsigned int reg)
  54. {
  55. switch (reg) {
  56. case WM8940_SOFTRESET:
  57. case WM8940_POWER1:
  58. case WM8940_POWER2:
  59. case WM8940_POWER3:
  60. case WM8940_IFACE:
  61. case WM8940_COMPANDINGCTL:
  62. case WM8940_CLOCK:
  63. case WM8940_ADDCNTRL:
  64. case WM8940_GPIO:
  65. case WM8940_CTLINT:
  66. case WM8940_DAC:
  67. case WM8940_DACVOL:
  68. case WM8940_ADC:
  69. case WM8940_ADCVOL:
  70. case WM8940_NOTCH1:
  71. case WM8940_NOTCH2:
  72. case WM8940_NOTCH3:
  73. case WM8940_NOTCH4:
  74. case WM8940_NOTCH5:
  75. case WM8940_NOTCH6:
  76. case WM8940_NOTCH7:
  77. case WM8940_NOTCH8:
  78. case WM8940_DACLIM1:
  79. case WM8940_DACLIM2:
  80. case WM8940_ALC1:
  81. case WM8940_ALC2:
  82. case WM8940_ALC3:
  83. case WM8940_NOISEGATE:
  84. case WM8940_PLLN:
  85. case WM8940_PLLK1:
  86. case WM8940_PLLK2:
  87. case WM8940_PLLK3:
  88. case WM8940_ALC4:
  89. case WM8940_INPUTCTL:
  90. case WM8940_PGAGAIN:
  91. case WM8940_ADCBOOST:
  92. case WM8940_OUTPUTCTL:
  93. case WM8940_SPKMIX:
  94. case WM8940_SPKVOL:
  95. case WM8940_MONOMIX:
  96. return true;
  97. default:
  98. return false;
  99. }
  100. }
  101. static const struct reg_default wm8940_reg_defaults[] = {
  102. { 0x1, 0x0000 }, /* Power 1 */
  103. { 0x2, 0x0000 }, /* Power 2 */
  104. { 0x3, 0x0000 }, /* Power 3 */
  105. { 0x4, 0x0010 }, /* Interface Control */
  106. { 0x5, 0x0000 }, /* Companding Control */
  107. { 0x6, 0x0140 }, /* Clock Control */
  108. { 0x7, 0x0000 }, /* Additional Controls */
  109. { 0x8, 0x0000 }, /* GPIO Control */
  110. { 0x9, 0x0002 }, /* Auto Increment Control */
  111. { 0xa, 0x0000 }, /* DAC Control */
  112. { 0xb, 0x00FF }, /* DAC Volume */
  113. { 0xe, 0x0100 }, /* ADC Control */
  114. { 0xf, 0x00FF }, /* ADC Volume */
  115. { 0x10, 0x0000 }, /* Notch Filter 1 Control 1 */
  116. { 0x11, 0x0000 }, /* Notch Filter 1 Control 2 */
  117. { 0x12, 0x0000 }, /* Notch Filter 2 Control 1 */
  118. { 0x13, 0x0000 }, /* Notch Filter 2 Control 2 */
  119. { 0x14, 0x0000 }, /* Notch Filter 3 Control 1 */
  120. { 0x15, 0x0000 }, /* Notch Filter 3 Control 2 */
  121. { 0x16, 0x0000 }, /* Notch Filter 4 Control 1 */
  122. { 0x17, 0x0000 }, /* Notch Filter 4 Control 2 */
  123. { 0x18, 0x0032 }, /* DAC Limit Control 1 */
  124. { 0x19, 0x0000 }, /* DAC Limit Control 2 */
  125. { 0x20, 0x0038 }, /* ALC Control 1 */
  126. { 0x21, 0x000B }, /* ALC Control 2 */
  127. { 0x22, 0x0032 }, /* ALC Control 3 */
  128. { 0x23, 0x0000 }, /* Noise Gate */
  129. { 0x24, 0x0041 }, /* PLLN */
  130. { 0x25, 0x000C }, /* PLLK1 */
  131. { 0x26, 0x0093 }, /* PLLK2 */
  132. { 0x27, 0x00E9 }, /* PLLK3 */
  133. { 0x2a, 0x0030 }, /* ALC Control 4 */
  134. { 0x2c, 0x0002 }, /* Input Control */
  135. { 0x2d, 0x0050 }, /* PGA Gain */
  136. { 0x2f, 0x0002 }, /* ADC Boost Control */
  137. { 0x31, 0x0002 }, /* Output Control */
  138. { 0x32, 0x0000 }, /* Speaker Mixer Control */
  139. { 0x36, 0x0079 }, /* Speaker Volume */
  140. { 0x38, 0x0000 }, /* Mono Mixer Control */
  141. };
  142. static const char *wm8940_companding[] = { "Off", "NC", "u-law", "A-law" };
  143. static SOC_ENUM_SINGLE_DECL(wm8940_adc_companding_enum,
  144. WM8940_COMPANDINGCTL, 1, wm8940_companding);
  145. static SOC_ENUM_SINGLE_DECL(wm8940_dac_companding_enum,
  146. WM8940_COMPANDINGCTL, 3, wm8940_companding);
  147. static const char *wm8940_alc_mode_text[] = {"ALC", "Limiter"};
  148. static SOC_ENUM_SINGLE_DECL(wm8940_alc_mode_enum,
  149. WM8940_ALC3, 8, wm8940_alc_mode_text);
  150. static const char *wm8940_mic_bias_level_text[] = {"0.9", "0.65"};
  151. static SOC_ENUM_SINGLE_DECL(wm8940_mic_bias_level_enum,
  152. WM8940_INPUTCTL, 8, wm8940_mic_bias_level_text);
  153. static const char *wm8940_filter_mode_text[] = {"Audio", "Application"};
  154. static SOC_ENUM_SINGLE_DECL(wm8940_filter_mode_enum,
  155. WM8940_ADC, 7, wm8940_filter_mode_text);
  156. static DECLARE_TLV_DB_SCALE(wm8940_spk_vol_tlv, -5700, 100, 1);
  157. static DECLARE_TLV_DB_SCALE(wm8940_att_tlv, -1000, 1000, 0);
  158. static DECLARE_TLV_DB_SCALE(wm8940_pga_vol_tlv, -1200, 75, 0);
  159. static DECLARE_TLV_DB_SCALE(wm8940_alc_min_tlv, -1200, 600, 0);
  160. static DECLARE_TLV_DB_SCALE(wm8940_alc_max_tlv, 675, 600, 0);
  161. static DECLARE_TLV_DB_SCALE(wm8940_alc_tar_tlv, -2250, 50, 0);
  162. static DECLARE_TLV_DB_SCALE(wm8940_lim_boost_tlv, 0, 100, 0);
  163. static DECLARE_TLV_DB_SCALE(wm8940_lim_thresh_tlv, -600, 100, 0);
  164. static DECLARE_TLV_DB_SCALE(wm8940_adc_tlv, -12750, 50, 1);
  165. static DECLARE_TLV_DB_SCALE(wm8940_capture_boost_vol_tlv, 0, 2000, 0);
  166. static const struct snd_kcontrol_new wm8940_snd_controls[] = {
  167. SOC_SINGLE("Digital Loopback Switch", WM8940_COMPANDINGCTL,
  168. 6, 1, 0),
  169. SOC_ENUM("DAC Companding", wm8940_dac_companding_enum),
  170. SOC_ENUM("ADC Companding", wm8940_adc_companding_enum),
  171. SOC_ENUM("ALC Mode", wm8940_alc_mode_enum),
  172. SOC_SINGLE("ALC Switch", WM8940_ALC1, 8, 1, 0),
  173. SOC_SINGLE_TLV("ALC Capture Max Gain", WM8940_ALC1,
  174. 3, 7, 1, wm8940_alc_max_tlv),
  175. SOC_SINGLE_TLV("ALC Capture Min Gain", WM8940_ALC1,
  176. 0, 7, 0, wm8940_alc_min_tlv),
  177. SOC_SINGLE_TLV("ALC Capture Target", WM8940_ALC2,
  178. 0, 14, 0, wm8940_alc_tar_tlv),
  179. SOC_SINGLE("ALC Capture Hold", WM8940_ALC2, 4, 10, 0),
  180. SOC_SINGLE("ALC Capture Decay", WM8940_ALC3, 4, 10, 0),
  181. SOC_SINGLE("ALC Capture Attach", WM8940_ALC3, 0, 10, 0),
  182. SOC_SINGLE("ALC ZC Switch", WM8940_ALC4, 1, 1, 0),
  183. SOC_SINGLE("ALC Capture Noise Gate Switch", WM8940_NOISEGATE,
  184. 3, 1, 0),
  185. SOC_SINGLE("ALC Capture Noise Gate Threshold", WM8940_NOISEGATE,
  186. 0, 7, 0),
  187. SOC_SINGLE("DAC Playback Limiter Switch", WM8940_DACLIM1, 8, 1, 0),
  188. SOC_SINGLE("DAC Playback Limiter Attack", WM8940_DACLIM1, 0, 9, 0),
  189. SOC_SINGLE("DAC Playback Limiter Decay", WM8940_DACLIM1, 4, 11, 0),
  190. SOC_SINGLE_TLV("DAC Playback Limiter Threshold", WM8940_DACLIM2,
  191. 4, 9, 1, wm8940_lim_thresh_tlv),
  192. SOC_SINGLE_TLV("DAC Playback Limiter Boost", WM8940_DACLIM2,
  193. 0, 12, 0, wm8940_lim_boost_tlv),
  194. SOC_SINGLE("Capture PGA ZC Switch", WM8940_PGAGAIN, 7, 1, 0),
  195. SOC_SINGLE_TLV("Capture PGA Volume", WM8940_PGAGAIN,
  196. 0, 63, 0, wm8940_pga_vol_tlv),
  197. SOC_SINGLE_TLV("Digital Playback Volume", WM8940_DACVOL,
  198. 0, 255, 0, wm8940_adc_tlv),
  199. SOC_SINGLE_TLV("Digital Capture Volume", WM8940_ADCVOL,
  200. 0, 255, 0, wm8940_adc_tlv),
  201. SOC_ENUM("Mic Bias Level", wm8940_mic_bias_level_enum),
  202. SOC_SINGLE_TLV("Capture Boost Volue", WM8940_ADCBOOST,
  203. 8, 1, 0, wm8940_capture_boost_vol_tlv),
  204. SOC_SINGLE_TLV("Speaker Playback Volume", WM8940_SPKVOL,
  205. 0, 63, 0, wm8940_spk_vol_tlv),
  206. SOC_SINGLE("Speaker Playback Switch", WM8940_SPKVOL, 6, 1, 1),
  207. SOC_SINGLE_TLV("Speaker Mixer Line Bypass Volume", WM8940_SPKVOL,
  208. 8, 1, 1, wm8940_att_tlv),
  209. SOC_SINGLE("Speaker Playback ZC Switch", WM8940_SPKVOL, 7, 1, 0),
  210. SOC_SINGLE("Mono Out Switch", WM8940_MONOMIX, 6, 1, 1),
  211. SOC_SINGLE_TLV("Mono Mixer Line Bypass Volume", WM8940_MONOMIX,
  212. 7, 1, 1, wm8940_att_tlv),
  213. SOC_SINGLE("High Pass Filter Switch", WM8940_ADC, 8, 1, 0),
  214. SOC_ENUM("High Pass Filter Mode", wm8940_filter_mode_enum),
  215. SOC_SINGLE("High Pass Filter Cut Off", WM8940_ADC, 4, 7, 0),
  216. SOC_SINGLE("ADC Inversion Switch", WM8940_ADC, 0, 1, 0),
  217. SOC_SINGLE("DAC Inversion Switch", WM8940_DAC, 0, 1, 0),
  218. SOC_SINGLE("DAC Auto Mute Switch", WM8940_DAC, 2, 1, 0),
  219. SOC_SINGLE("ZC Timeout Clock Switch", WM8940_ADDCNTRL, 0, 1, 0),
  220. };
  221. static const struct snd_kcontrol_new wm8940_speaker_mixer_controls[] = {
  222. SOC_DAPM_SINGLE("Line Bypass Switch", WM8940_SPKMIX, 1, 1, 0),
  223. SOC_DAPM_SINGLE("Aux Playback Switch", WM8940_SPKMIX, 5, 1, 0),
  224. SOC_DAPM_SINGLE("PCM Playback Switch", WM8940_SPKMIX, 0, 1, 0),
  225. };
  226. static const struct snd_kcontrol_new wm8940_mono_mixer_controls[] = {
  227. SOC_DAPM_SINGLE("Line Bypass Switch", WM8940_MONOMIX, 1, 1, 0),
  228. SOC_DAPM_SINGLE("Aux Playback Switch", WM8940_MONOMIX, 2, 1, 0),
  229. SOC_DAPM_SINGLE("PCM Playback Switch", WM8940_MONOMIX, 0, 1, 0),
  230. };
  231. static DECLARE_TLV_DB_SCALE(wm8940_boost_vol_tlv, -1500, 300, 1);
  232. static const struct snd_kcontrol_new wm8940_input_boost_controls[] = {
  233. SOC_DAPM_SINGLE("Mic PGA Switch", WM8940_PGAGAIN, 6, 1, 1),
  234. SOC_DAPM_SINGLE_TLV("Aux Volume", WM8940_ADCBOOST,
  235. 0, 7, 0, wm8940_boost_vol_tlv),
  236. SOC_DAPM_SINGLE_TLV("Mic Volume", WM8940_ADCBOOST,
  237. 4, 7, 0, wm8940_boost_vol_tlv),
  238. };
  239. static const struct snd_kcontrol_new wm8940_micpga_controls[] = {
  240. SOC_DAPM_SINGLE("AUX Switch", WM8940_INPUTCTL, 2, 1, 0),
  241. SOC_DAPM_SINGLE("MICP Switch", WM8940_INPUTCTL, 0, 1, 0),
  242. SOC_DAPM_SINGLE("MICN Switch", WM8940_INPUTCTL, 1, 1, 0),
  243. };
  244. static const struct snd_soc_dapm_widget wm8940_dapm_widgets[] = {
  245. SND_SOC_DAPM_MIXER("Speaker Mixer", WM8940_POWER3, 2, 0,
  246. &wm8940_speaker_mixer_controls[0],
  247. ARRAY_SIZE(wm8940_speaker_mixer_controls)),
  248. SND_SOC_DAPM_MIXER("Mono Mixer", WM8940_POWER3, 3, 0,
  249. &wm8940_mono_mixer_controls[0],
  250. ARRAY_SIZE(wm8940_mono_mixer_controls)),
  251. SND_SOC_DAPM_DAC("DAC", "HiFi Playback", WM8940_POWER3, 0, 0),
  252. SND_SOC_DAPM_PGA("SpkN Out", WM8940_POWER3, 5, 0, NULL, 0),
  253. SND_SOC_DAPM_PGA("SpkP Out", WM8940_POWER3, 6, 0, NULL, 0),
  254. SND_SOC_DAPM_PGA("Mono Out", WM8940_POWER3, 7, 0, NULL, 0),
  255. SND_SOC_DAPM_OUTPUT("MONOOUT"),
  256. SND_SOC_DAPM_OUTPUT("SPKOUTP"),
  257. SND_SOC_DAPM_OUTPUT("SPKOUTN"),
  258. SND_SOC_DAPM_PGA("Aux Input", WM8940_POWER1, 6, 0, NULL, 0),
  259. SND_SOC_DAPM_ADC("ADC", "HiFi Capture", WM8940_POWER2, 0, 0),
  260. SND_SOC_DAPM_MIXER("Mic PGA", WM8940_POWER2, 2, 0,
  261. &wm8940_micpga_controls[0],
  262. ARRAY_SIZE(wm8940_micpga_controls)),
  263. SND_SOC_DAPM_MIXER("Boost Mixer", WM8940_POWER2, 4, 0,
  264. &wm8940_input_boost_controls[0],
  265. ARRAY_SIZE(wm8940_input_boost_controls)),
  266. SND_SOC_DAPM_MICBIAS("Mic Bias", WM8940_POWER1, 4, 0),
  267. SND_SOC_DAPM_INPUT("MICN"),
  268. SND_SOC_DAPM_INPUT("MICP"),
  269. SND_SOC_DAPM_INPUT("AUX"),
  270. };
  271. static const struct snd_soc_dapm_route wm8940_dapm_routes[] = {
  272. /* Mono output mixer */
  273. {"Mono Mixer", "PCM Playback Switch", "DAC"},
  274. {"Mono Mixer", "Aux Playback Switch", "Aux Input"},
  275. {"Mono Mixer", "Line Bypass Switch", "Boost Mixer"},
  276. /* Speaker output mixer */
  277. {"Speaker Mixer", "PCM Playback Switch", "DAC"},
  278. {"Speaker Mixer", "Aux Playback Switch", "Aux Input"},
  279. {"Speaker Mixer", "Line Bypass Switch", "Boost Mixer"},
  280. /* Outputs */
  281. {"Mono Out", NULL, "Mono Mixer"},
  282. {"MONOOUT", NULL, "Mono Out"},
  283. {"SpkN Out", NULL, "Speaker Mixer"},
  284. {"SpkP Out", NULL, "Speaker Mixer"},
  285. {"SPKOUTN", NULL, "SpkN Out"},
  286. {"SPKOUTP", NULL, "SpkP Out"},
  287. /* Microphone PGA */
  288. {"Mic PGA", "MICN Switch", "MICN"},
  289. {"Mic PGA", "MICP Switch", "MICP"},
  290. {"Mic PGA", "AUX Switch", "AUX"},
  291. /* Boost Mixer */
  292. {"Boost Mixer", "Mic PGA Switch", "Mic PGA"},
  293. {"Boost Mixer", "Mic Volume", "MICP"},
  294. {"Boost Mixer", "Aux Volume", "Aux Input"},
  295. {"ADC", NULL, "Boost Mixer"},
  296. };
  297. #define wm8940_reset(c) snd_soc_write(c, WM8940_SOFTRESET, 0);
  298. static int wm8940_set_dai_fmt(struct snd_soc_dai *codec_dai,
  299. unsigned int fmt)
  300. {
  301. struct snd_soc_codec *codec = codec_dai->codec;
  302. u16 iface = snd_soc_read(codec, WM8940_IFACE) & 0xFE67;
  303. u16 clk = snd_soc_read(codec, WM8940_CLOCK) & 0x1fe;
  304. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  305. case SND_SOC_DAIFMT_CBM_CFM:
  306. clk |= 1;
  307. break;
  308. case SND_SOC_DAIFMT_CBS_CFS:
  309. break;
  310. default:
  311. return -EINVAL;
  312. }
  313. snd_soc_write(codec, WM8940_CLOCK, clk);
  314. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  315. case SND_SOC_DAIFMT_I2S:
  316. iface |= (2 << 3);
  317. break;
  318. case SND_SOC_DAIFMT_LEFT_J:
  319. iface |= (1 << 3);
  320. break;
  321. case SND_SOC_DAIFMT_RIGHT_J:
  322. break;
  323. case SND_SOC_DAIFMT_DSP_A:
  324. iface |= (3 << 3);
  325. break;
  326. case SND_SOC_DAIFMT_DSP_B:
  327. iface |= (3 << 3) | (1 << 7);
  328. break;
  329. }
  330. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  331. case SND_SOC_DAIFMT_NB_NF:
  332. break;
  333. case SND_SOC_DAIFMT_NB_IF:
  334. iface |= (1 << 7);
  335. break;
  336. case SND_SOC_DAIFMT_IB_NF:
  337. iface |= (1 << 8);
  338. break;
  339. case SND_SOC_DAIFMT_IB_IF:
  340. iface |= (1 << 8) | (1 << 7);
  341. break;
  342. }
  343. snd_soc_write(codec, WM8940_IFACE, iface);
  344. return 0;
  345. }
  346. static int wm8940_i2s_hw_params(struct snd_pcm_substream *substream,
  347. struct snd_pcm_hw_params *params,
  348. struct snd_soc_dai *dai)
  349. {
  350. struct snd_soc_codec *codec = dai->codec;
  351. u16 iface = snd_soc_read(codec, WM8940_IFACE) & 0xFD9F;
  352. u16 addcntrl = snd_soc_read(codec, WM8940_ADDCNTRL) & 0xFFF1;
  353. u16 companding = snd_soc_read(codec,
  354. WM8940_COMPANDINGCTL) & 0xFFDF;
  355. int ret;
  356. /* LoutR control */
  357. if (substream->stream == SNDRV_PCM_STREAM_CAPTURE
  358. && params_channels(params) == 2)
  359. iface |= (1 << 9);
  360. switch (params_rate(params)) {
  361. case 8000:
  362. addcntrl |= (0x5 << 1);
  363. break;
  364. case 11025:
  365. addcntrl |= (0x4 << 1);
  366. break;
  367. case 16000:
  368. addcntrl |= (0x3 << 1);
  369. break;
  370. case 22050:
  371. addcntrl |= (0x2 << 1);
  372. break;
  373. case 32000:
  374. addcntrl |= (0x1 << 1);
  375. break;
  376. case 44100:
  377. case 48000:
  378. break;
  379. }
  380. ret = snd_soc_write(codec, WM8940_ADDCNTRL, addcntrl);
  381. if (ret)
  382. goto error_ret;
  383. switch (params_width(params)) {
  384. case 8:
  385. companding = companding | (1 << 5);
  386. break;
  387. case 16:
  388. break;
  389. case 20:
  390. iface |= (1 << 5);
  391. break;
  392. case 24:
  393. iface |= (2 << 5);
  394. break;
  395. case 32:
  396. iface |= (3 << 5);
  397. break;
  398. }
  399. ret = snd_soc_write(codec, WM8940_COMPANDINGCTL, companding);
  400. if (ret)
  401. goto error_ret;
  402. ret = snd_soc_write(codec, WM8940_IFACE, iface);
  403. error_ret:
  404. return ret;
  405. }
  406. static int wm8940_mute(struct snd_soc_dai *dai, int mute)
  407. {
  408. struct snd_soc_codec *codec = dai->codec;
  409. u16 mute_reg = snd_soc_read(codec, WM8940_DAC) & 0xffbf;
  410. if (mute)
  411. mute_reg |= 0x40;
  412. return snd_soc_write(codec, WM8940_DAC, mute_reg);
  413. }
  414. static int wm8940_set_bias_level(struct snd_soc_codec *codec,
  415. enum snd_soc_bias_level level)
  416. {
  417. struct wm8940_priv *wm8940 = snd_soc_codec_get_drvdata(codec);
  418. u16 val;
  419. u16 pwr_reg = snd_soc_read(codec, WM8940_POWER1) & 0x1F0;
  420. int ret = 0;
  421. switch (level) {
  422. case SND_SOC_BIAS_ON:
  423. /* ensure bufioen and biasen */
  424. pwr_reg |= (1 << 2) | (1 << 3);
  425. /* Enable thermal shutdown */
  426. val = snd_soc_read(codec, WM8940_OUTPUTCTL);
  427. ret = snd_soc_write(codec, WM8940_OUTPUTCTL, val | 0x2);
  428. if (ret)
  429. break;
  430. /* set vmid to 75k */
  431. ret = snd_soc_write(codec, WM8940_POWER1, pwr_reg | 0x1);
  432. break;
  433. case SND_SOC_BIAS_PREPARE:
  434. /* ensure bufioen and biasen */
  435. pwr_reg |= (1 << 2) | (1 << 3);
  436. ret = snd_soc_write(codec, WM8940_POWER1, pwr_reg | 0x1);
  437. break;
  438. case SND_SOC_BIAS_STANDBY:
  439. if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
  440. ret = regcache_sync(wm8940->regmap);
  441. if (ret < 0) {
  442. dev_err(codec->dev, "Failed to sync cache: %d\n", ret);
  443. return ret;
  444. }
  445. }
  446. /* ensure bufioen and biasen */
  447. pwr_reg |= (1 << 2) | (1 << 3);
  448. /* set vmid to 300k for standby */
  449. ret = snd_soc_write(codec, WM8940_POWER1, pwr_reg | 0x2);
  450. break;
  451. case SND_SOC_BIAS_OFF:
  452. ret = snd_soc_write(codec, WM8940_POWER1, pwr_reg);
  453. break;
  454. }
  455. return ret;
  456. }
  457. struct pll_ {
  458. unsigned int pre_scale:2;
  459. unsigned int n:4;
  460. unsigned int k;
  461. };
  462. static struct pll_ pll_div;
  463. /* The size in bits of the pll divide multiplied by 10
  464. * to allow rounding later */
  465. #define FIXED_PLL_SIZE ((1 << 24) * 10)
  466. static void pll_factors(unsigned int target, unsigned int source)
  467. {
  468. unsigned long long Kpart;
  469. unsigned int K, Ndiv, Nmod;
  470. /* The left shift ist to avoid accuracy loss when right shifting */
  471. Ndiv = target / source;
  472. if (Ndiv > 12) {
  473. source <<= 1;
  474. /* Multiply by 2 */
  475. pll_div.pre_scale = 0;
  476. Ndiv = target / source;
  477. } else if (Ndiv < 3) {
  478. source >>= 2;
  479. /* Divide by 4 */
  480. pll_div.pre_scale = 3;
  481. Ndiv = target / source;
  482. } else if (Ndiv < 6) {
  483. source >>= 1;
  484. /* divide by 2 */
  485. pll_div.pre_scale = 2;
  486. Ndiv = target / source;
  487. } else
  488. pll_div.pre_scale = 1;
  489. if ((Ndiv < 6) || (Ndiv > 12))
  490. printk(KERN_WARNING
  491. "WM8940 N value %d outwith recommended range!d\n",
  492. Ndiv);
  493. pll_div.n = Ndiv;
  494. Nmod = target % source;
  495. Kpart = FIXED_PLL_SIZE * (long long)Nmod;
  496. do_div(Kpart, source);
  497. K = Kpart & 0xFFFFFFFF;
  498. /* Check if we need to round */
  499. if ((K % 10) >= 5)
  500. K += 5;
  501. /* Move down to proper range now rounding is done */
  502. K /= 10;
  503. pll_div.k = K;
  504. }
  505. /* Untested at the moment */
  506. static int wm8940_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
  507. int source, unsigned int freq_in, unsigned int freq_out)
  508. {
  509. struct snd_soc_codec *codec = codec_dai->codec;
  510. u16 reg;
  511. /* Turn off PLL */
  512. reg = snd_soc_read(codec, WM8940_POWER1);
  513. snd_soc_write(codec, WM8940_POWER1, reg & 0x1df);
  514. if (freq_in == 0 || freq_out == 0) {
  515. /* Clock CODEC directly from MCLK */
  516. reg = snd_soc_read(codec, WM8940_CLOCK);
  517. snd_soc_write(codec, WM8940_CLOCK, reg & 0x0ff);
  518. /* Pll power down */
  519. snd_soc_write(codec, WM8940_PLLN, (1 << 7));
  520. return 0;
  521. }
  522. /* Pll is followed by a frequency divide by 4 */
  523. pll_factors(freq_out*4, freq_in);
  524. if (pll_div.k)
  525. snd_soc_write(codec, WM8940_PLLN,
  526. (pll_div.pre_scale << 4) | pll_div.n | (1 << 6));
  527. else /* No factional component */
  528. snd_soc_write(codec, WM8940_PLLN,
  529. (pll_div.pre_scale << 4) | pll_div.n);
  530. snd_soc_write(codec, WM8940_PLLK1, pll_div.k >> 18);
  531. snd_soc_write(codec, WM8940_PLLK2, (pll_div.k >> 9) & 0x1ff);
  532. snd_soc_write(codec, WM8940_PLLK3, pll_div.k & 0x1ff);
  533. /* Enable the PLL */
  534. reg = snd_soc_read(codec, WM8940_POWER1);
  535. snd_soc_write(codec, WM8940_POWER1, reg | 0x020);
  536. /* Run CODEC from PLL instead of MCLK */
  537. reg = snd_soc_read(codec, WM8940_CLOCK);
  538. snd_soc_write(codec, WM8940_CLOCK, reg | 0x100);
  539. return 0;
  540. }
  541. static int wm8940_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  542. int clk_id, unsigned int freq, int dir)
  543. {
  544. struct snd_soc_codec *codec = codec_dai->codec;
  545. struct wm8940_priv *wm8940 = snd_soc_codec_get_drvdata(codec);
  546. switch (freq) {
  547. case 11289600:
  548. case 12000000:
  549. case 12288000:
  550. case 16934400:
  551. case 18432000:
  552. wm8940->sysclk = freq;
  553. return 0;
  554. }
  555. return -EINVAL;
  556. }
  557. static int wm8940_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
  558. int div_id, int div)
  559. {
  560. struct snd_soc_codec *codec = codec_dai->codec;
  561. u16 reg;
  562. int ret = 0;
  563. switch (div_id) {
  564. case WM8940_BCLKDIV:
  565. reg = snd_soc_read(codec, WM8940_CLOCK) & 0xFFE3;
  566. ret = snd_soc_write(codec, WM8940_CLOCK, reg | (div << 2));
  567. break;
  568. case WM8940_MCLKDIV:
  569. reg = snd_soc_read(codec, WM8940_CLOCK) & 0xFF1F;
  570. ret = snd_soc_write(codec, WM8940_CLOCK, reg | (div << 5));
  571. break;
  572. case WM8940_OPCLKDIV:
  573. reg = snd_soc_read(codec, WM8940_GPIO) & 0xFFCF;
  574. ret = snd_soc_write(codec, WM8940_GPIO, reg | (div << 4));
  575. break;
  576. }
  577. return ret;
  578. }
  579. #define WM8940_RATES SNDRV_PCM_RATE_8000_48000
  580. #define WM8940_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
  581. SNDRV_PCM_FMTBIT_S16_LE | \
  582. SNDRV_PCM_FMTBIT_S20_3LE | \
  583. SNDRV_PCM_FMTBIT_S24_LE | \
  584. SNDRV_PCM_FMTBIT_S32_LE)
  585. static const struct snd_soc_dai_ops wm8940_dai_ops = {
  586. .hw_params = wm8940_i2s_hw_params,
  587. .set_sysclk = wm8940_set_dai_sysclk,
  588. .digital_mute = wm8940_mute,
  589. .set_fmt = wm8940_set_dai_fmt,
  590. .set_clkdiv = wm8940_set_dai_clkdiv,
  591. .set_pll = wm8940_set_dai_pll,
  592. };
  593. static struct snd_soc_dai_driver wm8940_dai = {
  594. .name = "wm8940-hifi",
  595. .playback = {
  596. .stream_name = "Playback",
  597. .channels_min = 1,
  598. .channels_max = 2,
  599. .rates = WM8940_RATES,
  600. .formats = WM8940_FORMATS,
  601. },
  602. .capture = {
  603. .stream_name = "Capture",
  604. .channels_min = 1,
  605. .channels_max = 2,
  606. .rates = WM8940_RATES,
  607. .formats = WM8940_FORMATS,
  608. },
  609. .ops = &wm8940_dai_ops,
  610. .symmetric_rates = 1,
  611. };
  612. static int wm8940_probe(struct snd_soc_codec *codec)
  613. {
  614. struct wm8940_setup_data *pdata = codec->dev->platform_data;
  615. int ret;
  616. u16 reg;
  617. ret = wm8940_reset(codec);
  618. if (ret < 0) {
  619. dev_err(codec->dev, "Failed to issue reset\n");
  620. return ret;
  621. }
  622. snd_soc_codec_force_bias_level(codec, SND_SOC_BIAS_STANDBY);
  623. ret = snd_soc_write(codec, WM8940_POWER1, 0x180);
  624. if (ret < 0)
  625. return ret;
  626. if (!pdata)
  627. dev_warn(codec->dev, "No platform data supplied\n");
  628. else {
  629. reg = snd_soc_read(codec, WM8940_OUTPUTCTL);
  630. ret = snd_soc_write(codec, WM8940_OUTPUTCTL, reg | pdata->vroi);
  631. if (ret < 0)
  632. return ret;
  633. }
  634. return ret;
  635. }
  636. static const struct snd_soc_codec_driver soc_codec_dev_wm8940 = {
  637. .probe = wm8940_probe,
  638. .set_bias_level = wm8940_set_bias_level,
  639. .suspend_bias_off = true,
  640. .component_driver = {
  641. .controls = wm8940_snd_controls,
  642. .num_controls = ARRAY_SIZE(wm8940_snd_controls),
  643. .dapm_widgets = wm8940_dapm_widgets,
  644. .num_dapm_widgets = ARRAY_SIZE(wm8940_dapm_widgets),
  645. .dapm_routes = wm8940_dapm_routes,
  646. .num_dapm_routes = ARRAY_SIZE(wm8940_dapm_routes),
  647. },
  648. };
  649. static const struct regmap_config wm8940_regmap = {
  650. .reg_bits = 8,
  651. .val_bits = 16,
  652. .max_register = WM8940_MONOMIX,
  653. .reg_defaults = wm8940_reg_defaults,
  654. .num_reg_defaults = ARRAY_SIZE(wm8940_reg_defaults),
  655. .cache_type = REGCACHE_RBTREE,
  656. .readable_reg = wm8940_readable_register,
  657. .volatile_reg = wm8940_volatile_register,
  658. };
  659. static int wm8940_i2c_probe(struct i2c_client *i2c,
  660. const struct i2c_device_id *id)
  661. {
  662. struct wm8940_priv *wm8940;
  663. int ret;
  664. wm8940 = devm_kzalloc(&i2c->dev, sizeof(struct wm8940_priv),
  665. GFP_KERNEL);
  666. if (wm8940 == NULL)
  667. return -ENOMEM;
  668. wm8940->regmap = devm_regmap_init_i2c(i2c, &wm8940_regmap);
  669. if (IS_ERR(wm8940->regmap))
  670. return PTR_ERR(wm8940->regmap);
  671. i2c_set_clientdata(i2c, wm8940);
  672. ret = snd_soc_register_codec(&i2c->dev,
  673. &soc_codec_dev_wm8940, &wm8940_dai, 1);
  674. return ret;
  675. }
  676. static int wm8940_i2c_remove(struct i2c_client *client)
  677. {
  678. snd_soc_unregister_codec(&client->dev);
  679. return 0;
  680. }
  681. static const struct i2c_device_id wm8940_i2c_id[] = {
  682. { "wm8940", 0 },
  683. { }
  684. };
  685. MODULE_DEVICE_TABLE(i2c, wm8940_i2c_id);
  686. static struct i2c_driver wm8940_i2c_driver = {
  687. .driver = {
  688. .name = "wm8940",
  689. },
  690. .probe = wm8940_i2c_probe,
  691. .remove = wm8940_i2c_remove,
  692. .id_table = wm8940_i2c_id,
  693. };
  694. module_i2c_driver(wm8940_i2c_driver);
  695. MODULE_DESCRIPTION("ASoC WM8940 driver");
  696. MODULE_AUTHOR("Jonathan Cameron");
  697. MODULE_LICENSE("GPL");