interface.c 5.1 KB

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  1. /*
  2. * OMAP interface clock support
  3. *
  4. * Copyright (C) 2013 Texas Instruments, Inc.
  5. *
  6. * Tero Kristo <t-kristo@ti.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  13. * kind, whether express or implied; without even the implied warranty
  14. * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. */
  17. #include <linux/clk-provider.h>
  18. #include <linux/slab.h>
  19. #include <linux/of.h>
  20. #include <linux/of_address.h>
  21. #include <linux/clk/ti.h>
  22. #include "clock.h"
  23. #undef pr_fmt
  24. #define pr_fmt(fmt) "%s: " fmt, __func__
  25. static const struct clk_ops ti_interface_clk_ops = {
  26. .init = &omap2_init_clk_clkdm,
  27. .enable = &omap2_dflt_clk_enable,
  28. .disable = &omap2_dflt_clk_disable,
  29. .is_enabled = &omap2_dflt_clk_is_enabled,
  30. };
  31. static struct clk *_register_interface(struct device *dev, const char *name,
  32. const char *parent_name,
  33. void __iomem *reg, u8 bit_idx,
  34. const struct clk_hw_omap_ops *ops)
  35. {
  36. struct clk_init_data init = { NULL };
  37. struct clk_hw_omap *clk_hw;
  38. struct clk *clk;
  39. clk_hw = kzalloc(sizeof(*clk_hw), GFP_KERNEL);
  40. if (!clk_hw)
  41. return ERR_PTR(-ENOMEM);
  42. clk_hw->hw.init = &init;
  43. clk_hw->ops = ops;
  44. clk_hw->flags = MEMMAP_ADDRESSING;
  45. clk_hw->enable_reg = reg;
  46. clk_hw->enable_bit = bit_idx;
  47. init.name = name;
  48. init.ops = &ti_interface_clk_ops;
  49. init.flags = 0;
  50. init.num_parents = 1;
  51. init.parent_names = &parent_name;
  52. clk = clk_register(NULL, &clk_hw->hw);
  53. if (IS_ERR(clk))
  54. kfree(clk_hw);
  55. else
  56. omap2_init_clk_hw_omap_clocks(&clk_hw->hw);
  57. return clk;
  58. }
  59. #if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_ATAGS)
  60. struct clk *ti_clk_register_interface(struct ti_clk *setup)
  61. {
  62. const struct clk_hw_omap_ops *ops = &clkhwops_iclk_wait;
  63. u32 reg;
  64. struct clk_omap_reg *reg_setup;
  65. struct ti_clk_gate *gate;
  66. gate = setup->data;
  67. reg_setup = (struct clk_omap_reg *)&reg;
  68. reg_setup->index = gate->module;
  69. reg_setup->offset = gate->reg;
  70. if (gate->flags & CLKF_NO_WAIT)
  71. ops = &clkhwops_iclk;
  72. if (gate->flags & CLKF_HSOTGUSB)
  73. ops = &clkhwops_omap3430es2_iclk_hsotgusb_wait;
  74. if (gate->flags & CLKF_DSS)
  75. ops = &clkhwops_omap3430es2_iclk_dss_usbhost_wait;
  76. if (gate->flags & CLKF_SSI)
  77. ops = &clkhwops_omap3430es2_iclk_ssi_wait;
  78. if (gate->flags & CLKF_AM35XX)
  79. ops = &clkhwops_am35xx_ipss_wait;
  80. return _register_interface(NULL, setup->name, gate->parent,
  81. (void __iomem *)reg, gate->bit_shift, ops);
  82. }
  83. #endif
  84. static void __init _of_ti_interface_clk_setup(struct device_node *node,
  85. const struct clk_hw_omap_ops *ops)
  86. {
  87. struct clk *clk;
  88. const char *parent_name;
  89. void __iomem *reg;
  90. u8 enable_bit = 0;
  91. u32 val;
  92. reg = ti_clk_get_reg_addr(node, 0);
  93. if (IS_ERR(reg))
  94. return;
  95. if (!of_property_read_u32(node, "ti,bit-shift", &val))
  96. enable_bit = val;
  97. parent_name = of_clk_get_parent_name(node, 0);
  98. if (!parent_name) {
  99. pr_err("%s must have a parent\n", node->name);
  100. return;
  101. }
  102. clk = _register_interface(NULL, node->name, parent_name, reg,
  103. enable_bit, ops);
  104. if (!IS_ERR(clk))
  105. of_clk_add_provider(node, of_clk_src_simple_get, clk);
  106. }
  107. static void __init of_ti_interface_clk_setup(struct device_node *node)
  108. {
  109. _of_ti_interface_clk_setup(node, &clkhwops_iclk_wait);
  110. }
  111. CLK_OF_DECLARE(ti_interface_clk, "ti,omap3-interface-clock",
  112. of_ti_interface_clk_setup);
  113. static void __init of_ti_no_wait_interface_clk_setup(struct device_node *node)
  114. {
  115. _of_ti_interface_clk_setup(node, &clkhwops_iclk);
  116. }
  117. CLK_OF_DECLARE(ti_no_wait_interface_clk, "ti,omap3-no-wait-interface-clock",
  118. of_ti_no_wait_interface_clk_setup);
  119. #ifdef CONFIG_ARCH_OMAP3
  120. static void __init of_ti_hsotgusb_interface_clk_setup(struct device_node *node)
  121. {
  122. _of_ti_interface_clk_setup(node,
  123. &clkhwops_omap3430es2_iclk_hsotgusb_wait);
  124. }
  125. CLK_OF_DECLARE(ti_hsotgusb_interface_clk, "ti,omap3-hsotgusb-interface-clock",
  126. of_ti_hsotgusb_interface_clk_setup);
  127. static void __init of_ti_dss_interface_clk_setup(struct device_node *node)
  128. {
  129. _of_ti_interface_clk_setup(node,
  130. &clkhwops_omap3430es2_iclk_dss_usbhost_wait);
  131. }
  132. CLK_OF_DECLARE(ti_dss_interface_clk, "ti,omap3-dss-interface-clock",
  133. of_ti_dss_interface_clk_setup);
  134. static void __init of_ti_ssi_interface_clk_setup(struct device_node *node)
  135. {
  136. _of_ti_interface_clk_setup(node, &clkhwops_omap3430es2_iclk_ssi_wait);
  137. }
  138. CLK_OF_DECLARE(ti_ssi_interface_clk, "ti,omap3-ssi-interface-clock",
  139. of_ti_ssi_interface_clk_setup);
  140. static void __init of_ti_am35xx_interface_clk_setup(struct device_node *node)
  141. {
  142. _of_ti_interface_clk_setup(node, &clkhwops_am35xx_ipss_wait);
  143. }
  144. CLK_OF_DECLARE(ti_am35xx_interface_clk, "ti,am35xx-interface-clock",
  145. of_ti_am35xx_interface_clk_setup);
  146. #endif
  147. #ifdef CONFIG_SOC_OMAP2430
  148. static void __init of_ti_omap2430_interface_clk_setup(struct device_node *node)
  149. {
  150. _of_ti_interface_clk_setup(node, &clkhwops_omap2430_i2chs_wait);
  151. }
  152. CLK_OF_DECLARE(ti_omap2430_interface_clk, "ti,omap2430-interface-clock",
  153. of_ti_omap2430_interface_clk_setup);
  154. #endif