smp.c 30 KB

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  1. /*
  2. * SMP related functions
  3. *
  4. * Copyright IBM Corp. 1999, 2012
  5. * Author(s): Denis Joseph Barrow,
  6. * Martin Schwidefsky <schwidefsky@de.ibm.com>,
  7. * Heiko Carstens <heiko.carstens@de.ibm.com>,
  8. *
  9. * based on other smp stuff by
  10. * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net>
  11. * (c) 1998 Ingo Molnar
  12. *
  13. * The code outside of smp.c uses logical cpu numbers, only smp.c does
  14. * the translation of logical to physical cpu ids. All new code that
  15. * operates on physical cpu numbers needs to go into smp.c.
  16. */
  17. #define KMSG_COMPONENT "cpu"
  18. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  19. #include <linux/workqueue.h>
  20. #include <linux/module.h>
  21. #include <linux/init.h>
  22. #include <linux/mm.h>
  23. #include <linux/err.h>
  24. #include <linux/spinlock.h>
  25. #include <linux/kernel_stat.h>
  26. #include <linux/delay.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/irqflags.h>
  29. #include <linux/cpu.h>
  30. #include <linux/slab.h>
  31. #include <linux/crash_dump.h>
  32. #include <linux/memblock.h>
  33. #include <asm/asm-offsets.h>
  34. #include <asm/diag.h>
  35. #include <asm/switch_to.h>
  36. #include <asm/facility.h>
  37. #include <asm/ipl.h>
  38. #include <asm/setup.h>
  39. #include <asm/irq.h>
  40. #include <asm/tlbflush.h>
  41. #include <asm/vtimer.h>
  42. #include <asm/lowcore.h>
  43. #include <asm/sclp.h>
  44. #include <asm/vdso.h>
  45. #include <asm/debug.h>
  46. #include <asm/os_info.h>
  47. #include <asm/sigp.h>
  48. #include <asm/idle.h>
  49. #include "entry.h"
  50. enum {
  51. ec_schedule = 0,
  52. ec_call_function_single,
  53. ec_stop_cpu,
  54. };
  55. enum {
  56. CPU_STATE_STANDBY,
  57. CPU_STATE_CONFIGURED,
  58. };
  59. static DEFINE_PER_CPU(struct cpu *, cpu_device);
  60. struct pcpu {
  61. struct lowcore *lowcore; /* lowcore page(s) for the cpu */
  62. unsigned long ec_mask; /* bit mask for ec_xxx functions */
  63. unsigned long ec_clk; /* sigp timestamp for ec_xxx */
  64. signed char state; /* physical cpu state */
  65. signed char polarization; /* physical polarization */
  66. u16 address; /* physical cpu address */
  67. };
  68. static u8 boot_core_type;
  69. static struct pcpu pcpu_devices[NR_CPUS];
  70. unsigned int smp_cpu_mt_shift;
  71. EXPORT_SYMBOL(smp_cpu_mt_shift);
  72. unsigned int smp_cpu_mtid;
  73. EXPORT_SYMBOL(smp_cpu_mtid);
  74. #ifdef CONFIG_CRASH_DUMP
  75. __vector128 __initdata boot_cpu_vector_save_area[__NUM_VXRS];
  76. #endif
  77. static unsigned int smp_max_threads __initdata = -1U;
  78. static int __init early_nosmt(char *s)
  79. {
  80. smp_max_threads = 1;
  81. return 0;
  82. }
  83. early_param("nosmt", early_nosmt);
  84. static int __init early_smt(char *s)
  85. {
  86. get_option(&s, &smp_max_threads);
  87. return 0;
  88. }
  89. early_param("smt", early_smt);
  90. /*
  91. * The smp_cpu_state_mutex must be held when changing the state or polarization
  92. * member of a pcpu data structure within the pcpu_devices arreay.
  93. */
  94. DEFINE_MUTEX(smp_cpu_state_mutex);
  95. /*
  96. * Signal processor helper functions.
  97. */
  98. static inline int __pcpu_sigp_relax(u16 addr, u8 order, unsigned long parm)
  99. {
  100. int cc;
  101. while (1) {
  102. cc = __pcpu_sigp(addr, order, parm, NULL);
  103. if (cc != SIGP_CC_BUSY)
  104. return cc;
  105. cpu_relax();
  106. }
  107. }
  108. static int pcpu_sigp_retry(struct pcpu *pcpu, u8 order, u32 parm)
  109. {
  110. int cc, retry;
  111. for (retry = 0; ; retry++) {
  112. cc = __pcpu_sigp(pcpu->address, order, parm, NULL);
  113. if (cc != SIGP_CC_BUSY)
  114. break;
  115. if (retry >= 3)
  116. udelay(10);
  117. }
  118. return cc;
  119. }
  120. static inline int pcpu_stopped(struct pcpu *pcpu)
  121. {
  122. u32 uninitialized_var(status);
  123. if (__pcpu_sigp(pcpu->address, SIGP_SENSE,
  124. 0, &status) != SIGP_CC_STATUS_STORED)
  125. return 0;
  126. return !!(status & (SIGP_STATUS_CHECK_STOP|SIGP_STATUS_STOPPED));
  127. }
  128. static inline int pcpu_running(struct pcpu *pcpu)
  129. {
  130. if (__pcpu_sigp(pcpu->address, SIGP_SENSE_RUNNING,
  131. 0, NULL) != SIGP_CC_STATUS_STORED)
  132. return 1;
  133. /* Status stored condition code is equivalent to cpu not running. */
  134. return 0;
  135. }
  136. /*
  137. * Find struct pcpu by cpu address.
  138. */
  139. static struct pcpu *pcpu_find_address(const struct cpumask *mask, u16 address)
  140. {
  141. int cpu;
  142. for_each_cpu(cpu, mask)
  143. if (pcpu_devices[cpu].address == address)
  144. return pcpu_devices + cpu;
  145. return NULL;
  146. }
  147. static void pcpu_ec_call(struct pcpu *pcpu, int ec_bit)
  148. {
  149. int order;
  150. if (test_and_set_bit(ec_bit, &pcpu->ec_mask))
  151. return;
  152. order = pcpu_running(pcpu) ? SIGP_EXTERNAL_CALL : SIGP_EMERGENCY_SIGNAL;
  153. pcpu->ec_clk = get_tod_clock_fast();
  154. pcpu_sigp_retry(pcpu, order, 0);
  155. }
  156. #define ASYNC_FRAME_OFFSET (ASYNC_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE)
  157. #define PANIC_FRAME_OFFSET (PAGE_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE)
  158. static int pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu)
  159. {
  160. unsigned long async_stack, panic_stack;
  161. struct lowcore *lc;
  162. if (pcpu != &pcpu_devices[0]) {
  163. pcpu->lowcore = (struct lowcore *)
  164. __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
  165. async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER);
  166. panic_stack = __get_free_page(GFP_KERNEL);
  167. if (!pcpu->lowcore || !panic_stack || !async_stack)
  168. goto out;
  169. } else {
  170. async_stack = pcpu->lowcore->async_stack - ASYNC_FRAME_OFFSET;
  171. panic_stack = pcpu->lowcore->panic_stack - PANIC_FRAME_OFFSET;
  172. }
  173. lc = pcpu->lowcore;
  174. memcpy(lc, &S390_lowcore, 512);
  175. memset((char *) lc + 512, 0, sizeof(*lc) - 512);
  176. lc->async_stack = async_stack + ASYNC_FRAME_OFFSET;
  177. lc->panic_stack = panic_stack + PANIC_FRAME_OFFSET;
  178. lc->cpu_nr = cpu;
  179. lc->spinlock_lockval = arch_spin_lockval(cpu);
  180. lc->br_r1_trampoline = 0x07f1; /* br %r1 */
  181. if (MACHINE_HAS_VX)
  182. lc->vector_save_area_addr =
  183. (unsigned long) &lc->vector_save_area;
  184. if (vdso_alloc_per_cpu(lc))
  185. goto out;
  186. lowcore_ptr[cpu] = lc;
  187. pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, (u32)(unsigned long) lc);
  188. return 0;
  189. out:
  190. if (pcpu != &pcpu_devices[0]) {
  191. free_page(panic_stack);
  192. free_pages(async_stack, ASYNC_ORDER);
  193. free_pages((unsigned long) pcpu->lowcore, LC_ORDER);
  194. }
  195. return -ENOMEM;
  196. }
  197. #ifdef CONFIG_HOTPLUG_CPU
  198. static void pcpu_free_lowcore(struct pcpu *pcpu)
  199. {
  200. pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, 0);
  201. lowcore_ptr[pcpu - pcpu_devices] = NULL;
  202. vdso_free_per_cpu(pcpu->lowcore);
  203. if (pcpu == &pcpu_devices[0])
  204. return;
  205. free_page(pcpu->lowcore->panic_stack-PANIC_FRAME_OFFSET);
  206. free_pages(pcpu->lowcore->async_stack-ASYNC_FRAME_OFFSET, ASYNC_ORDER);
  207. free_pages((unsigned long) pcpu->lowcore, LC_ORDER);
  208. }
  209. #endif /* CONFIG_HOTPLUG_CPU */
  210. static void pcpu_prepare_secondary(struct pcpu *pcpu, int cpu)
  211. {
  212. struct lowcore *lc = pcpu->lowcore;
  213. cpumask_set_cpu(cpu, &init_mm.context.cpu_attach_mask);
  214. cpumask_set_cpu(cpu, mm_cpumask(&init_mm));
  215. lc->cpu_nr = cpu;
  216. lc->spinlock_lockval = arch_spin_lockval(cpu);
  217. lc->percpu_offset = __per_cpu_offset[cpu];
  218. lc->kernel_asce = S390_lowcore.kernel_asce;
  219. lc->machine_flags = S390_lowcore.machine_flags;
  220. lc->user_timer = lc->system_timer = lc->steal_timer = 0;
  221. __ctl_store(lc->cregs_save_area, 0, 15);
  222. save_access_regs((unsigned int *) lc->access_regs_save_area);
  223. memcpy(lc->stfle_fac_list, S390_lowcore.stfle_fac_list,
  224. sizeof(lc->stfle_fac_list));
  225. memcpy(lc->alt_stfle_fac_list, S390_lowcore.alt_stfle_fac_list,
  226. sizeof(lc->alt_stfle_fac_list));
  227. }
  228. static void pcpu_attach_task(struct pcpu *pcpu, struct task_struct *tsk)
  229. {
  230. struct lowcore *lc = pcpu->lowcore;
  231. struct thread_info *ti = task_thread_info(tsk);
  232. lc->kernel_stack = (unsigned long) task_stack_page(tsk)
  233. + THREAD_SIZE - STACK_FRAME_OVERHEAD - sizeof(struct pt_regs);
  234. lc->thread_info = (unsigned long) task_thread_info(tsk);
  235. lc->current_task = (unsigned long) tsk;
  236. lc->lpp = LPP_MAGIC;
  237. lc->current_pid = tsk->pid;
  238. lc->user_timer = ti->user_timer;
  239. lc->system_timer = ti->system_timer;
  240. lc->steal_timer = 0;
  241. }
  242. static void pcpu_start_fn(struct pcpu *pcpu, void (*func)(void *), void *data)
  243. {
  244. struct lowcore *lc = pcpu->lowcore;
  245. lc->restart_stack = lc->kernel_stack;
  246. lc->restart_fn = (unsigned long) func;
  247. lc->restart_data = (unsigned long) data;
  248. lc->restart_source = -1UL;
  249. pcpu_sigp_retry(pcpu, SIGP_RESTART, 0);
  250. }
  251. /*
  252. * Call function via PSW restart on pcpu and stop the current cpu.
  253. */
  254. static void pcpu_delegate(struct pcpu *pcpu, void (*func)(void *),
  255. void *data, unsigned long stack)
  256. {
  257. struct lowcore *lc = lowcore_ptr[pcpu - pcpu_devices];
  258. unsigned long source_cpu = stap();
  259. __load_psw_mask(PSW_KERNEL_BITS);
  260. if (pcpu->address == source_cpu)
  261. func(data); /* should not return */
  262. /* Stop target cpu (if func returns this stops the current cpu). */
  263. pcpu_sigp_retry(pcpu, SIGP_STOP, 0);
  264. /* Restart func on the target cpu and stop the current cpu. */
  265. mem_assign_absolute(lc->restart_stack, stack);
  266. mem_assign_absolute(lc->restart_fn, (unsigned long) func);
  267. mem_assign_absolute(lc->restart_data, (unsigned long) data);
  268. mem_assign_absolute(lc->restart_source, source_cpu);
  269. __bpon();
  270. asm volatile(
  271. "0: sigp 0,%0,%2 # sigp restart to target cpu\n"
  272. " brc 2,0b # busy, try again\n"
  273. "1: sigp 0,%1,%3 # sigp stop to current cpu\n"
  274. " brc 2,1b # busy, try again\n"
  275. : : "d" (pcpu->address), "d" (source_cpu),
  276. "K" (SIGP_RESTART), "K" (SIGP_STOP)
  277. : "0", "1", "cc");
  278. for (;;) ;
  279. }
  280. /*
  281. * Enable additional logical cpus for multi-threading.
  282. */
  283. static int pcpu_set_smt(unsigned int mtid)
  284. {
  285. int cc;
  286. if (smp_cpu_mtid == mtid)
  287. return 0;
  288. cc = __pcpu_sigp(0, SIGP_SET_MULTI_THREADING, mtid, NULL);
  289. if (cc == 0) {
  290. smp_cpu_mtid = mtid;
  291. smp_cpu_mt_shift = 0;
  292. while (smp_cpu_mtid >= (1U << smp_cpu_mt_shift))
  293. smp_cpu_mt_shift++;
  294. pcpu_devices[0].address = stap();
  295. }
  296. return cc;
  297. }
  298. /*
  299. * Call function on an online CPU.
  300. */
  301. void smp_call_online_cpu(void (*func)(void *), void *data)
  302. {
  303. struct pcpu *pcpu;
  304. /* Use the current cpu if it is online. */
  305. pcpu = pcpu_find_address(cpu_online_mask, stap());
  306. if (!pcpu)
  307. /* Use the first online cpu. */
  308. pcpu = pcpu_devices + cpumask_first(cpu_online_mask);
  309. pcpu_delegate(pcpu, func, data, (unsigned long) restart_stack);
  310. }
  311. /*
  312. * Call function on the ipl CPU.
  313. */
  314. void smp_call_ipl_cpu(void (*func)(void *), void *data)
  315. {
  316. pcpu_delegate(&pcpu_devices[0], func, data,
  317. pcpu_devices->lowcore->panic_stack -
  318. PANIC_FRAME_OFFSET + PAGE_SIZE);
  319. }
  320. int smp_find_processor_id(u16 address)
  321. {
  322. int cpu;
  323. for_each_present_cpu(cpu)
  324. if (pcpu_devices[cpu].address == address)
  325. return cpu;
  326. return -1;
  327. }
  328. int smp_vcpu_scheduled(int cpu)
  329. {
  330. return pcpu_running(pcpu_devices + cpu);
  331. }
  332. void smp_yield_cpu(int cpu)
  333. {
  334. if (MACHINE_HAS_DIAG9C) {
  335. diag_stat_inc_norecursion(DIAG_STAT_X09C);
  336. asm volatile("diag %0,0,0x9c"
  337. : : "d" (pcpu_devices[cpu].address));
  338. } else if (MACHINE_HAS_DIAG44) {
  339. diag_stat_inc_norecursion(DIAG_STAT_X044);
  340. asm volatile("diag 0,0,0x44");
  341. }
  342. }
  343. /*
  344. * Send cpus emergency shutdown signal. This gives the cpus the
  345. * opportunity to complete outstanding interrupts.
  346. */
  347. static void smp_emergency_stop(cpumask_t *cpumask)
  348. {
  349. u64 end;
  350. int cpu;
  351. end = get_tod_clock() + (1000000UL << 12);
  352. for_each_cpu(cpu, cpumask) {
  353. struct pcpu *pcpu = pcpu_devices + cpu;
  354. set_bit(ec_stop_cpu, &pcpu->ec_mask);
  355. while (__pcpu_sigp(pcpu->address, SIGP_EMERGENCY_SIGNAL,
  356. 0, NULL) == SIGP_CC_BUSY &&
  357. get_tod_clock() < end)
  358. cpu_relax();
  359. }
  360. while (get_tod_clock() < end) {
  361. for_each_cpu(cpu, cpumask)
  362. if (pcpu_stopped(pcpu_devices + cpu))
  363. cpumask_clear_cpu(cpu, cpumask);
  364. if (cpumask_empty(cpumask))
  365. break;
  366. cpu_relax();
  367. }
  368. }
  369. /*
  370. * Stop all cpus but the current one.
  371. */
  372. void smp_send_stop(void)
  373. {
  374. cpumask_t cpumask;
  375. int cpu;
  376. /* Disable all interrupts/machine checks */
  377. __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
  378. trace_hardirqs_off();
  379. debug_set_critical();
  380. cpumask_copy(&cpumask, cpu_online_mask);
  381. cpumask_clear_cpu(smp_processor_id(), &cpumask);
  382. if (oops_in_progress)
  383. smp_emergency_stop(&cpumask);
  384. /* stop all processors */
  385. for_each_cpu(cpu, &cpumask) {
  386. struct pcpu *pcpu = pcpu_devices + cpu;
  387. pcpu_sigp_retry(pcpu, SIGP_STOP, 0);
  388. while (!pcpu_stopped(pcpu))
  389. cpu_relax();
  390. }
  391. }
  392. /*
  393. * This is the main routine where commands issued by other
  394. * cpus are handled.
  395. */
  396. static void smp_handle_ext_call(void)
  397. {
  398. unsigned long bits;
  399. /* handle bit signal external calls */
  400. bits = xchg(&pcpu_devices[smp_processor_id()].ec_mask, 0);
  401. if (test_bit(ec_stop_cpu, &bits))
  402. smp_stop_cpu();
  403. if (test_bit(ec_schedule, &bits))
  404. scheduler_ipi();
  405. if (test_bit(ec_call_function_single, &bits))
  406. generic_smp_call_function_single_interrupt();
  407. }
  408. static void do_ext_call_interrupt(struct ext_code ext_code,
  409. unsigned int param32, unsigned long param64)
  410. {
  411. inc_irq_stat(ext_code.code == 0x1202 ? IRQEXT_EXC : IRQEXT_EMS);
  412. smp_handle_ext_call();
  413. }
  414. void arch_send_call_function_ipi_mask(const struct cpumask *mask)
  415. {
  416. int cpu;
  417. for_each_cpu(cpu, mask)
  418. pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
  419. }
  420. void arch_send_call_function_single_ipi(int cpu)
  421. {
  422. pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
  423. }
  424. /*
  425. * this function sends a 'reschedule' IPI to another CPU.
  426. * it goes straight through and wastes no time serializing
  427. * anything. Worst case is that we lose a reschedule ...
  428. */
  429. void smp_send_reschedule(int cpu)
  430. {
  431. pcpu_ec_call(pcpu_devices + cpu, ec_schedule);
  432. }
  433. /*
  434. * parameter area for the set/clear control bit callbacks
  435. */
  436. struct ec_creg_mask_parms {
  437. unsigned long orval;
  438. unsigned long andval;
  439. int cr;
  440. };
  441. /*
  442. * callback for setting/clearing control bits
  443. */
  444. static void smp_ctl_bit_callback(void *info)
  445. {
  446. struct ec_creg_mask_parms *pp = info;
  447. unsigned long cregs[16];
  448. __ctl_store(cregs, 0, 15);
  449. cregs[pp->cr] = (cregs[pp->cr] & pp->andval) | pp->orval;
  450. __ctl_load(cregs, 0, 15);
  451. }
  452. /*
  453. * Set a bit in a control register of all cpus
  454. */
  455. void smp_ctl_set_bit(int cr, int bit)
  456. {
  457. struct ec_creg_mask_parms parms = { 1UL << bit, -1UL, cr };
  458. on_each_cpu(smp_ctl_bit_callback, &parms, 1);
  459. }
  460. EXPORT_SYMBOL(smp_ctl_set_bit);
  461. /*
  462. * Clear a bit in a control register of all cpus
  463. */
  464. void smp_ctl_clear_bit(int cr, int bit)
  465. {
  466. struct ec_creg_mask_parms parms = { 0, ~(1UL << bit), cr };
  467. on_each_cpu(smp_ctl_bit_callback, &parms, 1);
  468. }
  469. EXPORT_SYMBOL(smp_ctl_clear_bit);
  470. #ifdef CONFIG_CRASH_DUMP
  471. int smp_store_status(int cpu)
  472. {
  473. struct pcpu *pcpu = pcpu_devices + cpu;
  474. unsigned long pa;
  475. pa = __pa(&pcpu->lowcore->floating_pt_save_area);
  476. if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_STATUS_AT_ADDRESS,
  477. pa) != SIGP_CC_ORDER_CODE_ACCEPTED)
  478. return -EIO;
  479. if (!MACHINE_HAS_VX)
  480. return 0;
  481. pa = __pa(pcpu->lowcore->vector_save_area_addr);
  482. if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_ADDITIONAL_STATUS,
  483. pa) != SIGP_CC_ORDER_CODE_ACCEPTED)
  484. return -EIO;
  485. return 0;
  486. }
  487. /*
  488. * Collect CPU state of the previous, crashed system.
  489. * There are four cases:
  490. * 1) standard zfcp dump
  491. * condition: OLDMEM_BASE == NULL && ipl_info.type == IPL_TYPE_FCP_DUMP
  492. * The state for all CPUs except the boot CPU needs to be collected
  493. * with sigp stop-and-store-status. The boot CPU state is located in
  494. * the absolute lowcore of the memory stored in the HSA. The zcore code
  495. * will copy the boot CPU state from the HSA.
  496. * 2) stand-alone kdump for SCSI (zfcp dump with swapped memory)
  497. * condition: OLDMEM_BASE != NULL && ipl_info.type == IPL_TYPE_FCP_DUMP
  498. * The state for all CPUs except the boot CPU needs to be collected
  499. * with sigp stop-and-store-status. The firmware or the boot-loader
  500. * stored the registers of the boot CPU in the absolute lowcore in the
  501. * memory of the old system.
  502. * 3) kdump and the old kernel did not store the CPU state,
  503. * or stand-alone kdump for DASD
  504. * condition: OLDMEM_BASE != NULL && !is_kdump_kernel()
  505. * The state for all CPUs except the boot CPU needs to be collected
  506. * with sigp stop-and-store-status. The kexec code or the boot-loader
  507. * stored the registers of the boot CPU in the memory of the old system.
  508. * 4) kdump and the old kernel stored the CPU state
  509. * condition: OLDMEM_BASE != NULL && is_kdump_kernel()
  510. * This case does not exist for s390 anymore, setup_arch explicitly
  511. * deactivates the elfcorehdr= kernel parameter
  512. */
  513. static __init void smp_save_cpu_vxrs(struct save_area *sa, u16 addr,
  514. bool is_boot_cpu, unsigned long page)
  515. {
  516. __vector128 *vxrs = (__vector128 *) page;
  517. if (is_boot_cpu)
  518. vxrs = boot_cpu_vector_save_area;
  519. else
  520. __pcpu_sigp_relax(addr, SIGP_STORE_ADDITIONAL_STATUS, page);
  521. save_area_add_vxrs(sa, vxrs);
  522. }
  523. static __init void smp_save_cpu_regs(struct save_area *sa, u16 addr,
  524. bool is_boot_cpu, unsigned long page)
  525. {
  526. void *regs = (void *) page;
  527. if (is_boot_cpu)
  528. copy_oldmem_kernel(regs, (void *) __LC_FPREGS_SAVE_AREA, 512);
  529. else
  530. __pcpu_sigp_relax(addr, SIGP_STORE_STATUS_AT_ADDRESS, page);
  531. save_area_add_regs(sa, regs);
  532. }
  533. void __init smp_save_dump_cpus(void)
  534. {
  535. int addr, boot_cpu_addr, max_cpu_addr;
  536. struct save_area *sa;
  537. unsigned long page;
  538. bool is_boot_cpu;
  539. if (!(OLDMEM_BASE || ipl_info.type == IPL_TYPE_FCP_DUMP))
  540. /* No previous system present, normal boot. */
  541. return;
  542. /* Allocate a page as dumping area for the store status sigps */
  543. page = memblock_alloc_base(PAGE_SIZE, PAGE_SIZE, 1UL << 31);
  544. /* Set multi-threading state to the previous system. */
  545. pcpu_set_smt(sclp.mtid_prev);
  546. boot_cpu_addr = stap();
  547. max_cpu_addr = SCLP_MAX_CORES << sclp.mtid_prev;
  548. for (addr = 0; addr <= max_cpu_addr; addr++) {
  549. if (__pcpu_sigp_relax(addr, SIGP_SENSE, 0) ==
  550. SIGP_CC_NOT_OPERATIONAL)
  551. continue;
  552. is_boot_cpu = (addr == boot_cpu_addr);
  553. /* Allocate save area */
  554. sa = save_area_alloc(is_boot_cpu);
  555. if (!sa)
  556. panic("could not allocate memory for save area\n");
  557. if (MACHINE_HAS_VX)
  558. /* Get the vector registers */
  559. smp_save_cpu_vxrs(sa, addr, is_boot_cpu, page);
  560. /*
  561. * For a zfcp dump OLDMEM_BASE == NULL and the registers
  562. * of the boot CPU are stored in the HSA. To retrieve
  563. * these registers an SCLP request is required which is
  564. * done by drivers/s390/char/zcore.c:init_cpu_info()
  565. */
  566. if (!is_boot_cpu || OLDMEM_BASE)
  567. /* Get the CPU registers */
  568. smp_save_cpu_regs(sa, addr, is_boot_cpu, page);
  569. }
  570. memblock_free(page, PAGE_SIZE);
  571. diag308_reset();
  572. pcpu_set_smt(0);
  573. }
  574. #endif /* CONFIG_CRASH_DUMP */
  575. void smp_cpu_set_polarization(int cpu, int val)
  576. {
  577. pcpu_devices[cpu].polarization = val;
  578. }
  579. int smp_cpu_get_polarization(int cpu)
  580. {
  581. return pcpu_devices[cpu].polarization;
  582. }
  583. static struct sclp_core_info *smp_get_core_info(void)
  584. {
  585. static int use_sigp_detection;
  586. struct sclp_core_info *info;
  587. int address;
  588. info = kzalloc(sizeof(*info), GFP_KERNEL);
  589. if (info && (use_sigp_detection || sclp_get_core_info(info))) {
  590. use_sigp_detection = 1;
  591. for (address = 0;
  592. address < (SCLP_MAX_CORES << smp_cpu_mt_shift);
  593. address += (1U << smp_cpu_mt_shift)) {
  594. if (__pcpu_sigp_relax(address, SIGP_SENSE, 0) ==
  595. SIGP_CC_NOT_OPERATIONAL)
  596. continue;
  597. info->core[info->configured].core_id =
  598. address >> smp_cpu_mt_shift;
  599. info->configured++;
  600. }
  601. info->combined = info->configured;
  602. }
  603. return info;
  604. }
  605. static int smp_add_present_cpu(int cpu);
  606. static int __smp_rescan_cpus(struct sclp_core_info *info, int sysfs_add)
  607. {
  608. struct pcpu *pcpu;
  609. cpumask_t avail;
  610. int cpu, nr, i, j;
  611. u16 address;
  612. nr = 0;
  613. cpumask_xor(&avail, cpu_possible_mask, cpu_present_mask);
  614. cpu = cpumask_first(&avail);
  615. for (i = 0; (i < info->combined) && (cpu < nr_cpu_ids); i++) {
  616. if (sclp.has_core_type && info->core[i].type != boot_core_type)
  617. continue;
  618. address = info->core[i].core_id << smp_cpu_mt_shift;
  619. for (j = 0; j <= smp_cpu_mtid; j++) {
  620. if (pcpu_find_address(cpu_present_mask, address + j))
  621. continue;
  622. pcpu = pcpu_devices + cpu;
  623. pcpu->address = address + j;
  624. pcpu->state =
  625. (cpu >= info->configured*(smp_cpu_mtid + 1)) ?
  626. CPU_STATE_STANDBY : CPU_STATE_CONFIGURED;
  627. smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN);
  628. set_cpu_present(cpu, true);
  629. if (sysfs_add && smp_add_present_cpu(cpu) != 0)
  630. set_cpu_present(cpu, false);
  631. else
  632. nr++;
  633. cpu = cpumask_next(cpu, &avail);
  634. if (cpu >= nr_cpu_ids)
  635. break;
  636. }
  637. }
  638. return nr;
  639. }
  640. static void __init smp_detect_cpus(void)
  641. {
  642. unsigned int cpu, mtid, c_cpus, s_cpus;
  643. struct sclp_core_info *info;
  644. u16 address;
  645. /* Get CPU information */
  646. info = smp_get_core_info();
  647. if (!info)
  648. panic("smp_detect_cpus failed to allocate memory\n");
  649. /* Find boot CPU type */
  650. if (sclp.has_core_type) {
  651. address = stap();
  652. for (cpu = 0; cpu < info->combined; cpu++)
  653. if (info->core[cpu].core_id == address) {
  654. /* The boot cpu dictates the cpu type. */
  655. boot_core_type = info->core[cpu].type;
  656. break;
  657. }
  658. if (cpu >= info->combined)
  659. panic("Could not find boot CPU type");
  660. }
  661. /* Set multi-threading state for the current system */
  662. mtid = boot_core_type ? sclp.mtid : sclp.mtid_cp;
  663. mtid = (mtid < smp_max_threads) ? mtid : smp_max_threads - 1;
  664. pcpu_set_smt(mtid);
  665. /* Print number of CPUs */
  666. c_cpus = s_cpus = 0;
  667. for (cpu = 0; cpu < info->combined; cpu++) {
  668. if (sclp.has_core_type &&
  669. info->core[cpu].type != boot_core_type)
  670. continue;
  671. if (cpu < info->configured)
  672. c_cpus += smp_cpu_mtid + 1;
  673. else
  674. s_cpus += smp_cpu_mtid + 1;
  675. }
  676. pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus);
  677. /* Add CPUs present at boot */
  678. get_online_cpus();
  679. __smp_rescan_cpus(info, 0);
  680. put_online_cpus();
  681. kfree(info);
  682. }
  683. /*
  684. * Activate a secondary processor.
  685. */
  686. static void smp_start_secondary(void *cpuvoid)
  687. {
  688. S390_lowcore.last_update_clock = get_tod_clock();
  689. S390_lowcore.restart_stack = (unsigned long) restart_stack;
  690. S390_lowcore.restart_fn = (unsigned long) do_restart;
  691. S390_lowcore.restart_data = 0;
  692. S390_lowcore.restart_source = -1UL;
  693. restore_access_regs(S390_lowcore.access_regs_save_area);
  694. __ctl_load(S390_lowcore.cregs_save_area, 0, 15);
  695. __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
  696. cpu_init();
  697. preempt_disable();
  698. init_cpu_timer();
  699. vtime_init();
  700. pfault_init();
  701. notify_cpu_starting(smp_processor_id());
  702. set_cpu_online(smp_processor_id(), true);
  703. inc_irq_stat(CPU_RST);
  704. local_irq_enable();
  705. cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
  706. }
  707. /* Upping and downing of CPUs */
  708. int __cpu_up(unsigned int cpu, struct task_struct *tidle)
  709. {
  710. struct pcpu *pcpu;
  711. int base, i, rc;
  712. pcpu = pcpu_devices + cpu;
  713. if (pcpu->state != CPU_STATE_CONFIGURED)
  714. return -EIO;
  715. base = cpu - (cpu % (smp_cpu_mtid + 1));
  716. for (i = 0; i <= smp_cpu_mtid; i++) {
  717. if (base + i < nr_cpu_ids)
  718. if (cpu_online(base + i))
  719. break;
  720. }
  721. /*
  722. * If this is the first CPU of the core to get online
  723. * do an initial CPU reset.
  724. */
  725. if (i > smp_cpu_mtid &&
  726. pcpu_sigp_retry(pcpu_devices + base, SIGP_INITIAL_CPU_RESET, 0) !=
  727. SIGP_CC_ORDER_CODE_ACCEPTED)
  728. return -EIO;
  729. rc = pcpu_alloc_lowcore(pcpu, cpu);
  730. if (rc)
  731. return rc;
  732. pcpu_prepare_secondary(pcpu, cpu);
  733. pcpu_attach_task(pcpu, tidle);
  734. pcpu_start_fn(pcpu, smp_start_secondary, NULL);
  735. /* Wait until cpu puts itself in the online & active maps */
  736. while (!cpu_online(cpu))
  737. cpu_relax();
  738. return 0;
  739. }
  740. static unsigned int setup_possible_cpus __initdata;
  741. static int __init _setup_possible_cpus(char *s)
  742. {
  743. get_option(&s, &setup_possible_cpus);
  744. return 0;
  745. }
  746. early_param("possible_cpus", _setup_possible_cpus);
  747. #ifdef CONFIG_HOTPLUG_CPU
  748. int __cpu_disable(void)
  749. {
  750. unsigned long cregs[16];
  751. /* Handle possible pending IPIs */
  752. smp_handle_ext_call();
  753. set_cpu_online(smp_processor_id(), false);
  754. /* Disable pseudo page faults on this cpu. */
  755. pfault_fini();
  756. /* Disable interrupt sources via control register. */
  757. __ctl_store(cregs, 0, 15);
  758. cregs[0] &= ~0x0000ee70UL; /* disable all external interrupts */
  759. cregs[6] &= ~0xff000000UL; /* disable all I/O interrupts */
  760. cregs[14] &= ~0x1f000000UL; /* disable most machine checks */
  761. __ctl_load(cregs, 0, 15);
  762. clear_cpu_flag(CIF_NOHZ_DELAY);
  763. return 0;
  764. }
  765. void __cpu_die(unsigned int cpu)
  766. {
  767. struct pcpu *pcpu;
  768. /* Wait until target cpu is down */
  769. pcpu = pcpu_devices + cpu;
  770. while (!pcpu_stopped(pcpu))
  771. cpu_relax();
  772. pcpu_free_lowcore(pcpu);
  773. cpumask_clear_cpu(cpu, mm_cpumask(&init_mm));
  774. cpumask_clear_cpu(cpu, &init_mm.context.cpu_attach_mask);
  775. }
  776. void __noreturn cpu_die(void)
  777. {
  778. idle_task_exit();
  779. __bpon();
  780. pcpu_sigp_retry(pcpu_devices + smp_processor_id(), SIGP_STOP, 0);
  781. for (;;) ;
  782. }
  783. #endif /* CONFIG_HOTPLUG_CPU */
  784. void __init smp_fill_possible_mask(void)
  785. {
  786. unsigned int possible, sclp_max, cpu;
  787. sclp_max = max(sclp.mtid, sclp.mtid_cp) + 1;
  788. sclp_max = min(smp_max_threads, sclp_max);
  789. sclp_max = (sclp.max_cores * sclp_max) ?: nr_cpu_ids;
  790. possible = setup_possible_cpus ?: nr_cpu_ids;
  791. possible = min(possible, sclp_max);
  792. for (cpu = 0; cpu < possible && cpu < nr_cpu_ids; cpu++)
  793. set_cpu_possible(cpu, true);
  794. }
  795. void __init smp_prepare_cpus(unsigned int max_cpus)
  796. {
  797. /* request the 0x1201 emergency signal external interrupt */
  798. if (register_external_irq(EXT_IRQ_EMERGENCY_SIG, do_ext_call_interrupt))
  799. panic("Couldn't request external interrupt 0x1201");
  800. /* request the 0x1202 external call external interrupt */
  801. if (register_external_irq(EXT_IRQ_EXTERNAL_CALL, do_ext_call_interrupt))
  802. panic("Couldn't request external interrupt 0x1202");
  803. smp_detect_cpus();
  804. }
  805. void __init smp_prepare_boot_cpu(void)
  806. {
  807. struct pcpu *pcpu = pcpu_devices;
  808. pcpu->state = CPU_STATE_CONFIGURED;
  809. pcpu->address = stap();
  810. pcpu->lowcore = (struct lowcore *)(unsigned long) store_prefix();
  811. S390_lowcore.percpu_offset = __per_cpu_offset[0];
  812. smp_cpu_set_polarization(0, POLARIZATION_UNKNOWN);
  813. set_cpu_present(0, true);
  814. set_cpu_online(0, true);
  815. }
  816. void __init smp_cpus_done(unsigned int max_cpus)
  817. {
  818. }
  819. void __init smp_setup_processor_id(void)
  820. {
  821. S390_lowcore.cpu_nr = 0;
  822. S390_lowcore.spinlock_lockval = arch_spin_lockval(0);
  823. }
  824. /*
  825. * the frequency of the profiling timer can be changed
  826. * by writing a multiplier value into /proc/profile.
  827. *
  828. * usually you want to run this on all CPUs ;)
  829. */
  830. int setup_profiling_timer(unsigned int multiplier)
  831. {
  832. return 0;
  833. }
  834. #ifdef CONFIG_HOTPLUG_CPU
  835. static ssize_t cpu_configure_show(struct device *dev,
  836. struct device_attribute *attr, char *buf)
  837. {
  838. ssize_t count;
  839. mutex_lock(&smp_cpu_state_mutex);
  840. count = sprintf(buf, "%d\n", pcpu_devices[dev->id].state);
  841. mutex_unlock(&smp_cpu_state_mutex);
  842. return count;
  843. }
  844. static ssize_t cpu_configure_store(struct device *dev,
  845. struct device_attribute *attr,
  846. const char *buf, size_t count)
  847. {
  848. struct pcpu *pcpu;
  849. int cpu, val, rc, i;
  850. char delim;
  851. if (sscanf(buf, "%d %c", &val, &delim) != 1)
  852. return -EINVAL;
  853. if (val != 0 && val != 1)
  854. return -EINVAL;
  855. get_online_cpus();
  856. mutex_lock(&smp_cpu_state_mutex);
  857. rc = -EBUSY;
  858. /* disallow configuration changes of online cpus and cpu 0 */
  859. cpu = dev->id;
  860. cpu -= cpu % (smp_cpu_mtid + 1);
  861. if (cpu == 0)
  862. goto out;
  863. for (i = 0; i <= smp_cpu_mtid; i++)
  864. if (cpu_online(cpu + i))
  865. goto out;
  866. pcpu = pcpu_devices + cpu;
  867. rc = 0;
  868. switch (val) {
  869. case 0:
  870. if (pcpu->state != CPU_STATE_CONFIGURED)
  871. break;
  872. rc = sclp_core_deconfigure(pcpu->address >> smp_cpu_mt_shift);
  873. if (rc)
  874. break;
  875. for (i = 0; i <= smp_cpu_mtid; i++) {
  876. if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
  877. continue;
  878. pcpu[i].state = CPU_STATE_STANDBY;
  879. smp_cpu_set_polarization(cpu + i,
  880. POLARIZATION_UNKNOWN);
  881. }
  882. topology_expect_change();
  883. break;
  884. case 1:
  885. if (pcpu->state != CPU_STATE_STANDBY)
  886. break;
  887. rc = sclp_core_configure(pcpu->address >> smp_cpu_mt_shift);
  888. if (rc)
  889. break;
  890. for (i = 0; i <= smp_cpu_mtid; i++) {
  891. if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
  892. continue;
  893. pcpu[i].state = CPU_STATE_CONFIGURED;
  894. smp_cpu_set_polarization(cpu + i,
  895. POLARIZATION_UNKNOWN);
  896. }
  897. topology_expect_change();
  898. break;
  899. default:
  900. break;
  901. }
  902. out:
  903. mutex_unlock(&smp_cpu_state_mutex);
  904. put_online_cpus();
  905. return rc ? rc : count;
  906. }
  907. static DEVICE_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store);
  908. #endif /* CONFIG_HOTPLUG_CPU */
  909. static ssize_t show_cpu_address(struct device *dev,
  910. struct device_attribute *attr, char *buf)
  911. {
  912. return sprintf(buf, "%d\n", pcpu_devices[dev->id].address);
  913. }
  914. static DEVICE_ATTR(address, 0444, show_cpu_address, NULL);
  915. static struct attribute *cpu_common_attrs[] = {
  916. #ifdef CONFIG_HOTPLUG_CPU
  917. &dev_attr_configure.attr,
  918. #endif
  919. &dev_attr_address.attr,
  920. NULL,
  921. };
  922. static struct attribute_group cpu_common_attr_group = {
  923. .attrs = cpu_common_attrs,
  924. };
  925. static struct attribute *cpu_online_attrs[] = {
  926. &dev_attr_idle_count.attr,
  927. &dev_attr_idle_time_us.attr,
  928. NULL,
  929. };
  930. static struct attribute_group cpu_online_attr_group = {
  931. .attrs = cpu_online_attrs,
  932. };
  933. static int smp_cpu_notify(struct notifier_block *self, unsigned long action,
  934. void *hcpu)
  935. {
  936. unsigned int cpu = (unsigned int)(long)hcpu;
  937. struct device *s = &per_cpu(cpu_device, cpu)->dev;
  938. int err = 0;
  939. switch (action & ~CPU_TASKS_FROZEN) {
  940. case CPU_ONLINE:
  941. err = sysfs_create_group(&s->kobj, &cpu_online_attr_group);
  942. break;
  943. case CPU_DEAD:
  944. sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
  945. break;
  946. }
  947. return notifier_from_errno(err);
  948. }
  949. static int smp_add_present_cpu(int cpu)
  950. {
  951. struct device *s;
  952. struct cpu *c;
  953. int rc;
  954. c = kzalloc(sizeof(*c), GFP_KERNEL);
  955. if (!c)
  956. return -ENOMEM;
  957. per_cpu(cpu_device, cpu) = c;
  958. s = &c->dev;
  959. c->hotpluggable = 1;
  960. rc = register_cpu(c, cpu);
  961. if (rc)
  962. goto out;
  963. rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group);
  964. if (rc)
  965. goto out_cpu;
  966. if (cpu_online(cpu)) {
  967. rc = sysfs_create_group(&s->kobj, &cpu_online_attr_group);
  968. if (rc)
  969. goto out_online;
  970. }
  971. rc = topology_cpu_init(c);
  972. if (rc)
  973. goto out_topology;
  974. return 0;
  975. out_topology:
  976. if (cpu_online(cpu))
  977. sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
  978. out_online:
  979. sysfs_remove_group(&s->kobj, &cpu_common_attr_group);
  980. out_cpu:
  981. #ifdef CONFIG_HOTPLUG_CPU
  982. unregister_cpu(c);
  983. #endif
  984. out:
  985. return rc;
  986. }
  987. #ifdef CONFIG_HOTPLUG_CPU
  988. int __ref smp_rescan_cpus(void)
  989. {
  990. struct sclp_core_info *info;
  991. int nr;
  992. info = smp_get_core_info();
  993. if (!info)
  994. return -ENOMEM;
  995. get_online_cpus();
  996. mutex_lock(&smp_cpu_state_mutex);
  997. nr = __smp_rescan_cpus(info, 1);
  998. mutex_unlock(&smp_cpu_state_mutex);
  999. put_online_cpus();
  1000. kfree(info);
  1001. if (nr)
  1002. topology_schedule_update();
  1003. return 0;
  1004. }
  1005. static ssize_t __ref rescan_store(struct device *dev,
  1006. struct device_attribute *attr,
  1007. const char *buf,
  1008. size_t count)
  1009. {
  1010. int rc;
  1011. rc = smp_rescan_cpus();
  1012. return rc ? rc : count;
  1013. }
  1014. static DEVICE_ATTR(rescan, 0200, NULL, rescan_store);
  1015. #endif /* CONFIG_HOTPLUG_CPU */
  1016. static int __init s390_smp_init(void)
  1017. {
  1018. int cpu, rc = 0;
  1019. #ifdef CONFIG_HOTPLUG_CPU
  1020. rc = device_create_file(cpu_subsys.dev_root, &dev_attr_rescan);
  1021. if (rc)
  1022. return rc;
  1023. #endif
  1024. cpu_notifier_register_begin();
  1025. for_each_present_cpu(cpu) {
  1026. rc = smp_add_present_cpu(cpu);
  1027. if (rc)
  1028. goto out;
  1029. }
  1030. __hotcpu_notifier(smp_cpu_notify, 0);
  1031. out:
  1032. cpu_notifier_register_done();
  1033. return rc;
  1034. }
  1035. subsys_initcall(s390_smp_init);