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linux-libre
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arch
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m32r
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include
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asm
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m32700ut
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m32700ut_lcd.h

m32700ut_lcd.h 2.2 KB
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  1. #ifndef _M32700UT_M32700UT_LCD_H
    2. 

  2. #define _M32700UT_M32700UT_LCD_H
    3. 

  3. 

  4. /*
    5. 

  5.  * include/asm-m32r/m32700ut/m32700ut_lcd.h
    6. 

  6.  *
    7. 

  7.  * M32700UT-LCD board
    8. 

  8.  *
    9. 

  9.  * Copyright (c) 2002	Takeo Takahashi
    10. 

  10.  *
    11. 

  11.  * This file is subject to the terms and conditions of the GNU General
    12. 

  12.  * Public License.  See the file "COPYING" in the main directory of
    13. 

  13.  * this archive for more details.
    14. 

  14.  */
    15. 

  15. 

  16. #ifndef __ASSEMBLY__
    17. 

  17. /*
    18. 

  18.  * C functions use non-cache address.
    19. 

  19.  */
    20. 

  20. #define M32700UT_LCD_BASE	(0x10000000 /* + NONCACHE_OFFSET */)
    21. 

  21. #else
    22. 

  22. #define M32700UT_LCD_BASE	(0x10000000 + NONCACHE_OFFSET)
    23. 

  23. #endif /* __ASSEMBLY__ */
    24. 

  24. 

  25. /*
    26. 

  26.  * ICU
    27. 

  27.  */
    28. 

  28. #define M32700UT_LCD_IRQ_BAT_INT	(M32700UT_LCD_PLD_IRQ_BASE + 1)
    29. 

  29. #define M32700UT_LCD_IRQ_USB_INT1	(M32700UT_LCD_PLD_IRQ_BASE + 2)
    30. 

  30. #define M32700UT_LCD_IRQ_AUDT0		(M32700UT_LCD_PLD_IRQ_BASE + 3)
    31. 

  31. #define M32700UT_LCD_IRQ_AUDT2		(M32700UT_LCD_PLD_IRQ_BASE + 4)
    32. 

  32. #define M32700UT_LCD_IRQ_BATSIO_RCV	(M32700UT_LCD_PLD_IRQ_BASE + 16)
    33. 

  33. #define M32700UT_LCD_IRQ_BATSIO_SND	(M32700UT_LCD_PLD_IRQ_BASE + 17)
    34. 

  34. #define M32700UT_LCD_IRQ_ASNDSIO_RCV	(M32700UT_LCD_PLD_IRQ_BASE + 18)
    35. 

  35. #define M32700UT_LCD_IRQ_ASNDSIO_SND	(M32700UT_LCD_PLD_IRQ_BASE + 19)
    36. 

  36. #define M32700UT_LCD_IRQ_ACNLSIO_SND	(M32700UT_LCD_PLD_IRQ_BASE + 21)
    37. 

  37. 

  38. #define M32700UT_LCD_ICUISTS	__reg16(M32700UT_LCD_BASE + 0x300002)
    39. 

  39. #define M32700UT_LCD_ICUISTS_VECB_MASK	(0xf000)
    40. 

  40. #define M32700UT_LCD_VECB(x)	((x) & M32700UT_LCD_ICUISTS_VECB_MASK)
    41. 

  41. #define M32700UT_LCD_ICUISTS_ISN_MASK	(0x07c0)
    42. 

  42. #define M32700UT_LCD_ICUISTS_ISN(x)	((x) & M32700UT_LCD_ICUISTS_ISN_MASK)
    43. 

  43. #define M32700UT_LCD_ICUIREQ0	__reg16(M32700UT_LCD_BASE + 0x300004)
    44. 

  44. #define M32700UT_LCD_ICUIREQ1	__reg16(M32700UT_LCD_BASE + 0x300006)
    45. 

  45. #define M32700UT_LCD_ICUCR1	__reg16(M32700UT_LCD_BASE + 0x300020)
    46. 

  46. #define M32700UT_LCD_ICUCR2	__reg16(M32700UT_LCD_BASE + 0x300022)
    47. 

  47. #define M32700UT_LCD_ICUCR3	__reg16(M32700UT_LCD_BASE + 0x300024)
    48. 

  48. #define M32700UT_LCD_ICUCR4	__reg16(M32700UT_LCD_BASE + 0x300026)
    49. 

  49. #define M32700UT_LCD_ICUCR16	__reg16(M32700UT_LCD_BASE + 0x300030)
    50. 

  50. #define M32700UT_LCD_ICUCR17	__reg16(M32700UT_LCD_BASE + 0x300032)
    51. 

  51. #define M32700UT_LCD_ICUCR18	__reg16(M32700UT_LCD_BASE + 0x300034)
    52. 

  52. #define M32700UT_LCD_ICUCR19	__reg16(M32700UT_LCD_BASE + 0x300036)
    53. 

  53. #define M32700UT_LCD_ICUCR21	__reg16(M32700UT_LCD_BASE + 0x30003a)
    54. 

  54. 

  55. #endif /* _M32700UT_M32700UT_LCD_H */
    56. 

  56.