lpass-apq8016.c 6.9 KB

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  1. /*
  2. * Copyright (c) 2010-2011,2013-2015 The Linux Foundation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 and
  6. * only version 2 as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. *
  13. * lpass-apq8016.c -- ALSA SoC CPU DAI driver for APQ8016 LPASS
  14. *
  15. */
  16. #include <linux/clk.h>
  17. #include <linux/device.h>
  18. #include <linux/err.h>
  19. #include <linux/kernel.h>
  20. #include <linux/module.h>
  21. #include <linux/of.h>
  22. #include <linux/platform_device.h>
  23. #include <sound/pcm.h>
  24. #include <sound/pcm_params.h>
  25. #include <sound/soc.h>
  26. #include <sound/soc-dai.h>
  27. #include <dt-bindings/sound/apq8016-lpass.h>
  28. #include "lpass-lpaif-reg.h"
  29. #include "lpass.h"
  30. static struct snd_soc_dai_driver apq8016_lpass_cpu_dai_driver[] = {
  31. [MI2S_PRIMARY] = {
  32. .id = MI2S_PRIMARY,
  33. .name = "Primary MI2S",
  34. .playback = {
  35. .stream_name = "Primary Playback",
  36. .formats = SNDRV_PCM_FMTBIT_S16 |
  37. SNDRV_PCM_FMTBIT_S24 |
  38. SNDRV_PCM_FMTBIT_S32,
  39. .rates = SNDRV_PCM_RATE_8000 |
  40. SNDRV_PCM_RATE_16000 |
  41. SNDRV_PCM_RATE_32000 |
  42. SNDRV_PCM_RATE_48000 |
  43. SNDRV_PCM_RATE_96000,
  44. .rate_min = 8000,
  45. .rate_max = 96000,
  46. .channels_min = 1,
  47. .channels_max = 8,
  48. },
  49. .probe = &asoc_qcom_lpass_cpu_dai_probe,
  50. .ops = &asoc_qcom_lpass_cpu_dai_ops,
  51. },
  52. [MI2S_SECONDARY] = {
  53. .id = MI2S_SECONDARY,
  54. .name = "Secondary MI2S",
  55. .playback = {
  56. .stream_name = "Secondary Playback",
  57. .formats = SNDRV_PCM_FMTBIT_S16 |
  58. SNDRV_PCM_FMTBIT_S24 |
  59. SNDRV_PCM_FMTBIT_S32,
  60. .rates = SNDRV_PCM_RATE_8000 |
  61. SNDRV_PCM_RATE_16000 |
  62. SNDRV_PCM_RATE_32000 |
  63. SNDRV_PCM_RATE_48000 |
  64. SNDRV_PCM_RATE_96000,
  65. .rate_min = 8000,
  66. .rate_max = 96000,
  67. .channels_min = 1,
  68. .channels_max = 8,
  69. },
  70. .probe = &asoc_qcom_lpass_cpu_dai_probe,
  71. .ops = &asoc_qcom_lpass_cpu_dai_ops,
  72. },
  73. [MI2S_TERTIARY] = {
  74. .id = MI2S_TERTIARY,
  75. .name = "Tertiary MI2S",
  76. .capture = {
  77. .stream_name = "Tertiary Capture",
  78. .formats = SNDRV_PCM_FMTBIT_S16 |
  79. SNDRV_PCM_FMTBIT_S24 |
  80. SNDRV_PCM_FMTBIT_S32,
  81. .rates = SNDRV_PCM_RATE_8000 |
  82. SNDRV_PCM_RATE_16000 |
  83. SNDRV_PCM_RATE_32000 |
  84. SNDRV_PCM_RATE_48000 |
  85. SNDRV_PCM_RATE_96000,
  86. .rate_min = 8000,
  87. .rate_max = 96000,
  88. .channels_min = 1,
  89. .channels_max = 8,
  90. },
  91. .probe = &asoc_qcom_lpass_cpu_dai_probe,
  92. .ops = &asoc_qcom_lpass_cpu_dai_ops,
  93. },
  94. [MI2S_QUATERNARY] = {
  95. .id = MI2S_QUATERNARY,
  96. .name = "Quatenary MI2S",
  97. .playback = {
  98. .stream_name = "Quatenary Playback",
  99. .formats = SNDRV_PCM_FMTBIT_S16 |
  100. SNDRV_PCM_FMTBIT_S24 |
  101. SNDRV_PCM_FMTBIT_S32,
  102. .rates = SNDRV_PCM_RATE_8000 |
  103. SNDRV_PCM_RATE_16000 |
  104. SNDRV_PCM_RATE_32000 |
  105. SNDRV_PCM_RATE_48000 |
  106. SNDRV_PCM_RATE_96000,
  107. .rate_min = 8000,
  108. .rate_max = 96000,
  109. .channels_min = 1,
  110. .channels_max = 8,
  111. },
  112. .capture = {
  113. .stream_name = "Quatenary Capture",
  114. .formats = SNDRV_PCM_FMTBIT_S16 |
  115. SNDRV_PCM_FMTBIT_S24 |
  116. SNDRV_PCM_FMTBIT_S32,
  117. .rates = SNDRV_PCM_RATE_8000 |
  118. SNDRV_PCM_RATE_16000 |
  119. SNDRV_PCM_RATE_32000 |
  120. SNDRV_PCM_RATE_48000 |
  121. SNDRV_PCM_RATE_96000,
  122. .rate_min = 8000,
  123. .rate_max = 96000,
  124. .channels_min = 1,
  125. .channels_max = 8,
  126. },
  127. .probe = &asoc_qcom_lpass_cpu_dai_probe,
  128. .ops = &asoc_qcom_lpass_cpu_dai_ops,
  129. },
  130. };
  131. static int apq8016_lpass_alloc_dma_channel(struct lpass_data *drvdata,
  132. int direction)
  133. {
  134. struct lpass_variant *v = drvdata->variant;
  135. int chan = 0;
  136. if (direction == SNDRV_PCM_STREAM_PLAYBACK) {
  137. chan = find_first_zero_bit(&drvdata->dma_ch_bit_map,
  138. v->rdma_channels);
  139. if (chan >= v->rdma_channels)
  140. return -EBUSY;
  141. } else {
  142. chan = find_next_zero_bit(&drvdata->dma_ch_bit_map,
  143. v->wrdma_channel_start +
  144. v->wrdma_channels,
  145. v->wrdma_channel_start);
  146. if (chan >= v->wrdma_channel_start + v->wrdma_channels)
  147. return -EBUSY;
  148. }
  149. set_bit(chan, &drvdata->dma_ch_bit_map);
  150. return chan;
  151. }
  152. static int apq8016_lpass_free_dma_channel(struct lpass_data *drvdata, int chan)
  153. {
  154. clear_bit(chan, &drvdata->dma_ch_bit_map);
  155. return 0;
  156. }
  157. static int apq8016_lpass_init(struct platform_device *pdev)
  158. {
  159. struct lpass_data *drvdata = platform_get_drvdata(pdev);
  160. struct device *dev = &pdev->dev;
  161. int ret;
  162. drvdata->pcnoc_mport_clk = devm_clk_get(dev, "pcnoc-mport-clk");
  163. if (IS_ERR(drvdata->pcnoc_mport_clk)) {
  164. dev_err(&pdev->dev, "%s() error getting pcnoc-mport-clk: %ld\n",
  165. __func__, PTR_ERR(drvdata->pcnoc_mport_clk));
  166. return PTR_ERR(drvdata->pcnoc_mport_clk);
  167. }
  168. ret = clk_prepare_enable(drvdata->pcnoc_mport_clk);
  169. if (ret) {
  170. dev_err(&pdev->dev, "%s() Error enabling pcnoc-mport-clk: %d\n",
  171. __func__, ret);
  172. return ret;
  173. }
  174. drvdata->pcnoc_sway_clk = devm_clk_get(dev, "pcnoc-sway-clk");
  175. if (IS_ERR(drvdata->pcnoc_sway_clk)) {
  176. dev_err(&pdev->dev, "%s() error getting pcnoc-sway-clk: %ld\n",
  177. __func__, PTR_ERR(drvdata->pcnoc_sway_clk));
  178. return PTR_ERR(drvdata->pcnoc_sway_clk);
  179. }
  180. ret = clk_prepare_enable(drvdata->pcnoc_sway_clk);
  181. if (ret) {
  182. dev_err(&pdev->dev, "%s() Error enabling pcnoc_sway_clk: %d\n",
  183. __func__, ret);
  184. return ret;
  185. }
  186. return 0;
  187. }
  188. static int apq8016_lpass_exit(struct platform_device *pdev)
  189. {
  190. struct lpass_data *drvdata = platform_get_drvdata(pdev);
  191. clk_disable_unprepare(drvdata->pcnoc_mport_clk);
  192. clk_disable_unprepare(drvdata->pcnoc_sway_clk);
  193. return 0;
  194. }
  195. static struct lpass_variant apq8016_data = {
  196. .i2sctrl_reg_base = 0x1000,
  197. .i2sctrl_reg_stride = 0x1000,
  198. .i2s_ports = 4,
  199. .irq_reg_base = 0x6000,
  200. .irq_reg_stride = 0x1000,
  201. .irq_ports = 3,
  202. .rdma_reg_base = 0x8400,
  203. .rdma_reg_stride = 0x1000,
  204. .rdma_channels = 2,
  205. .dmactl_audif_start = 1,
  206. .wrdma_reg_base = 0xB000,
  207. .wrdma_reg_stride = 0x1000,
  208. .wrdma_channel_start = 5,
  209. .wrdma_channels = 2,
  210. .dai_driver = apq8016_lpass_cpu_dai_driver,
  211. .num_dai = ARRAY_SIZE(apq8016_lpass_cpu_dai_driver),
  212. .init = apq8016_lpass_init,
  213. .exit = apq8016_lpass_exit,
  214. .alloc_dma_channel = apq8016_lpass_alloc_dma_channel,
  215. .free_dma_channel = apq8016_lpass_free_dma_channel,
  216. };
  217. static const struct of_device_id apq8016_lpass_cpu_device_id[] = {
  218. { .compatible = "qcom,lpass-cpu-apq8016", .data = &apq8016_data },
  219. {}
  220. };
  221. MODULE_DEVICE_TABLE(of, apq8016_lpass_cpu_device_id);
  222. static struct platform_driver apq8016_lpass_cpu_platform_driver = {
  223. .driver = {
  224. .name = "apq8016-lpass-cpu",
  225. .of_match_table = of_match_ptr(apq8016_lpass_cpu_device_id),
  226. },
  227. .probe = asoc_qcom_lpass_cpu_platform_probe,
  228. .remove = asoc_qcom_lpass_cpu_platform_remove,
  229. };
  230. module_platform_driver(apq8016_lpass_cpu_platform_driver);
  231. MODULE_DESCRIPTION("APQ8016 LPASS CPU Driver");
  232. MODULE_LICENSE("GPL v2");