mmp-sspa.c 12 KB

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  1. /*
  2. * linux/sound/soc/pxa/mmp-sspa.c
  3. * Base on pxa2xx-ssp.c
  4. *
  5. * Copyright (C) 2011 Marvell International Ltd.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. *
  21. */
  22. #include <linux/init.h>
  23. #include <linux/module.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/delay.h>
  26. #include <linux/clk.h>
  27. #include <linux/slab.h>
  28. #include <linux/pxa2xx_ssp.h>
  29. #include <linux/io.h>
  30. #include <linux/dmaengine.h>
  31. #include <sound/core.h>
  32. #include <sound/pcm.h>
  33. #include <sound/initval.h>
  34. #include <sound/pcm_params.h>
  35. #include <sound/soc.h>
  36. #include <sound/pxa2xx-lib.h>
  37. #include <sound/dmaengine_pcm.h>
  38. #include "mmp-sspa.h"
  39. /*
  40. * SSPA audio private data
  41. */
  42. struct sspa_priv {
  43. struct ssp_device *sspa;
  44. struct snd_dmaengine_dai_dma_data *dma_params;
  45. struct clk *audio_clk;
  46. struct clk *sysclk;
  47. int dai_fmt;
  48. int running_cnt;
  49. };
  50. static void mmp_sspa_write_reg(struct ssp_device *sspa, u32 reg, u32 val)
  51. {
  52. __raw_writel(val, sspa->mmio_base + reg);
  53. }
  54. static u32 mmp_sspa_read_reg(struct ssp_device *sspa, u32 reg)
  55. {
  56. return __raw_readl(sspa->mmio_base + reg);
  57. }
  58. static void mmp_sspa_tx_enable(struct ssp_device *sspa)
  59. {
  60. unsigned int sspa_sp;
  61. sspa_sp = mmp_sspa_read_reg(sspa, SSPA_TXSP);
  62. sspa_sp |= SSPA_SP_S_EN;
  63. sspa_sp |= SSPA_SP_WEN;
  64. mmp_sspa_write_reg(sspa, SSPA_TXSP, sspa_sp);
  65. }
  66. static void mmp_sspa_tx_disable(struct ssp_device *sspa)
  67. {
  68. unsigned int sspa_sp;
  69. sspa_sp = mmp_sspa_read_reg(sspa, SSPA_TXSP);
  70. sspa_sp &= ~SSPA_SP_S_EN;
  71. sspa_sp |= SSPA_SP_WEN;
  72. mmp_sspa_write_reg(sspa, SSPA_TXSP, sspa_sp);
  73. }
  74. static void mmp_sspa_rx_enable(struct ssp_device *sspa)
  75. {
  76. unsigned int sspa_sp;
  77. sspa_sp = mmp_sspa_read_reg(sspa, SSPA_RXSP);
  78. sspa_sp |= SSPA_SP_S_EN;
  79. sspa_sp |= SSPA_SP_WEN;
  80. mmp_sspa_write_reg(sspa, SSPA_RXSP, sspa_sp);
  81. }
  82. static void mmp_sspa_rx_disable(struct ssp_device *sspa)
  83. {
  84. unsigned int sspa_sp;
  85. sspa_sp = mmp_sspa_read_reg(sspa, SSPA_RXSP);
  86. sspa_sp &= ~SSPA_SP_S_EN;
  87. sspa_sp |= SSPA_SP_WEN;
  88. mmp_sspa_write_reg(sspa, SSPA_RXSP, sspa_sp);
  89. }
  90. static int mmp_sspa_startup(struct snd_pcm_substream *substream,
  91. struct snd_soc_dai *dai)
  92. {
  93. struct sspa_priv *priv = snd_soc_dai_get_drvdata(dai);
  94. clk_enable(priv->sysclk);
  95. clk_enable(priv->sspa->clk);
  96. return 0;
  97. }
  98. static void mmp_sspa_shutdown(struct snd_pcm_substream *substream,
  99. struct snd_soc_dai *dai)
  100. {
  101. struct sspa_priv *priv = snd_soc_dai_get_drvdata(dai);
  102. clk_disable(priv->sspa->clk);
  103. clk_disable(priv->sysclk);
  104. return;
  105. }
  106. /*
  107. * Set the SSP ports SYSCLK.
  108. */
  109. static int mmp_sspa_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
  110. int clk_id, unsigned int freq, int dir)
  111. {
  112. struct sspa_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
  113. int ret = 0;
  114. switch (clk_id) {
  115. case MMP_SSPA_CLK_AUDIO:
  116. ret = clk_set_rate(priv->audio_clk, freq);
  117. if (ret)
  118. return ret;
  119. break;
  120. case MMP_SSPA_CLK_PLL:
  121. case MMP_SSPA_CLK_VCXO:
  122. /* not support yet */
  123. return -EINVAL;
  124. default:
  125. return -EINVAL;
  126. }
  127. return 0;
  128. }
  129. static int mmp_sspa_set_dai_pll(struct snd_soc_dai *cpu_dai, int pll_id,
  130. int source, unsigned int freq_in,
  131. unsigned int freq_out)
  132. {
  133. struct sspa_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
  134. int ret = 0;
  135. switch (pll_id) {
  136. case MMP_SYSCLK:
  137. ret = clk_set_rate(priv->sysclk, freq_out);
  138. if (ret)
  139. return ret;
  140. break;
  141. case MMP_SSPA_CLK:
  142. ret = clk_set_rate(priv->sspa->clk, freq_out);
  143. if (ret)
  144. return ret;
  145. break;
  146. default:
  147. return -ENODEV;
  148. }
  149. return 0;
  150. }
  151. /*
  152. * Set up the sspa dai format. The sspa port must be inactive
  153. * before calling this function as the physical
  154. * interface format is changed.
  155. */
  156. static int mmp_sspa_set_dai_fmt(struct snd_soc_dai *cpu_dai,
  157. unsigned int fmt)
  158. {
  159. struct sspa_priv *sspa_priv = snd_soc_dai_get_drvdata(cpu_dai);
  160. struct ssp_device *sspa = sspa_priv->sspa;
  161. u32 sspa_sp, sspa_ctrl;
  162. /* check if we need to change anything at all */
  163. if (sspa_priv->dai_fmt == fmt)
  164. return 0;
  165. /* we can only change the settings if the port is not in use */
  166. if ((mmp_sspa_read_reg(sspa, SSPA_TXSP) & SSPA_SP_S_EN) ||
  167. (mmp_sspa_read_reg(sspa, SSPA_RXSP) & SSPA_SP_S_EN)) {
  168. dev_err(&sspa->pdev->dev,
  169. "can't change hardware dai format: stream is in use\n");
  170. return -EINVAL;
  171. }
  172. /* reset port settings */
  173. sspa_sp = SSPA_SP_WEN | SSPA_SP_S_RST | SSPA_SP_FFLUSH;
  174. sspa_ctrl = 0;
  175. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  176. case SND_SOC_DAIFMT_CBS_CFS:
  177. sspa_sp |= SSPA_SP_MSL;
  178. break;
  179. case SND_SOC_DAIFMT_CBM_CFM:
  180. break;
  181. default:
  182. return -EINVAL;
  183. }
  184. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  185. case SND_SOC_DAIFMT_NB_NF:
  186. sspa_sp |= SSPA_SP_FSP;
  187. break;
  188. default:
  189. return -EINVAL;
  190. }
  191. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  192. case SND_SOC_DAIFMT_I2S:
  193. sspa_sp |= SSPA_TXSP_FPER(63);
  194. sspa_sp |= SSPA_SP_FWID(31);
  195. sspa_ctrl |= SSPA_CTL_XDATDLY(1);
  196. break;
  197. default:
  198. return -EINVAL;
  199. }
  200. mmp_sspa_write_reg(sspa, SSPA_TXSP, sspa_sp);
  201. mmp_sspa_write_reg(sspa, SSPA_RXSP, sspa_sp);
  202. sspa_sp &= ~(SSPA_SP_S_RST | SSPA_SP_FFLUSH);
  203. mmp_sspa_write_reg(sspa, SSPA_TXSP, sspa_sp);
  204. mmp_sspa_write_reg(sspa, SSPA_RXSP, sspa_sp);
  205. /*
  206. * FIXME: hw issue, for the tx serial port,
  207. * can not config the master/slave mode;
  208. * so must clean this bit.
  209. * The master/slave mode has been set in the
  210. * rx port.
  211. */
  212. sspa_sp &= ~SSPA_SP_MSL;
  213. mmp_sspa_write_reg(sspa, SSPA_TXSP, sspa_sp);
  214. mmp_sspa_write_reg(sspa, SSPA_TXCTL, sspa_ctrl);
  215. mmp_sspa_write_reg(sspa, SSPA_RXCTL, sspa_ctrl);
  216. /* Since we are configuring the timings for the format by hand
  217. * we have to defer some things until hw_params() where we
  218. * know parameters like the sample size.
  219. */
  220. sspa_priv->dai_fmt = fmt;
  221. return 0;
  222. }
  223. /*
  224. * Set the SSPA audio DMA parameters and sample size.
  225. * Can be called multiple times by oss emulation.
  226. */
  227. static int mmp_sspa_hw_params(struct snd_pcm_substream *substream,
  228. struct snd_pcm_hw_params *params,
  229. struct snd_soc_dai *dai)
  230. {
  231. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  232. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  233. struct sspa_priv *sspa_priv = snd_soc_dai_get_drvdata(dai);
  234. struct ssp_device *sspa = sspa_priv->sspa;
  235. struct snd_dmaengine_dai_dma_data *dma_params;
  236. u32 sspa_ctrl;
  237. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  238. sspa_ctrl = mmp_sspa_read_reg(sspa, SSPA_TXCTL);
  239. else
  240. sspa_ctrl = mmp_sspa_read_reg(sspa, SSPA_RXCTL);
  241. sspa_ctrl &= ~SSPA_CTL_XFRLEN1_MASK;
  242. sspa_ctrl |= SSPA_CTL_XFRLEN1(params_channels(params) - 1);
  243. sspa_ctrl &= ~SSPA_CTL_XWDLEN1_MASK;
  244. sspa_ctrl |= SSPA_CTL_XWDLEN1(SSPA_CTL_32_BITS);
  245. sspa_ctrl &= ~SSPA_CTL_XSSZ1_MASK;
  246. switch (params_format(params)) {
  247. case SNDRV_PCM_FORMAT_S8:
  248. sspa_ctrl |= SSPA_CTL_XSSZ1(SSPA_CTL_8_BITS);
  249. break;
  250. case SNDRV_PCM_FORMAT_S16_LE:
  251. sspa_ctrl |= SSPA_CTL_XSSZ1(SSPA_CTL_16_BITS);
  252. break;
  253. case SNDRV_PCM_FORMAT_S20_3LE:
  254. sspa_ctrl |= SSPA_CTL_XSSZ1(SSPA_CTL_20_BITS);
  255. break;
  256. case SNDRV_PCM_FORMAT_S24_3LE:
  257. sspa_ctrl |= SSPA_CTL_XSSZ1(SSPA_CTL_24_BITS);
  258. break;
  259. case SNDRV_PCM_FORMAT_S32_LE:
  260. sspa_ctrl |= SSPA_CTL_XSSZ1(SSPA_CTL_32_BITS);
  261. break;
  262. default:
  263. return -EINVAL;
  264. }
  265. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  266. mmp_sspa_write_reg(sspa, SSPA_TXCTL, sspa_ctrl);
  267. mmp_sspa_write_reg(sspa, SSPA_TXFIFO_LL, 0x1);
  268. } else {
  269. mmp_sspa_write_reg(sspa, SSPA_RXCTL, sspa_ctrl);
  270. mmp_sspa_write_reg(sspa, SSPA_RXFIFO_UL, 0x0);
  271. }
  272. dma_params = &sspa_priv->dma_params[substream->stream];
  273. dma_params->addr = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
  274. (sspa->phys_base + SSPA_TXD) :
  275. (sspa->phys_base + SSPA_RXD);
  276. snd_soc_dai_set_dma_data(cpu_dai, substream, dma_params);
  277. return 0;
  278. }
  279. static int mmp_sspa_trigger(struct snd_pcm_substream *substream, int cmd,
  280. struct snd_soc_dai *dai)
  281. {
  282. struct sspa_priv *sspa_priv = snd_soc_dai_get_drvdata(dai);
  283. struct ssp_device *sspa = sspa_priv->sspa;
  284. int ret = 0;
  285. switch (cmd) {
  286. case SNDRV_PCM_TRIGGER_START:
  287. case SNDRV_PCM_TRIGGER_RESUME:
  288. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  289. /*
  290. * whatever playback or capture, must enable rx.
  291. * this is a hw issue, so need check if rx has been
  292. * enabled or not; if has been enabled by another
  293. * stream, do not enable again.
  294. */
  295. if (!sspa_priv->running_cnt)
  296. mmp_sspa_rx_enable(sspa);
  297. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  298. mmp_sspa_tx_enable(sspa);
  299. sspa_priv->running_cnt++;
  300. break;
  301. case SNDRV_PCM_TRIGGER_STOP:
  302. case SNDRV_PCM_TRIGGER_SUSPEND:
  303. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  304. sspa_priv->running_cnt--;
  305. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  306. mmp_sspa_tx_disable(sspa);
  307. /* have no capture stream, disable rx port */
  308. if (!sspa_priv->running_cnt)
  309. mmp_sspa_rx_disable(sspa);
  310. break;
  311. default:
  312. ret = -EINVAL;
  313. }
  314. return ret;
  315. }
  316. static int mmp_sspa_probe(struct snd_soc_dai *dai)
  317. {
  318. struct sspa_priv *priv = dev_get_drvdata(dai->dev);
  319. snd_soc_dai_set_drvdata(dai, priv);
  320. return 0;
  321. }
  322. #define MMP_SSPA_RATES SNDRV_PCM_RATE_8000_192000
  323. #define MMP_SSPA_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
  324. SNDRV_PCM_FMTBIT_S16_LE | \
  325. SNDRV_PCM_FMTBIT_S24_LE | \
  326. SNDRV_PCM_FMTBIT_S24_LE | \
  327. SNDRV_PCM_FMTBIT_S32_LE)
  328. static struct snd_soc_dai_ops mmp_sspa_dai_ops = {
  329. .startup = mmp_sspa_startup,
  330. .shutdown = mmp_sspa_shutdown,
  331. .trigger = mmp_sspa_trigger,
  332. .hw_params = mmp_sspa_hw_params,
  333. .set_sysclk = mmp_sspa_set_dai_sysclk,
  334. .set_pll = mmp_sspa_set_dai_pll,
  335. .set_fmt = mmp_sspa_set_dai_fmt,
  336. };
  337. static struct snd_soc_dai_driver mmp_sspa_dai = {
  338. .probe = mmp_sspa_probe,
  339. .playback = {
  340. .channels_min = 1,
  341. .channels_max = 128,
  342. .rates = MMP_SSPA_RATES,
  343. .formats = MMP_SSPA_FORMATS,
  344. },
  345. .capture = {
  346. .channels_min = 1,
  347. .channels_max = 2,
  348. .rates = MMP_SSPA_RATES,
  349. .formats = MMP_SSPA_FORMATS,
  350. },
  351. .ops = &mmp_sspa_dai_ops,
  352. };
  353. static const struct snd_soc_component_driver mmp_sspa_component = {
  354. .name = "mmp-sspa",
  355. };
  356. static int asoc_mmp_sspa_probe(struct platform_device *pdev)
  357. {
  358. struct sspa_priv *priv;
  359. struct resource *res;
  360. priv = devm_kzalloc(&pdev->dev,
  361. sizeof(struct sspa_priv), GFP_KERNEL);
  362. if (!priv)
  363. return -ENOMEM;
  364. priv->sspa = devm_kzalloc(&pdev->dev,
  365. sizeof(struct ssp_device), GFP_KERNEL);
  366. if (priv->sspa == NULL)
  367. return -ENOMEM;
  368. priv->dma_params = devm_kzalloc(&pdev->dev,
  369. 2 * sizeof(struct snd_dmaengine_dai_dma_data),
  370. GFP_KERNEL);
  371. if (priv->dma_params == NULL)
  372. return -ENOMEM;
  373. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  374. priv->sspa->mmio_base = devm_ioremap_resource(&pdev->dev, res);
  375. if (IS_ERR(priv->sspa->mmio_base))
  376. return PTR_ERR(priv->sspa->mmio_base);
  377. priv->sspa->clk = devm_clk_get(&pdev->dev, NULL);
  378. if (IS_ERR(priv->sspa->clk))
  379. return PTR_ERR(priv->sspa->clk);
  380. priv->audio_clk = clk_get(NULL, "mmp-audio");
  381. if (IS_ERR(priv->audio_clk))
  382. return PTR_ERR(priv->audio_clk);
  383. priv->sysclk = clk_get(NULL, "mmp-sysclk");
  384. if (IS_ERR(priv->sysclk)) {
  385. clk_put(priv->audio_clk);
  386. return PTR_ERR(priv->sysclk);
  387. }
  388. clk_enable(priv->audio_clk);
  389. priv->dai_fmt = (unsigned int) -1;
  390. platform_set_drvdata(pdev, priv);
  391. return devm_snd_soc_register_component(&pdev->dev, &mmp_sspa_component,
  392. &mmp_sspa_dai, 1);
  393. }
  394. static int asoc_mmp_sspa_remove(struct platform_device *pdev)
  395. {
  396. struct sspa_priv *priv = platform_get_drvdata(pdev);
  397. clk_disable(priv->audio_clk);
  398. clk_put(priv->audio_clk);
  399. clk_put(priv->sysclk);
  400. return 0;
  401. }
  402. static struct platform_driver asoc_mmp_sspa_driver = {
  403. .driver = {
  404. .name = "mmp-sspa-dai",
  405. },
  406. .probe = asoc_mmp_sspa_probe,
  407. .remove = asoc_mmp_sspa_remove,
  408. };
  409. module_platform_driver(asoc_mmp_sspa_driver);
  410. MODULE_AUTHOR("Leo Yan <leoy@marvell.com>");
  411. MODULE_DESCRIPTION("MMP SSPA SoC Interface");
  412. MODULE_LICENSE("GPL");
  413. MODULE_ALIAS("platform:mmp-sspa-dai");