nuc900-ac97.c 9.5 KB

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  1. /*
  2. * Copyright (c) 2009-2010 Nuvoton technology corporation.
  3. *
  4. * Wan ZongShun <mcuos.com@gmail.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation;version 2 of the License.
  9. *
  10. */
  11. #include <linux/init.h>
  12. #include <linux/module.h>
  13. #include <linux/slab.h>
  14. #include <linux/device.h>
  15. #include <linux/delay.h>
  16. #include <linux/mutex.h>
  17. #include <linux/suspend.h>
  18. #include <sound/core.h>
  19. #include <sound/pcm.h>
  20. #include <sound/initval.h>
  21. #include <sound/soc.h>
  22. #include <linux/clk.h>
  23. #include <mach/mfp.h>
  24. #include "nuc900-audio.h"
  25. static DEFINE_MUTEX(ac97_mutex);
  26. struct nuc900_audio *nuc900_ac97_data;
  27. EXPORT_SYMBOL_GPL(nuc900_ac97_data);
  28. static int nuc900_checkready(void)
  29. {
  30. struct nuc900_audio *nuc900_audio = nuc900_ac97_data;
  31. if (!(AUDIO_READ(nuc900_audio->mmio + ACTL_ACIS0) & CODEC_READY))
  32. return -EPERM;
  33. return 0;
  34. }
  35. /* AC97 controller reads codec register */
  36. static unsigned short nuc900_ac97_read(struct snd_ac97 *ac97,
  37. unsigned short reg)
  38. {
  39. struct nuc900_audio *nuc900_audio = nuc900_ac97_data;
  40. unsigned long timeout = 0x10000, val;
  41. mutex_lock(&ac97_mutex);
  42. val = nuc900_checkready();
  43. if (val) {
  44. dev_err(nuc900_audio->dev, "AC97 codec is not ready\n");
  45. goto out;
  46. }
  47. /* set the R_WB bit and write register index */
  48. AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACOS1, R_WB | reg);
  49. /* set the valid frame bit and valid slots */
  50. val = AUDIO_READ(nuc900_audio->mmio + ACTL_ACOS0);
  51. val |= (VALID_FRAME | SLOT1_VALID);
  52. AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACOS0, val);
  53. udelay(100);
  54. /* polling the AC_R_FINISH */
  55. while (!(AUDIO_READ(nuc900_audio->mmio + ACTL_ACCON) & AC_R_FINISH)
  56. && --timeout)
  57. mdelay(1);
  58. if (!timeout) {
  59. dev_err(nuc900_audio->dev, "AC97 read register time out !\n");
  60. val = -EPERM;
  61. goto out;
  62. }
  63. val = AUDIO_READ(nuc900_audio->mmio + ACTL_ACOS0) ;
  64. val &= ~SLOT1_VALID;
  65. AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACOS0, val);
  66. if (AUDIO_READ(nuc900_audio->mmio + ACTL_ACIS1) >> 2 != reg) {
  67. dev_err(nuc900_audio->dev,
  68. "R_INDEX of REG_ACTL_ACIS1 not match!\n");
  69. }
  70. udelay(100);
  71. val = (AUDIO_READ(nuc900_audio->mmio + ACTL_ACIS2) & 0xFFFF);
  72. out:
  73. mutex_unlock(&ac97_mutex);
  74. return val;
  75. }
  76. /* AC97 controller writes to codec register */
  77. static void nuc900_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
  78. unsigned short val)
  79. {
  80. struct nuc900_audio *nuc900_audio = nuc900_ac97_data;
  81. unsigned long tmp, timeout = 0x10000;
  82. mutex_lock(&ac97_mutex);
  83. tmp = nuc900_checkready();
  84. if (tmp)
  85. dev_err(nuc900_audio->dev, "AC97 codec is not ready\n");
  86. /* clear the R_WB bit and write register index */
  87. AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACOS1, reg);
  88. /* write register value */
  89. AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACOS2, val);
  90. /* set the valid frame bit and valid slots */
  91. tmp = AUDIO_READ(nuc900_audio->mmio + ACTL_ACOS0);
  92. tmp |= SLOT1_VALID | SLOT2_VALID | VALID_FRAME;
  93. AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACOS0, tmp);
  94. udelay(100);
  95. /* polling the AC_W_FINISH */
  96. while ((AUDIO_READ(nuc900_audio->mmio + ACTL_ACCON) & AC_W_FINISH)
  97. && --timeout)
  98. mdelay(1);
  99. if (!timeout)
  100. dev_err(nuc900_audio->dev, "AC97 write register time out !\n");
  101. tmp = AUDIO_READ(nuc900_audio->mmio + ACTL_ACOS0);
  102. tmp &= ~(SLOT1_VALID | SLOT2_VALID);
  103. AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACOS0, tmp);
  104. mutex_unlock(&ac97_mutex);
  105. }
  106. static void nuc900_ac97_warm_reset(struct snd_ac97 *ac97)
  107. {
  108. struct nuc900_audio *nuc900_audio = nuc900_ac97_data;
  109. unsigned long val;
  110. mutex_lock(&ac97_mutex);
  111. /* warm reset AC 97 */
  112. val = AUDIO_READ(nuc900_audio->mmio + ACTL_ACCON);
  113. val |= AC_W_RES;
  114. AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACCON, val);
  115. udelay(100);
  116. val = nuc900_checkready();
  117. if (val)
  118. dev_err(nuc900_audio->dev, "AC97 codec is not ready\n");
  119. mutex_unlock(&ac97_mutex);
  120. }
  121. static void nuc900_ac97_cold_reset(struct snd_ac97 *ac97)
  122. {
  123. struct nuc900_audio *nuc900_audio = nuc900_ac97_data;
  124. unsigned long val;
  125. mutex_lock(&ac97_mutex);
  126. /* reset Audio Controller */
  127. val = AUDIO_READ(nuc900_audio->mmio + ACTL_RESET);
  128. val |= ACTL_RESET_BIT;
  129. AUDIO_WRITE(nuc900_audio->mmio + ACTL_RESET, val);
  130. val = AUDIO_READ(nuc900_audio->mmio + ACTL_RESET);
  131. val &= (~ACTL_RESET_BIT);
  132. AUDIO_WRITE(nuc900_audio->mmio + ACTL_RESET, val);
  133. /* reset AC-link interface */
  134. val = AUDIO_READ(nuc900_audio->mmio + ACTL_RESET);
  135. val |= AC_RESET;
  136. AUDIO_WRITE(nuc900_audio->mmio + ACTL_RESET, val);
  137. val = AUDIO_READ(nuc900_audio->mmio + ACTL_RESET);
  138. val &= ~AC_RESET;
  139. AUDIO_WRITE(nuc900_audio->mmio + ACTL_RESET, val);
  140. /* cold reset AC 97 */
  141. val = AUDIO_READ(nuc900_audio->mmio + ACTL_ACCON);
  142. val |= AC_C_RES;
  143. AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACCON, val);
  144. val = AUDIO_READ(nuc900_audio->mmio + ACTL_ACCON);
  145. val &= (~AC_C_RES);
  146. AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACCON, val);
  147. udelay(100);
  148. mutex_unlock(&ac97_mutex);
  149. }
  150. /* AC97 controller operations */
  151. static struct snd_ac97_bus_ops nuc900_ac97_ops = {
  152. .read = nuc900_ac97_read,
  153. .write = nuc900_ac97_write,
  154. .reset = nuc900_ac97_cold_reset,
  155. .warm_reset = nuc900_ac97_warm_reset,
  156. };
  157. static int nuc900_ac97_trigger(struct snd_pcm_substream *substream,
  158. int cmd, struct snd_soc_dai *dai)
  159. {
  160. struct nuc900_audio *nuc900_audio = nuc900_ac97_data;
  161. int ret;
  162. unsigned long val, tmp;
  163. ret = 0;
  164. switch (cmd) {
  165. case SNDRV_PCM_TRIGGER_START:
  166. case SNDRV_PCM_TRIGGER_RESUME:
  167. val = AUDIO_READ(nuc900_audio->mmio + ACTL_RESET);
  168. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  169. tmp = AUDIO_READ(nuc900_audio->mmio + ACTL_ACOS0);
  170. tmp |= (SLOT3_VALID | SLOT4_VALID | VALID_FRAME);
  171. AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACOS0, tmp);
  172. tmp = AUDIO_READ(nuc900_audio->mmio + ACTL_PSR);
  173. tmp |= (P_DMA_END_IRQ | P_DMA_MIDDLE_IRQ);
  174. AUDIO_WRITE(nuc900_audio->mmio + ACTL_PSR, tmp);
  175. val |= AC_PLAY;
  176. } else {
  177. tmp = AUDIO_READ(nuc900_audio->mmio + ACTL_RSR);
  178. tmp |= (R_DMA_END_IRQ | R_DMA_MIDDLE_IRQ);
  179. AUDIO_WRITE(nuc900_audio->mmio + ACTL_RSR, tmp);
  180. val |= AC_RECORD;
  181. }
  182. AUDIO_WRITE(nuc900_audio->mmio + ACTL_RESET, val);
  183. break;
  184. case SNDRV_PCM_TRIGGER_STOP:
  185. case SNDRV_PCM_TRIGGER_SUSPEND:
  186. val = AUDIO_READ(nuc900_audio->mmio + ACTL_RESET);
  187. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  188. tmp = AUDIO_READ(nuc900_audio->mmio + ACTL_ACOS0);
  189. tmp &= ~(SLOT3_VALID | SLOT4_VALID);
  190. AUDIO_WRITE(nuc900_audio->mmio + ACTL_ACOS0, tmp);
  191. AUDIO_WRITE(nuc900_audio->mmio + ACTL_PSR, RESET_PRSR);
  192. val &= ~AC_PLAY;
  193. } else {
  194. AUDIO_WRITE(nuc900_audio->mmio + ACTL_RSR, RESET_PRSR);
  195. val &= ~AC_RECORD;
  196. }
  197. AUDIO_WRITE(nuc900_audio->mmio + ACTL_RESET, val);
  198. break;
  199. default:
  200. ret = -EINVAL;
  201. }
  202. return ret;
  203. }
  204. static int nuc900_ac97_probe(struct snd_soc_dai *dai)
  205. {
  206. struct nuc900_audio *nuc900_audio = nuc900_ac97_data;
  207. unsigned long val;
  208. mutex_lock(&ac97_mutex);
  209. /* enable unit clock */
  210. clk_enable(nuc900_audio->clk);
  211. /* enable audio controller and AC-link interface */
  212. val = AUDIO_READ(nuc900_audio->mmio + ACTL_CON);
  213. val |= (IIS_AC_PIN_SEL | ACLINK_EN);
  214. AUDIO_WRITE(nuc900_audio->mmio + ACTL_CON, val);
  215. mutex_unlock(&ac97_mutex);
  216. return 0;
  217. }
  218. static int nuc900_ac97_remove(struct snd_soc_dai *dai)
  219. {
  220. struct nuc900_audio *nuc900_audio = nuc900_ac97_data;
  221. clk_disable(nuc900_audio->clk);
  222. return 0;
  223. }
  224. static const struct snd_soc_dai_ops nuc900_ac97_dai_ops = {
  225. .trigger = nuc900_ac97_trigger,
  226. };
  227. static struct snd_soc_dai_driver nuc900_ac97_dai = {
  228. .probe = nuc900_ac97_probe,
  229. .remove = nuc900_ac97_remove,
  230. .bus_control = true,
  231. .playback = {
  232. .rates = SNDRV_PCM_RATE_8000_48000,
  233. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  234. .channels_min = 1,
  235. .channels_max = 2,
  236. },
  237. .capture = {
  238. .rates = SNDRV_PCM_RATE_8000_48000,
  239. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  240. .channels_min = 1,
  241. .channels_max = 2,
  242. },
  243. .ops = &nuc900_ac97_dai_ops,
  244. };
  245. static const struct snd_soc_component_driver nuc900_ac97_component = {
  246. .name = "nuc900-ac97",
  247. };
  248. static int nuc900_ac97_drvprobe(struct platform_device *pdev)
  249. {
  250. struct nuc900_audio *nuc900_audio;
  251. int ret;
  252. if (nuc900_ac97_data)
  253. return -EBUSY;
  254. nuc900_audio = devm_kzalloc(&pdev->dev, sizeof(struct nuc900_audio),
  255. GFP_KERNEL);
  256. if (!nuc900_audio)
  257. return -ENOMEM;
  258. spin_lock_init(&nuc900_audio->lock);
  259. nuc900_audio->res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  260. nuc900_audio->mmio = devm_ioremap_resource(&pdev->dev,
  261. nuc900_audio->res);
  262. if (IS_ERR(nuc900_audio->mmio))
  263. return PTR_ERR(nuc900_audio->mmio);
  264. nuc900_audio->clk = devm_clk_get(&pdev->dev, NULL);
  265. if (IS_ERR(nuc900_audio->clk)) {
  266. ret = PTR_ERR(nuc900_audio->clk);
  267. goto out;
  268. }
  269. nuc900_audio->irq_num = platform_get_irq(pdev, 0);
  270. if (!nuc900_audio->irq_num) {
  271. ret = -EBUSY;
  272. goto out;
  273. }
  274. nuc900_ac97_data = nuc900_audio;
  275. ret = snd_soc_set_ac97_ops(&nuc900_ac97_ops);
  276. if (ret)
  277. goto out;
  278. ret = snd_soc_register_component(&pdev->dev, &nuc900_ac97_component,
  279. &nuc900_ac97_dai, 1);
  280. if (ret)
  281. goto out;
  282. /* enbale ac97 multifunction pin */
  283. mfp_set_groupg(nuc900_audio->dev, NULL);
  284. return 0;
  285. out:
  286. snd_soc_set_ac97_ops(NULL);
  287. return ret;
  288. }
  289. static int nuc900_ac97_drvremove(struct platform_device *pdev)
  290. {
  291. snd_soc_unregister_component(&pdev->dev);
  292. nuc900_ac97_data = NULL;
  293. snd_soc_set_ac97_ops(NULL);
  294. return 0;
  295. }
  296. static struct platform_driver nuc900_ac97_driver = {
  297. .driver = {
  298. .name = "nuc900-ac97",
  299. },
  300. .probe = nuc900_ac97_drvprobe,
  301. .remove = nuc900_ac97_drvremove,
  302. };
  303. module_platform_driver(nuc900_ac97_driver);
  304. MODULE_AUTHOR("Wan ZongShun <mcuos.com@gmail.com>");
  305. MODULE_DESCRIPTION("NUC900 AC97 SoC driver!");
  306. MODULE_LICENSE("GPL");
  307. MODULE_ALIAS("platform:nuc900-ac97");