cht_bsw_rt5645.c 14 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493
  1. /*
  2. * cht-bsw-rt5645.c - ASoc Machine driver for Intel Cherryview-based platforms
  3. * Cherrytrail and Braswell, with RT5645 codec.
  4. *
  5. * Copyright (C) 2015 Intel Corp
  6. * Author: Fang, Yang A <yang.a.fang@intel.com>
  7. * N,Harshapriya <harshapriya.n@intel.com>
  8. * This file is modified from cht_bsw_rt5672.c
  9. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; version 2 of the License.
  14. *
  15. * This program is distributed in the hope that it will be useful, but
  16. * WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  18. * General Public License for more details.
  19. *
  20. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  21. */
  22. #include <linux/module.h>
  23. #include <linux/acpi.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/slab.h>
  26. #include <asm/cpu_device_id.h>
  27. #include <asm/platform_sst_audio.h>
  28. #include <linux/clk.h>
  29. #include <sound/pcm.h>
  30. #include <sound/pcm_params.h>
  31. #include <sound/soc.h>
  32. #include <sound/jack.h>
  33. #include "../../codecs/rt5645.h"
  34. #include "../atom/sst-atom-controls.h"
  35. #include "../common/sst-acpi.h"
  36. #define CHT_PLAT_CLK_3_HZ 19200000
  37. #define CHT_CODEC_DAI "rt5645-aif1"
  38. struct cht_acpi_card {
  39. char *codec_id;
  40. int codec_type;
  41. struct snd_soc_card *soc_card;
  42. };
  43. struct cht_mc_private {
  44. struct snd_soc_jack jack;
  45. struct cht_acpi_card *acpi_card;
  46. char codec_name[16];
  47. struct clk *mclk;
  48. };
  49. static inline struct snd_soc_dai *cht_get_codec_dai(struct snd_soc_card *card)
  50. {
  51. struct snd_soc_pcm_runtime *rtd;
  52. list_for_each_entry(rtd, &card->rtd_list, list) {
  53. if (!strncmp(rtd->codec_dai->name, CHT_CODEC_DAI,
  54. strlen(CHT_CODEC_DAI)))
  55. return rtd->codec_dai;
  56. }
  57. return NULL;
  58. }
  59. static int platform_clock_control(struct snd_soc_dapm_widget *w,
  60. struct snd_kcontrol *k, int event)
  61. {
  62. struct snd_soc_dapm_context *dapm = w->dapm;
  63. struct snd_soc_card *card = dapm->card;
  64. struct snd_soc_dai *codec_dai;
  65. struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
  66. int ret;
  67. codec_dai = cht_get_codec_dai(card);
  68. if (!codec_dai) {
  69. dev_err(card->dev, "Codec dai not found; Unable to set platform clock\n");
  70. return -EIO;
  71. }
  72. if (SND_SOC_DAPM_EVENT_ON(event)) {
  73. if (ctx->mclk) {
  74. ret = clk_prepare_enable(ctx->mclk);
  75. if (ret < 0) {
  76. dev_err(card->dev,
  77. "could not configure MCLK state");
  78. return ret;
  79. }
  80. }
  81. } else {
  82. /* Set codec sysclk source to its internal clock because codec PLL will
  83. * be off when idle and MCLK will also be off when codec is
  84. * runtime suspended. Codec needs clock for jack detection and button
  85. * press. MCLK is turned off with clock framework or ACPI.
  86. */
  87. ret = snd_soc_dai_set_sysclk(codec_dai, RT5645_SCLK_S_RCCLK,
  88. 48000 * 512, SND_SOC_CLOCK_IN);
  89. if (ret < 0) {
  90. dev_err(card->dev, "can't set codec sysclk: %d\n", ret);
  91. return ret;
  92. }
  93. if (ctx->mclk)
  94. clk_disable_unprepare(ctx->mclk);
  95. }
  96. return 0;
  97. }
  98. static const struct snd_soc_dapm_widget cht_dapm_widgets[] = {
  99. SND_SOC_DAPM_HP("Headphone", NULL),
  100. SND_SOC_DAPM_MIC("Headset Mic", NULL),
  101. SND_SOC_DAPM_MIC("Int Mic", NULL),
  102. SND_SOC_DAPM_MIC("Int Analog Mic", NULL),
  103. SND_SOC_DAPM_SPK("Ext Spk", NULL),
  104. SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0,
  105. platform_clock_control, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  106. };
  107. static const struct snd_soc_dapm_route cht_rt5645_audio_map[] = {
  108. {"IN1P", NULL, "Headset Mic"},
  109. {"IN1N", NULL, "Headset Mic"},
  110. {"DMIC L1", NULL, "Int Mic"},
  111. {"DMIC R1", NULL, "Int Mic"},
  112. {"IN2P", NULL, "Int Analog Mic"},
  113. {"IN2N", NULL, "Int Analog Mic"},
  114. {"Headphone", NULL, "HPOL"},
  115. {"Headphone", NULL, "HPOR"},
  116. {"Ext Spk", NULL, "SPOL"},
  117. {"Ext Spk", NULL, "SPOR"},
  118. {"AIF1 Playback", NULL, "ssp2 Tx"},
  119. {"ssp2 Tx", NULL, "codec_out0"},
  120. {"ssp2 Tx", NULL, "codec_out1"},
  121. {"codec_in0", NULL, "ssp2 Rx" },
  122. {"codec_in1", NULL, "ssp2 Rx" },
  123. {"ssp2 Rx", NULL, "AIF1 Capture"},
  124. {"Headphone", NULL, "Platform Clock"},
  125. {"Headset Mic", NULL, "Platform Clock"},
  126. {"Int Mic", NULL, "Platform Clock"},
  127. {"Int Analog Mic", NULL, "Platform Clock"},
  128. {"Int Analog Mic", NULL, "micbias1"},
  129. {"Int Analog Mic", NULL, "micbias2"},
  130. {"Ext Spk", NULL, "Platform Clock"},
  131. };
  132. static const struct snd_soc_dapm_route cht_rt5650_audio_map[] = {
  133. {"IN1P", NULL, "Headset Mic"},
  134. {"IN1N", NULL, "Headset Mic"},
  135. {"DMIC L2", NULL, "Int Mic"},
  136. {"DMIC R2", NULL, "Int Mic"},
  137. {"Headphone", NULL, "HPOL"},
  138. {"Headphone", NULL, "HPOR"},
  139. {"Ext Spk", NULL, "SPOL"},
  140. {"Ext Spk", NULL, "SPOR"},
  141. {"AIF1 Playback", NULL, "ssp2 Tx"},
  142. {"ssp2 Tx", NULL, "codec_out0"},
  143. {"ssp2 Tx", NULL, "codec_out1"},
  144. {"codec_in0", NULL, "ssp2 Rx" },
  145. {"codec_in1", NULL, "ssp2 Rx" },
  146. {"ssp2 Rx", NULL, "AIF1 Capture"},
  147. {"Headphone", NULL, "Platform Clock"},
  148. {"Headset Mic", NULL, "Platform Clock"},
  149. {"Int Mic", NULL, "Platform Clock"},
  150. {"Ext Spk", NULL, "Platform Clock"},
  151. };
  152. static const struct snd_kcontrol_new cht_mc_controls[] = {
  153. SOC_DAPM_PIN_SWITCH("Headphone"),
  154. SOC_DAPM_PIN_SWITCH("Headset Mic"),
  155. SOC_DAPM_PIN_SWITCH("Int Mic"),
  156. SOC_DAPM_PIN_SWITCH("Int Analog Mic"),
  157. SOC_DAPM_PIN_SWITCH("Ext Spk"),
  158. };
  159. static struct snd_soc_jack_pin cht_bsw_jack_pins[] = {
  160. {
  161. .pin = "Headphone",
  162. .mask = SND_JACK_HEADPHONE,
  163. },
  164. {
  165. .pin = "Headset Mic",
  166. .mask = SND_JACK_MICROPHONE,
  167. },
  168. };
  169. static int cht_aif1_hw_params(struct snd_pcm_substream *substream,
  170. struct snd_pcm_hw_params *params)
  171. {
  172. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  173. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  174. int ret;
  175. /* set codec PLL source to the 19.2MHz platform clock (MCLK) */
  176. ret = snd_soc_dai_set_pll(codec_dai, 0, RT5645_PLL1_S_MCLK,
  177. CHT_PLAT_CLK_3_HZ, params_rate(params) * 512);
  178. if (ret < 0) {
  179. dev_err(rtd->dev, "can't set codec pll: %d\n", ret);
  180. return ret;
  181. }
  182. ret = snd_soc_dai_set_sysclk(codec_dai, RT5645_SCLK_S_PLL1,
  183. params_rate(params) * 512, SND_SOC_CLOCK_IN);
  184. if (ret < 0) {
  185. dev_err(rtd->dev, "can't set codec sysclk: %d\n", ret);
  186. return ret;
  187. }
  188. return 0;
  189. }
  190. static int cht_codec_init(struct snd_soc_pcm_runtime *runtime)
  191. {
  192. int ret;
  193. int jack_type;
  194. struct snd_soc_codec *codec = runtime->codec;
  195. struct snd_soc_dai *codec_dai = runtime->codec_dai;
  196. struct cht_mc_private *ctx = snd_soc_card_get_drvdata(runtime->card);
  197. /* Select clk_i2s1_asrc as ASRC clock source */
  198. rt5645_sel_asrc_clk_src(codec,
  199. RT5645_DA_STEREO_FILTER |
  200. RT5645_DA_MONO_L_FILTER |
  201. RT5645_DA_MONO_R_FILTER |
  202. RT5645_AD_STEREO_FILTER,
  203. RT5645_CLK_SEL_I2S1_ASRC);
  204. /* TDM 4 slots 24 bit, set Rx & Tx bitmask to 4 active slots */
  205. ret = snd_soc_dai_set_tdm_slot(codec_dai, 0xF, 0xF, 4, 24);
  206. if (ret < 0) {
  207. dev_err(runtime->dev, "can't set codec TDM slot %d\n", ret);
  208. return ret;
  209. }
  210. if (ctx->acpi_card->codec_type == CODEC_TYPE_RT5650)
  211. jack_type = SND_JACK_HEADPHONE | SND_JACK_MICROPHONE |
  212. SND_JACK_BTN_0 | SND_JACK_BTN_1 |
  213. SND_JACK_BTN_2 | SND_JACK_BTN_3;
  214. else
  215. jack_type = SND_JACK_HEADPHONE | SND_JACK_MICROPHONE;
  216. ret = snd_soc_card_jack_new(runtime->card, "Headset",
  217. jack_type, &ctx->jack,
  218. cht_bsw_jack_pins, ARRAY_SIZE(cht_bsw_jack_pins));
  219. if (ret) {
  220. dev_err(runtime->dev, "Headset jack creation failed %d\n", ret);
  221. return ret;
  222. }
  223. rt5645_set_jack_detect(codec, &ctx->jack, &ctx->jack, &ctx->jack);
  224. if (ctx->mclk) {
  225. /*
  226. * The firmware might enable the clock at
  227. * boot (this information may or may not
  228. * be reflected in the enable clock register).
  229. * To change the rate we must disable the clock
  230. * first to cover these cases. Due to common
  231. * clock framework restrictions that do not allow
  232. * to disable a clock that has not been enabled,
  233. * we need to enable the clock first.
  234. */
  235. ret = clk_prepare_enable(ctx->mclk);
  236. if (!ret)
  237. clk_disable_unprepare(ctx->mclk);
  238. ret = clk_set_rate(ctx->mclk, CHT_PLAT_CLK_3_HZ);
  239. if (ret)
  240. dev_err(runtime->dev, "unable to set MCLK rate\n");
  241. }
  242. return ret;
  243. }
  244. static int cht_codec_fixup(struct snd_soc_pcm_runtime *rtd,
  245. struct snd_pcm_hw_params *params)
  246. {
  247. struct snd_interval *rate = hw_param_interval(params,
  248. SNDRV_PCM_HW_PARAM_RATE);
  249. struct snd_interval *channels = hw_param_interval(params,
  250. SNDRV_PCM_HW_PARAM_CHANNELS);
  251. /* The DSP will covert the FE rate to 48k, stereo, 24bits */
  252. rate->min = rate->max = 48000;
  253. channels->min = channels->max = 2;
  254. /* set SSP2 to 24-bit */
  255. params_set_format(params, SNDRV_PCM_FORMAT_S24_LE);
  256. return 0;
  257. }
  258. static int cht_aif1_startup(struct snd_pcm_substream *substream)
  259. {
  260. return snd_pcm_hw_constraint_single(substream->runtime,
  261. SNDRV_PCM_HW_PARAM_RATE, 48000);
  262. }
  263. static struct snd_soc_ops cht_aif1_ops = {
  264. .startup = cht_aif1_startup,
  265. };
  266. static struct snd_soc_ops cht_be_ssp2_ops = {
  267. .hw_params = cht_aif1_hw_params,
  268. };
  269. static struct snd_soc_dai_link cht_dailink[] = {
  270. [MERR_DPCM_AUDIO] = {
  271. .name = "Audio Port",
  272. .stream_name = "Audio",
  273. .cpu_dai_name = "media-cpu-dai",
  274. .codec_dai_name = "snd-soc-dummy-dai",
  275. .codec_name = "snd-soc-dummy",
  276. .platform_name = "sst-mfld-platform",
  277. .nonatomic = true,
  278. .dynamic = 1,
  279. .dpcm_playback = 1,
  280. .dpcm_capture = 1,
  281. .ops = &cht_aif1_ops,
  282. },
  283. [MERR_DPCM_DEEP_BUFFER] = {
  284. .name = "Deep-Buffer Audio Port",
  285. .stream_name = "Deep-Buffer Audio",
  286. .cpu_dai_name = "deepbuffer-cpu-dai",
  287. .codec_dai_name = "snd-soc-dummy-dai",
  288. .codec_name = "snd-soc-dummy",
  289. .platform_name = "sst-mfld-platform",
  290. .nonatomic = true,
  291. .dynamic = 1,
  292. .dpcm_playback = 1,
  293. .ops = &cht_aif1_ops,
  294. },
  295. [MERR_DPCM_COMPR] = {
  296. .name = "Compressed Port",
  297. .stream_name = "Compress",
  298. .cpu_dai_name = "compress-cpu-dai",
  299. .codec_dai_name = "snd-soc-dummy-dai",
  300. .codec_name = "snd-soc-dummy",
  301. .platform_name = "sst-mfld-platform",
  302. },
  303. /* CODEC<->CODEC link */
  304. /* back ends */
  305. {
  306. .name = "SSP2-Codec",
  307. .id = 1,
  308. .cpu_dai_name = "ssp2-port",
  309. .platform_name = "sst-mfld-platform",
  310. .no_pcm = 1,
  311. .codec_dai_name = "rt5645-aif1",
  312. .codec_name = "i2c-10EC5645:00",
  313. .dai_fmt = SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_IB_NF
  314. | SND_SOC_DAIFMT_CBS_CFS,
  315. .init = cht_codec_init,
  316. .be_hw_params_fixup = cht_codec_fixup,
  317. .nonatomic = true,
  318. .dpcm_playback = 1,
  319. .dpcm_capture = 1,
  320. .ops = &cht_be_ssp2_ops,
  321. },
  322. };
  323. /* SoC card */
  324. static struct snd_soc_card snd_soc_card_chtrt5645 = {
  325. .name = "chtrt5645",
  326. .owner = THIS_MODULE,
  327. .dai_link = cht_dailink,
  328. .num_links = ARRAY_SIZE(cht_dailink),
  329. .dapm_widgets = cht_dapm_widgets,
  330. .num_dapm_widgets = ARRAY_SIZE(cht_dapm_widgets),
  331. .dapm_routes = cht_rt5645_audio_map,
  332. .num_dapm_routes = ARRAY_SIZE(cht_rt5645_audio_map),
  333. .controls = cht_mc_controls,
  334. .num_controls = ARRAY_SIZE(cht_mc_controls),
  335. };
  336. static struct snd_soc_card snd_soc_card_chtrt5650 = {
  337. .name = "chtrt5650",
  338. .owner = THIS_MODULE,
  339. .dai_link = cht_dailink,
  340. .num_links = ARRAY_SIZE(cht_dailink),
  341. .dapm_widgets = cht_dapm_widgets,
  342. .num_dapm_widgets = ARRAY_SIZE(cht_dapm_widgets),
  343. .dapm_routes = cht_rt5650_audio_map,
  344. .num_dapm_routes = ARRAY_SIZE(cht_rt5650_audio_map),
  345. .controls = cht_mc_controls,
  346. .num_controls = ARRAY_SIZE(cht_mc_controls),
  347. };
  348. static struct cht_acpi_card snd_soc_cards[] = {
  349. {"10EC5640", CODEC_TYPE_RT5645, &snd_soc_card_chtrt5645},
  350. {"10EC5645", CODEC_TYPE_RT5645, &snd_soc_card_chtrt5645},
  351. {"10EC5650", CODEC_TYPE_RT5650, &snd_soc_card_chtrt5650},
  352. };
  353. static char cht_rt5640_codec_name[16]; /* i2c-<HID>:00 with HID being 8 chars */
  354. static bool is_valleyview(void)
  355. {
  356. static const struct x86_cpu_id cpu_ids[] = {
  357. { X86_VENDOR_INTEL, 6, 55 }, /* Valleyview, Bay Trail */
  358. {}
  359. };
  360. if (!x86_match_cpu(cpu_ids))
  361. return false;
  362. return true;
  363. }
  364. static int snd_cht_mc_probe(struct platform_device *pdev)
  365. {
  366. int ret_val = 0;
  367. int i;
  368. struct cht_mc_private *drv;
  369. struct snd_soc_card *card = snd_soc_cards[0].soc_card;
  370. struct sst_acpi_mach *mach;
  371. const char *i2c_name = NULL;
  372. int dai_index = 0;
  373. bool found = false;
  374. drv = devm_kzalloc(&pdev->dev, sizeof(*drv), GFP_ATOMIC);
  375. if (!drv)
  376. return -ENOMEM;
  377. mach = (&pdev->dev)->platform_data;
  378. for (i = 0; i < ARRAY_SIZE(snd_soc_cards); i++) {
  379. if (acpi_dev_found(snd_soc_cards[i].codec_id) &&
  380. (!strncmp(snd_soc_cards[i].codec_id, mach->id, 8))) {
  381. dev_dbg(&pdev->dev,
  382. "found codec %s\n", snd_soc_cards[i].codec_id);
  383. card = snd_soc_cards[i].soc_card;
  384. drv->acpi_card = &snd_soc_cards[i];
  385. found = true;
  386. break;
  387. }
  388. }
  389. if (!found) {
  390. dev_err(&pdev->dev, "No matching HID found in supported list\n");
  391. return -ENODEV;
  392. }
  393. card->dev = &pdev->dev;
  394. sprintf(drv->codec_name, "i2c-%s:00", drv->acpi_card->codec_id);
  395. /* set correct codec name */
  396. for (i = 0; i < ARRAY_SIZE(cht_dailink); i++)
  397. if (!strcmp(card->dai_link[i].codec_name, "i2c-10EC5645:00")) {
  398. card->dai_link[i].codec_name = drv->codec_name;
  399. dai_index = i;
  400. }
  401. /* fixup codec name based on HID */
  402. i2c_name = sst_acpi_find_name_from_hid(mach->id);
  403. if (i2c_name != NULL) {
  404. snprintf(cht_rt5640_codec_name, sizeof(cht_rt5640_codec_name),
  405. "%s%s", "i2c-", i2c_name);
  406. cht_dailink[dai_index].codec_name = cht_rt5640_codec_name;
  407. }
  408. if (is_valleyview()) {
  409. drv->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3");
  410. if (IS_ERR(drv->mclk)) {
  411. dev_err(&pdev->dev,
  412. "Failed to get MCLK from pmc_plt_clk_3: %ld\n",
  413. PTR_ERR(drv->mclk));
  414. return PTR_ERR(drv->mclk);
  415. }
  416. }
  417. snd_soc_card_set_drvdata(card, drv);
  418. ret_val = devm_snd_soc_register_card(&pdev->dev, card);
  419. if (ret_val) {
  420. dev_err(&pdev->dev,
  421. "snd_soc_register_card failed %d\n", ret_val);
  422. return ret_val;
  423. }
  424. platform_set_drvdata(pdev, card);
  425. return ret_val;
  426. }
  427. static struct platform_driver snd_cht_mc_driver = {
  428. .driver = {
  429. .name = "cht-bsw-rt5645",
  430. },
  431. .probe = snd_cht_mc_probe,
  432. };
  433. module_platform_driver(snd_cht_mc_driver)
  434. MODULE_DESCRIPTION("ASoC Intel(R) Braswell Machine driver");
  435. MODULE_AUTHOR("Fang, Yang A,N,Harshapriya");
  436. MODULE_LICENSE("GPL v2");
  437. MODULE_ALIAS("platform:cht-bsw-rt5645");