img-spdif-in.c 21 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807
  1. /*
  2. * IMG SPDIF input controller driver
  3. *
  4. * Copyright (C) 2015 Imagination Technologies Ltd.
  5. *
  6. * Author: Damien Horsley <Damien.Horsley@imgtec.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms and conditions of the GNU General Public License,
  10. * version 2, as published by the Free Software Foundation.
  11. */
  12. #include <linux/clk.h>
  13. #include <linux/init.h>
  14. #include <linux/kernel.h>
  15. #include <linux/module.h>
  16. #include <linux/of.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/reset.h>
  19. #include <sound/core.h>
  20. #include <sound/dmaengine_pcm.h>
  21. #include <sound/initval.h>
  22. #include <sound/pcm.h>
  23. #include <sound/pcm_params.h>
  24. #include <sound/soc.h>
  25. #define IMG_SPDIF_IN_RX_FIFO_OFFSET 0
  26. #define IMG_SPDIF_IN_CTL 0x4
  27. #define IMG_SPDIF_IN_CTL_LOCKLO_MASK 0xff
  28. #define IMG_SPDIF_IN_CTL_LOCKLO_SHIFT 0
  29. #define IMG_SPDIF_IN_CTL_LOCKHI_MASK 0xff00
  30. #define IMG_SPDIF_IN_CTL_LOCKHI_SHIFT 8
  31. #define IMG_SPDIF_IN_CTL_TRK_MASK 0xff0000
  32. #define IMG_SPDIF_IN_CTL_TRK_SHIFT 16
  33. #define IMG_SPDIF_IN_CTL_SRD_MASK 0x70000000
  34. #define IMG_SPDIF_IN_CTL_SRD_SHIFT 28
  35. #define IMG_SPDIF_IN_CTL_SRT_MASK BIT(31)
  36. #define IMG_SPDIF_IN_STATUS 0x8
  37. #define IMG_SPDIF_IN_STATUS_SAM_MASK 0x7000
  38. #define IMG_SPDIF_IN_STATUS_SAM_SHIFT 12
  39. #define IMG_SPDIF_IN_STATUS_LOCK_MASK BIT(15)
  40. #define IMG_SPDIF_IN_STATUS_LOCK_SHIFT 15
  41. #define IMG_SPDIF_IN_CLKGEN 0x1c
  42. #define IMG_SPDIF_IN_CLKGEN_NOM_MASK 0x3ff
  43. #define IMG_SPDIF_IN_CLKGEN_NOM_SHIFT 0
  44. #define IMG_SPDIF_IN_CLKGEN_HLD_MASK 0x3ff0000
  45. #define IMG_SPDIF_IN_CLKGEN_HLD_SHIFT 16
  46. #define IMG_SPDIF_IN_CSL 0x20
  47. #define IMG_SPDIF_IN_CSH 0x24
  48. #define IMG_SPDIF_IN_CSH_MASK 0xff
  49. #define IMG_SPDIF_IN_CSH_SHIFT 0
  50. #define IMG_SPDIF_IN_SOFT_RESET 0x28
  51. #define IMG_SPDIF_IN_SOFT_RESET_MASK BIT(0)
  52. #define IMG_SPDIF_IN_ACLKGEN_START 0x2c
  53. #define IMG_SPDIF_IN_ACLKGEN_NOM_MASK 0x3ff
  54. #define IMG_SPDIF_IN_ACLKGEN_NOM_SHIFT 0
  55. #define IMG_SPDIF_IN_ACLKGEN_HLD_MASK 0xffc00
  56. #define IMG_SPDIF_IN_ACLKGEN_HLD_SHIFT 10
  57. #define IMG_SPDIF_IN_ACLKGEN_TRK_MASK 0xff00000
  58. #define IMG_SPDIF_IN_ACLKGEN_TRK_SHIFT 20
  59. #define IMG_SPDIF_IN_NUM_ACLKGEN 4
  60. struct img_spdif_in {
  61. spinlock_t lock;
  62. void __iomem *base;
  63. struct clk *clk_sys;
  64. struct snd_dmaengine_dai_dma_data dma_data;
  65. struct device *dev;
  66. unsigned int trk;
  67. bool multi_freq;
  68. int lock_acquire;
  69. int lock_release;
  70. unsigned int single_freq;
  71. unsigned int multi_freqs[IMG_SPDIF_IN_NUM_ACLKGEN];
  72. bool active;
  73. /* Write-only registers */
  74. unsigned int aclkgen_regs[IMG_SPDIF_IN_NUM_ACLKGEN];
  75. };
  76. static inline void img_spdif_in_writel(struct img_spdif_in *spdif,
  77. u32 val, u32 reg)
  78. {
  79. writel(val, spdif->base + reg);
  80. }
  81. static inline u32 img_spdif_in_readl(struct img_spdif_in *spdif, u32 reg)
  82. {
  83. return readl(spdif->base + reg);
  84. }
  85. static inline void img_spdif_in_aclkgen_writel(struct img_spdif_in *spdif,
  86. u32 index)
  87. {
  88. img_spdif_in_writel(spdif, spdif->aclkgen_regs[index],
  89. IMG_SPDIF_IN_ACLKGEN_START + (index * 0x4));
  90. }
  91. static int img_spdif_in_check_max_rate(struct img_spdif_in *spdif,
  92. unsigned int sample_rate, unsigned long *actual_freq)
  93. {
  94. unsigned long min_freq, freq_t;
  95. /* Clock rate must be at least 24x the bit rate */
  96. min_freq = sample_rate * 2 * 32 * 24;
  97. freq_t = clk_get_rate(spdif->clk_sys);
  98. if (freq_t < min_freq)
  99. return -EINVAL;
  100. *actual_freq = freq_t;
  101. return 0;
  102. }
  103. static int img_spdif_in_do_clkgen_calc(unsigned int rate, unsigned int *pnom,
  104. unsigned int *phld, unsigned long clk_rate)
  105. {
  106. unsigned int ori, nom, hld;
  107. /*
  108. * Calculate oversampling ratio, nominal phase increment and hold
  109. * increment for the given rate / frequency
  110. */
  111. if (!rate)
  112. return -EINVAL;
  113. ori = clk_rate / (rate * 64);
  114. if (!ori)
  115. return -EINVAL;
  116. nom = (4096 / ori) + 1;
  117. do
  118. hld = 4096 - (--nom * (ori - 1));
  119. while (hld < 120);
  120. *pnom = nom;
  121. *phld = hld;
  122. return 0;
  123. }
  124. static int img_spdif_in_do_clkgen_single(struct img_spdif_in *spdif,
  125. unsigned int rate)
  126. {
  127. unsigned int nom, hld;
  128. unsigned long flags, clk_rate;
  129. int ret = 0;
  130. u32 reg;
  131. ret = img_spdif_in_check_max_rate(spdif, rate, &clk_rate);
  132. if (ret)
  133. return ret;
  134. ret = img_spdif_in_do_clkgen_calc(rate, &nom, &hld, clk_rate);
  135. if (ret)
  136. return ret;
  137. reg = (nom << IMG_SPDIF_IN_CLKGEN_NOM_SHIFT) &
  138. IMG_SPDIF_IN_CLKGEN_NOM_MASK;
  139. reg |= (hld << IMG_SPDIF_IN_CLKGEN_HLD_SHIFT) &
  140. IMG_SPDIF_IN_CLKGEN_HLD_MASK;
  141. spin_lock_irqsave(&spdif->lock, flags);
  142. if (spdif->active) {
  143. spin_unlock_irqrestore(&spdif->lock, flags);
  144. return -EBUSY;
  145. }
  146. img_spdif_in_writel(spdif, reg, IMG_SPDIF_IN_CLKGEN);
  147. spdif->single_freq = rate;
  148. spin_unlock_irqrestore(&spdif->lock, flags);
  149. return 0;
  150. }
  151. static int img_spdif_in_do_clkgen_multi(struct img_spdif_in *spdif,
  152. unsigned int multi_freqs[])
  153. {
  154. unsigned int nom, hld, rate, max_rate = 0;
  155. unsigned long flags, clk_rate;
  156. int i, ret = 0;
  157. u32 reg, trk_reg, temp_regs[IMG_SPDIF_IN_NUM_ACLKGEN];
  158. for (i = 0; i < IMG_SPDIF_IN_NUM_ACLKGEN; i++)
  159. if (multi_freqs[i] > max_rate)
  160. max_rate = multi_freqs[i];
  161. ret = img_spdif_in_check_max_rate(spdif, max_rate, &clk_rate);
  162. if (ret)
  163. return ret;
  164. for (i = 0; i < IMG_SPDIF_IN_NUM_ACLKGEN; i++) {
  165. rate = multi_freqs[i];
  166. ret = img_spdif_in_do_clkgen_calc(rate, &nom, &hld, clk_rate);
  167. if (ret)
  168. return ret;
  169. reg = (nom << IMG_SPDIF_IN_ACLKGEN_NOM_SHIFT) &
  170. IMG_SPDIF_IN_ACLKGEN_NOM_MASK;
  171. reg |= (hld << IMG_SPDIF_IN_ACLKGEN_HLD_SHIFT) &
  172. IMG_SPDIF_IN_ACLKGEN_HLD_MASK;
  173. temp_regs[i] = reg;
  174. }
  175. spin_lock_irqsave(&spdif->lock, flags);
  176. if (spdif->active) {
  177. spin_unlock_irqrestore(&spdif->lock, flags);
  178. return -EBUSY;
  179. }
  180. trk_reg = spdif->trk << IMG_SPDIF_IN_ACLKGEN_TRK_SHIFT;
  181. for (i = 0; i < IMG_SPDIF_IN_NUM_ACLKGEN; i++) {
  182. spdif->aclkgen_regs[i] = temp_regs[i] | trk_reg;
  183. img_spdif_in_aclkgen_writel(spdif, i);
  184. }
  185. spdif->multi_freq = true;
  186. spdif->multi_freqs[0] = multi_freqs[0];
  187. spdif->multi_freqs[1] = multi_freqs[1];
  188. spdif->multi_freqs[2] = multi_freqs[2];
  189. spdif->multi_freqs[3] = multi_freqs[3];
  190. spin_unlock_irqrestore(&spdif->lock, flags);
  191. return 0;
  192. }
  193. static int img_spdif_in_iec958_info(struct snd_kcontrol *kcontrol,
  194. struct snd_ctl_elem_info *uinfo)
  195. {
  196. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  197. uinfo->count = 1;
  198. return 0;
  199. }
  200. static int img_spdif_in_get_status_mask(struct snd_kcontrol *kcontrol,
  201. struct snd_ctl_elem_value *ucontrol)
  202. {
  203. ucontrol->value.iec958.status[0] = 0xff;
  204. ucontrol->value.iec958.status[1] = 0xff;
  205. ucontrol->value.iec958.status[2] = 0xff;
  206. ucontrol->value.iec958.status[3] = 0xff;
  207. ucontrol->value.iec958.status[4] = 0xff;
  208. return 0;
  209. }
  210. static int img_spdif_in_get_status(struct snd_kcontrol *kcontrol,
  211. struct snd_ctl_elem_value *ucontrol)
  212. {
  213. struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol);
  214. struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(cpu_dai);
  215. u32 reg;
  216. reg = img_spdif_in_readl(spdif, IMG_SPDIF_IN_CSL);
  217. ucontrol->value.iec958.status[0] = reg & 0xff;
  218. ucontrol->value.iec958.status[1] = (reg >> 8) & 0xff;
  219. ucontrol->value.iec958.status[2] = (reg >> 16) & 0xff;
  220. ucontrol->value.iec958.status[3] = (reg >> 24) & 0xff;
  221. reg = img_spdif_in_readl(spdif, IMG_SPDIF_IN_CSH);
  222. ucontrol->value.iec958.status[4] = (reg & IMG_SPDIF_IN_CSH_MASK)
  223. >> IMG_SPDIF_IN_CSH_SHIFT;
  224. return 0;
  225. }
  226. static int img_spdif_in_info_multi_freq(struct snd_kcontrol *kcontrol,
  227. struct snd_ctl_elem_info *uinfo)
  228. {
  229. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  230. uinfo->count = IMG_SPDIF_IN_NUM_ACLKGEN;
  231. uinfo->value.integer.min = 0;
  232. uinfo->value.integer.max = LONG_MAX;
  233. return 0;
  234. }
  235. static int img_spdif_in_get_multi_freq(struct snd_kcontrol *kcontrol,
  236. struct snd_ctl_elem_value *ucontrol)
  237. {
  238. struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol);
  239. struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(cpu_dai);
  240. unsigned long flags;
  241. spin_lock_irqsave(&spdif->lock, flags);
  242. if (spdif->multi_freq) {
  243. ucontrol->value.integer.value[0] = spdif->multi_freqs[0];
  244. ucontrol->value.integer.value[1] = spdif->multi_freqs[1];
  245. ucontrol->value.integer.value[2] = spdif->multi_freqs[2];
  246. ucontrol->value.integer.value[3] = spdif->multi_freqs[3];
  247. } else {
  248. ucontrol->value.integer.value[0] = 0;
  249. ucontrol->value.integer.value[1] = 0;
  250. ucontrol->value.integer.value[2] = 0;
  251. ucontrol->value.integer.value[3] = 0;
  252. }
  253. spin_unlock_irqrestore(&spdif->lock, flags);
  254. return 0;
  255. }
  256. static int img_spdif_in_set_multi_freq(struct snd_kcontrol *kcontrol,
  257. struct snd_ctl_elem_value *ucontrol)
  258. {
  259. struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol);
  260. struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(cpu_dai);
  261. unsigned int multi_freqs[IMG_SPDIF_IN_NUM_ACLKGEN];
  262. bool multi_freq;
  263. unsigned long flags;
  264. if ((ucontrol->value.integer.value[0] == 0) &&
  265. (ucontrol->value.integer.value[1] == 0) &&
  266. (ucontrol->value.integer.value[2] == 0) &&
  267. (ucontrol->value.integer.value[3] == 0)) {
  268. multi_freq = false;
  269. } else {
  270. multi_freqs[0] = ucontrol->value.integer.value[0];
  271. multi_freqs[1] = ucontrol->value.integer.value[1];
  272. multi_freqs[2] = ucontrol->value.integer.value[2];
  273. multi_freqs[3] = ucontrol->value.integer.value[3];
  274. multi_freq = true;
  275. }
  276. if (multi_freq)
  277. return img_spdif_in_do_clkgen_multi(spdif, multi_freqs);
  278. spin_lock_irqsave(&spdif->lock, flags);
  279. if (spdif->active) {
  280. spin_unlock_irqrestore(&spdif->lock, flags);
  281. return -EBUSY;
  282. }
  283. spdif->multi_freq = false;
  284. spin_unlock_irqrestore(&spdif->lock, flags);
  285. return 0;
  286. }
  287. static int img_spdif_in_info_lock_freq(struct snd_kcontrol *kcontrol,
  288. struct snd_ctl_elem_info *uinfo)
  289. {
  290. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  291. uinfo->count = 1;
  292. uinfo->value.integer.min = 0;
  293. uinfo->value.integer.max = LONG_MAX;
  294. return 0;
  295. }
  296. static int img_spdif_in_get_lock_freq(struct snd_kcontrol *kcontrol,
  297. struct snd_ctl_elem_value *uc)
  298. {
  299. struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol);
  300. struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(cpu_dai);
  301. u32 reg;
  302. int i;
  303. unsigned long flags;
  304. spin_lock_irqsave(&spdif->lock, flags);
  305. reg = img_spdif_in_readl(spdif, IMG_SPDIF_IN_STATUS);
  306. if (reg & IMG_SPDIF_IN_STATUS_LOCK_MASK) {
  307. if (spdif->multi_freq) {
  308. i = ((reg & IMG_SPDIF_IN_STATUS_SAM_MASK) >>
  309. IMG_SPDIF_IN_STATUS_SAM_SHIFT) - 1;
  310. uc->value.integer.value[0] = spdif->multi_freqs[i];
  311. } else {
  312. uc->value.integer.value[0] = spdif->single_freq;
  313. }
  314. } else {
  315. uc->value.integer.value[0] = 0;
  316. }
  317. spin_unlock_irqrestore(&spdif->lock, flags);
  318. return 0;
  319. }
  320. static int img_spdif_in_info_trk(struct snd_kcontrol *kcontrol,
  321. struct snd_ctl_elem_info *uinfo)
  322. {
  323. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  324. uinfo->count = 1;
  325. uinfo->value.integer.min = 0;
  326. uinfo->value.integer.max = 255;
  327. return 0;
  328. }
  329. static int img_spdif_in_get_trk(struct snd_kcontrol *kcontrol,
  330. struct snd_ctl_elem_value *ucontrol)
  331. {
  332. struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol);
  333. struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(cpu_dai);
  334. ucontrol->value.integer.value[0] = spdif->trk;
  335. return 0;
  336. }
  337. static int img_spdif_in_set_trk(struct snd_kcontrol *kcontrol,
  338. struct snd_ctl_elem_value *ucontrol)
  339. {
  340. struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol);
  341. struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(cpu_dai);
  342. unsigned long flags;
  343. int i;
  344. u32 reg;
  345. spin_lock_irqsave(&spdif->lock, flags);
  346. if (spdif->active) {
  347. spin_unlock_irqrestore(&spdif->lock, flags);
  348. return -EBUSY;
  349. }
  350. spdif->trk = ucontrol->value.integer.value[0];
  351. reg = img_spdif_in_readl(spdif, IMG_SPDIF_IN_CTL);
  352. reg &= ~IMG_SPDIF_IN_CTL_TRK_MASK;
  353. reg |= spdif->trk << IMG_SPDIF_IN_CTL_TRK_SHIFT;
  354. img_spdif_in_writel(spdif, reg, IMG_SPDIF_IN_CTL);
  355. for (i = 0; i < IMG_SPDIF_IN_NUM_ACLKGEN; i++) {
  356. spdif->aclkgen_regs[i] = (spdif->aclkgen_regs[i] &
  357. ~IMG_SPDIF_IN_ACLKGEN_TRK_MASK) |
  358. (spdif->trk << IMG_SPDIF_IN_ACLKGEN_TRK_SHIFT);
  359. img_spdif_in_aclkgen_writel(spdif, i);
  360. }
  361. spin_unlock_irqrestore(&spdif->lock, flags);
  362. return 0;
  363. }
  364. static int img_spdif_in_info_lock(struct snd_kcontrol *kcontrol,
  365. struct snd_ctl_elem_info *uinfo)
  366. {
  367. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  368. uinfo->count = 1;
  369. uinfo->value.integer.min = -128;
  370. uinfo->value.integer.max = 127;
  371. return 0;
  372. }
  373. static int img_spdif_in_get_lock_acquire(struct snd_kcontrol *kcontrol,
  374. struct snd_ctl_elem_value *ucontrol)
  375. {
  376. struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol);
  377. struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(cpu_dai);
  378. ucontrol->value.integer.value[0] = spdif->lock_acquire;
  379. return 0;
  380. }
  381. static int img_spdif_in_set_lock_acquire(struct snd_kcontrol *kcontrol,
  382. struct snd_ctl_elem_value *ucontrol)
  383. {
  384. struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol);
  385. struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(cpu_dai);
  386. unsigned long flags;
  387. u32 reg;
  388. spin_lock_irqsave(&spdif->lock, flags);
  389. if (spdif->active) {
  390. spin_unlock_irqrestore(&spdif->lock, flags);
  391. return -EBUSY;
  392. }
  393. spdif->lock_acquire = ucontrol->value.integer.value[0];
  394. reg = img_spdif_in_readl(spdif, IMG_SPDIF_IN_CTL);
  395. reg &= ~IMG_SPDIF_IN_CTL_LOCKHI_MASK;
  396. reg |= (spdif->lock_acquire << IMG_SPDIF_IN_CTL_LOCKHI_SHIFT) &
  397. IMG_SPDIF_IN_CTL_LOCKHI_MASK;
  398. img_spdif_in_writel(spdif, reg, IMG_SPDIF_IN_CTL);
  399. spin_unlock_irqrestore(&spdif->lock, flags);
  400. return 0;
  401. }
  402. static int img_spdif_in_get_lock_release(struct snd_kcontrol *kcontrol,
  403. struct snd_ctl_elem_value *ucontrol)
  404. {
  405. struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol);
  406. struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(cpu_dai);
  407. ucontrol->value.integer.value[0] = spdif->lock_release;
  408. return 0;
  409. }
  410. static int img_spdif_in_set_lock_release(struct snd_kcontrol *kcontrol,
  411. struct snd_ctl_elem_value *ucontrol)
  412. {
  413. struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol);
  414. struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(cpu_dai);
  415. unsigned long flags;
  416. u32 reg;
  417. spin_lock_irqsave(&spdif->lock, flags);
  418. if (spdif->active) {
  419. spin_unlock_irqrestore(&spdif->lock, flags);
  420. return -EBUSY;
  421. }
  422. spdif->lock_release = ucontrol->value.integer.value[0];
  423. reg = img_spdif_in_readl(spdif, IMG_SPDIF_IN_CTL);
  424. reg &= ~IMG_SPDIF_IN_CTL_LOCKLO_MASK;
  425. reg |= (spdif->lock_release << IMG_SPDIF_IN_CTL_LOCKLO_SHIFT) &
  426. IMG_SPDIF_IN_CTL_LOCKLO_MASK;
  427. img_spdif_in_writel(spdif, reg, IMG_SPDIF_IN_CTL);
  428. spin_unlock_irqrestore(&spdif->lock, flags);
  429. return 0;
  430. }
  431. static struct snd_kcontrol_new img_spdif_in_controls[] = {
  432. {
  433. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  434. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  435. .name = SNDRV_CTL_NAME_IEC958("", CAPTURE, MASK),
  436. .info = img_spdif_in_iec958_info,
  437. .get = img_spdif_in_get_status_mask
  438. },
  439. {
  440. .access = SNDRV_CTL_ELEM_ACCESS_READ |
  441. SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  442. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  443. .name = SNDRV_CTL_NAME_IEC958("", CAPTURE, DEFAULT),
  444. .info = img_spdif_in_iec958_info,
  445. .get = img_spdif_in_get_status
  446. },
  447. {
  448. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  449. .name = "SPDIF In Multi Frequency Acquire",
  450. .info = img_spdif_in_info_multi_freq,
  451. .get = img_spdif_in_get_multi_freq,
  452. .put = img_spdif_in_set_multi_freq
  453. },
  454. {
  455. .access = SNDRV_CTL_ELEM_ACCESS_READ |
  456. SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  457. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  458. .name = "SPDIF In Lock Frequency",
  459. .info = img_spdif_in_info_lock_freq,
  460. .get = img_spdif_in_get_lock_freq
  461. },
  462. {
  463. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  464. .name = "SPDIF In Lock TRK",
  465. .info = img_spdif_in_info_trk,
  466. .get = img_spdif_in_get_trk,
  467. .put = img_spdif_in_set_trk
  468. },
  469. {
  470. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  471. .name = "SPDIF In Lock Acquire Threshold",
  472. .info = img_spdif_in_info_lock,
  473. .get = img_spdif_in_get_lock_acquire,
  474. .put = img_spdif_in_set_lock_acquire
  475. },
  476. {
  477. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  478. .name = "SPDIF In Lock Release Threshold",
  479. .info = img_spdif_in_info_lock,
  480. .get = img_spdif_in_get_lock_release,
  481. .put = img_spdif_in_set_lock_release
  482. }
  483. };
  484. static int img_spdif_in_trigger(struct snd_pcm_substream *substream, int cmd,
  485. struct snd_soc_dai *dai)
  486. {
  487. unsigned long flags;
  488. struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(dai);
  489. int ret = 0;
  490. u32 reg;
  491. spin_lock_irqsave(&spdif->lock, flags);
  492. switch (cmd) {
  493. case SNDRV_PCM_TRIGGER_START:
  494. case SNDRV_PCM_TRIGGER_RESUME:
  495. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  496. reg = img_spdif_in_readl(spdif, IMG_SPDIF_IN_CTL);
  497. if (spdif->multi_freq)
  498. reg &= ~IMG_SPDIF_IN_CTL_SRD_MASK;
  499. else
  500. reg |= (1UL << IMG_SPDIF_IN_CTL_SRD_SHIFT);
  501. reg |= IMG_SPDIF_IN_CTL_SRT_MASK;
  502. img_spdif_in_writel(spdif, reg, IMG_SPDIF_IN_CTL);
  503. spdif->active = true;
  504. break;
  505. case SNDRV_PCM_TRIGGER_STOP:
  506. case SNDRV_PCM_TRIGGER_SUSPEND:
  507. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  508. reg = img_spdif_in_readl(spdif, IMG_SPDIF_IN_CTL);
  509. reg &= ~IMG_SPDIF_IN_CTL_SRT_MASK;
  510. img_spdif_in_writel(spdif, reg, IMG_SPDIF_IN_CTL);
  511. spdif->active = false;
  512. break;
  513. default:
  514. ret = -EINVAL;
  515. }
  516. spin_unlock_irqrestore(&spdif->lock, flags);
  517. return ret;
  518. }
  519. static int img_spdif_in_hw_params(struct snd_pcm_substream *substream,
  520. struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
  521. {
  522. struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(dai);
  523. unsigned int rate, channels;
  524. snd_pcm_format_t format;
  525. rate = params_rate(params);
  526. channels = params_channels(params);
  527. format = params_format(params);
  528. if (format != SNDRV_PCM_FORMAT_S32_LE)
  529. return -EINVAL;
  530. if (channels != 2)
  531. return -EINVAL;
  532. return img_spdif_in_do_clkgen_single(spdif, rate);
  533. }
  534. static const struct snd_soc_dai_ops img_spdif_in_dai_ops = {
  535. .trigger = img_spdif_in_trigger,
  536. .hw_params = img_spdif_in_hw_params
  537. };
  538. static int img_spdif_in_dai_probe(struct snd_soc_dai *dai)
  539. {
  540. struct img_spdif_in *spdif = snd_soc_dai_get_drvdata(dai);
  541. snd_soc_dai_init_dma_data(dai, NULL, &spdif->dma_data);
  542. snd_soc_add_dai_controls(dai, img_spdif_in_controls,
  543. ARRAY_SIZE(img_spdif_in_controls));
  544. return 0;
  545. }
  546. static struct snd_soc_dai_driver img_spdif_in_dai = {
  547. .probe = img_spdif_in_dai_probe,
  548. .capture = {
  549. .channels_min = 2,
  550. .channels_max = 2,
  551. .rates = SNDRV_PCM_RATE_8000_192000,
  552. .formats = SNDRV_PCM_FMTBIT_S32_LE
  553. },
  554. .ops = &img_spdif_in_dai_ops
  555. };
  556. static const struct snd_soc_component_driver img_spdif_in_component = {
  557. .name = "img-spdif-in"
  558. };
  559. static int img_spdif_in_probe(struct platform_device *pdev)
  560. {
  561. struct img_spdif_in *spdif;
  562. struct resource *res;
  563. void __iomem *base;
  564. int ret;
  565. struct reset_control *rst;
  566. u32 reg;
  567. struct device *dev = &pdev->dev;
  568. spdif = devm_kzalloc(&pdev->dev, sizeof(*spdif), GFP_KERNEL);
  569. if (!spdif)
  570. return -ENOMEM;
  571. platform_set_drvdata(pdev, spdif);
  572. spdif->dev = &pdev->dev;
  573. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  574. base = devm_ioremap_resource(&pdev->dev, res);
  575. if (IS_ERR(base))
  576. return PTR_ERR(base);
  577. spdif->base = base;
  578. spdif->clk_sys = devm_clk_get(dev, "sys");
  579. if (IS_ERR(spdif->clk_sys)) {
  580. if (PTR_ERR(spdif->clk_sys) != -EPROBE_DEFER)
  581. dev_err(dev, "Failed to acquire clock 'sys'\n");
  582. return PTR_ERR(spdif->clk_sys);
  583. }
  584. ret = clk_prepare_enable(spdif->clk_sys);
  585. if (ret)
  586. return ret;
  587. rst = devm_reset_control_get(&pdev->dev, "rst");
  588. if (IS_ERR(rst)) {
  589. if (PTR_ERR(rst) == -EPROBE_DEFER) {
  590. ret = -EPROBE_DEFER;
  591. goto err_clk_disable;
  592. }
  593. dev_dbg(dev, "No top level reset found\n");
  594. img_spdif_in_writel(spdif, IMG_SPDIF_IN_SOFT_RESET_MASK,
  595. IMG_SPDIF_IN_SOFT_RESET);
  596. img_spdif_in_writel(spdif, 0, IMG_SPDIF_IN_SOFT_RESET);
  597. } else {
  598. reset_control_assert(rst);
  599. reset_control_deassert(rst);
  600. }
  601. spin_lock_init(&spdif->lock);
  602. spdif->dma_data.addr = res->start + IMG_SPDIF_IN_RX_FIFO_OFFSET;
  603. spdif->dma_data.addr_width = 4;
  604. spdif->dma_data.maxburst = 4;
  605. spdif->trk = 0x80;
  606. spdif->lock_acquire = 4;
  607. spdif->lock_release = -128;
  608. reg = (spdif->lock_acquire << IMG_SPDIF_IN_CTL_LOCKHI_SHIFT) &
  609. IMG_SPDIF_IN_CTL_LOCKHI_MASK;
  610. reg |= (spdif->lock_release << IMG_SPDIF_IN_CTL_LOCKLO_SHIFT) &
  611. IMG_SPDIF_IN_CTL_LOCKLO_MASK;
  612. reg |= (spdif->trk << IMG_SPDIF_IN_CTL_TRK_SHIFT) &
  613. IMG_SPDIF_IN_CTL_TRK_MASK;
  614. img_spdif_in_writel(spdif, reg, IMG_SPDIF_IN_CTL);
  615. ret = devm_snd_soc_register_component(&pdev->dev,
  616. &img_spdif_in_component, &img_spdif_in_dai, 1);
  617. if (ret)
  618. goto err_clk_disable;
  619. ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0);
  620. if (ret)
  621. goto err_clk_disable;
  622. return 0;
  623. err_clk_disable:
  624. clk_disable_unprepare(spdif->clk_sys);
  625. return ret;
  626. }
  627. static int img_spdif_in_dev_remove(struct platform_device *pdev)
  628. {
  629. struct img_spdif_in *spdif = platform_get_drvdata(pdev);
  630. clk_disable_unprepare(spdif->clk_sys);
  631. return 0;
  632. }
  633. static const struct of_device_id img_spdif_in_of_match[] = {
  634. { .compatible = "img,spdif-in" },
  635. {}
  636. };
  637. MODULE_DEVICE_TABLE(of, img_spdif_in_of_match);
  638. static struct platform_driver img_spdif_in_driver = {
  639. .driver = {
  640. .name = "img-spdif-in",
  641. .of_match_table = img_spdif_in_of_match
  642. },
  643. .probe = img_spdif_in_probe,
  644. .remove = img_spdif_in_dev_remove
  645. };
  646. module_platform_driver(img_spdif_in_driver);
  647. MODULE_AUTHOR("Damien Horsley <Damien.Horsley@imgtec.com>");
  648. MODULE_DESCRIPTION("IMG SPDIF Input driver");
  649. MODULE_LICENSE("GPL v2");