mpc5200_psc_ac97.c 9.0 KB

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  1. /*
  2. * linux/sound/mpc5200-ac97.c -- AC97 support for the Freescale MPC52xx chip.
  3. *
  4. * Copyright (C) 2009 Jon Smirl, Digispeaker
  5. * Author: Jon Smirl <jonsmirl@gmail.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/of_device.h>
  13. #include <linux/of_platform.h>
  14. #include <linux/delay.h>
  15. #include <linux/time.h>
  16. #include <sound/pcm.h>
  17. #include <sound/pcm_params.h>
  18. #include <sound/soc.h>
  19. #include <asm/time.h>
  20. #include <asm/delay.h>
  21. #include <asm/mpc52xx.h>
  22. #include <asm/mpc52xx_psc.h>
  23. #include "mpc5200_dma.h"
  24. #include "mpc5200_psc_ac97.h"
  25. #define DRV_NAME "mpc5200-psc-ac97"
  26. /* ALSA only supports a single AC97 device so static is recommend here */
  27. static struct psc_dma *psc_dma;
  28. static unsigned short psc_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
  29. {
  30. int status;
  31. unsigned int val;
  32. mutex_lock(&psc_dma->mutex);
  33. /* Wait for command send status zero = ready */
  34. status = spin_event_timeout(!(in_be16(&psc_dma->psc_regs->sr_csr.status) &
  35. MPC52xx_PSC_SR_CMDSEND), 100, 0);
  36. if (status == 0) {
  37. pr_err("timeout on ac97 bus (rdy)\n");
  38. mutex_unlock(&psc_dma->mutex);
  39. return -ENODEV;
  40. }
  41. /* Force clear the data valid bit */
  42. in_be32(&psc_dma->psc_regs->ac97_data);
  43. /* Send the read */
  44. out_be32(&psc_dma->psc_regs->ac97_cmd, (1<<31) | ((reg & 0x7f) << 24));
  45. /* Wait for the answer */
  46. status = spin_event_timeout((in_be16(&psc_dma->psc_regs->sr_csr.status) &
  47. MPC52xx_PSC_SR_DATA_VAL), 100, 0);
  48. if (status == 0) {
  49. pr_err("timeout on ac97 read (val) %x\n",
  50. in_be16(&psc_dma->psc_regs->sr_csr.status));
  51. mutex_unlock(&psc_dma->mutex);
  52. return -ENODEV;
  53. }
  54. /* Get the data */
  55. val = in_be32(&psc_dma->psc_regs->ac97_data);
  56. if (((val >> 24) & 0x7f) != reg) {
  57. pr_err("reg echo error on ac97 read\n");
  58. mutex_unlock(&psc_dma->mutex);
  59. return -ENODEV;
  60. }
  61. val = (val >> 8) & 0xffff;
  62. mutex_unlock(&psc_dma->mutex);
  63. return (unsigned short) val;
  64. }
  65. static void psc_ac97_write(struct snd_ac97 *ac97,
  66. unsigned short reg, unsigned short val)
  67. {
  68. int status;
  69. mutex_lock(&psc_dma->mutex);
  70. /* Wait for command status zero = ready */
  71. status = spin_event_timeout(!(in_be16(&psc_dma->psc_regs->sr_csr.status) &
  72. MPC52xx_PSC_SR_CMDSEND), 100, 0);
  73. if (status == 0) {
  74. pr_err("timeout on ac97 bus (write)\n");
  75. goto out;
  76. }
  77. /* Write data */
  78. out_be32(&psc_dma->psc_regs->ac97_cmd,
  79. ((reg & 0x7f) << 24) | (val << 8));
  80. out:
  81. mutex_unlock(&psc_dma->mutex);
  82. }
  83. static void psc_ac97_warm_reset(struct snd_ac97 *ac97)
  84. {
  85. struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
  86. mutex_lock(&psc_dma->mutex);
  87. out_be32(&regs->sicr, psc_dma->sicr | MPC52xx_PSC_SICR_AWR);
  88. udelay(3);
  89. out_be32(&regs->sicr, psc_dma->sicr);
  90. mutex_unlock(&psc_dma->mutex);
  91. }
  92. static void psc_ac97_cold_reset(struct snd_ac97 *ac97)
  93. {
  94. struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
  95. mutex_lock(&psc_dma->mutex);
  96. dev_dbg(psc_dma->dev, "cold reset\n");
  97. mpc5200_psc_ac97_gpio_reset(psc_dma->id);
  98. /* Notify the PSC that a reset has occurred */
  99. out_be32(&regs->sicr, psc_dma->sicr | MPC52xx_PSC_SICR_ACRB);
  100. /* Re-enable RX and TX */
  101. out_8(&regs->command, MPC52xx_PSC_TX_ENABLE | MPC52xx_PSC_RX_ENABLE);
  102. mutex_unlock(&psc_dma->mutex);
  103. usleep_range(1000, 2000);
  104. psc_ac97_warm_reset(ac97);
  105. }
  106. static struct snd_ac97_bus_ops psc_ac97_ops = {
  107. .read = psc_ac97_read,
  108. .write = psc_ac97_write,
  109. .reset = psc_ac97_cold_reset,
  110. .warm_reset = psc_ac97_warm_reset,
  111. };
  112. static int psc_ac97_hw_analog_params(struct snd_pcm_substream *substream,
  113. struct snd_pcm_hw_params *params,
  114. struct snd_soc_dai *cpu_dai)
  115. {
  116. struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(cpu_dai);
  117. struct psc_dma_stream *s = to_psc_dma_stream(substream, psc_dma);
  118. dev_dbg(psc_dma->dev, "%s(substream=%p) p_size=%i p_bytes=%i"
  119. " periods=%i buffer_size=%i buffer_bytes=%i channels=%i"
  120. " rate=%i format=%i\n",
  121. __func__, substream, params_period_size(params),
  122. params_period_bytes(params), params_periods(params),
  123. params_buffer_size(params), params_buffer_bytes(params),
  124. params_channels(params), params_rate(params),
  125. params_format(params));
  126. /* Determine the set of enable bits to turn on */
  127. s->ac97_slot_bits = (params_channels(params) == 1) ? 0x100 : 0x300;
  128. if (substream->pstr->stream != SNDRV_PCM_STREAM_CAPTURE)
  129. s->ac97_slot_bits <<= 16;
  130. return 0;
  131. }
  132. static int psc_ac97_hw_digital_params(struct snd_pcm_substream *substream,
  133. struct snd_pcm_hw_params *params,
  134. struct snd_soc_dai *cpu_dai)
  135. {
  136. struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(cpu_dai);
  137. dev_dbg(psc_dma->dev, "%s(substream=%p)\n", __func__, substream);
  138. if (params_channels(params) == 1)
  139. out_be32(&psc_dma->psc_regs->ac97_slots, 0x01000000);
  140. else
  141. out_be32(&psc_dma->psc_regs->ac97_slots, 0x03000000);
  142. return 0;
  143. }
  144. static int psc_ac97_trigger(struct snd_pcm_substream *substream, int cmd,
  145. struct snd_soc_dai *dai)
  146. {
  147. struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(dai);
  148. struct psc_dma_stream *s = to_psc_dma_stream(substream, psc_dma);
  149. switch (cmd) {
  150. case SNDRV_PCM_TRIGGER_START:
  151. dev_dbg(psc_dma->dev, "AC97 START: stream=%i\n",
  152. substream->pstr->stream);
  153. /* Set the slot enable bits */
  154. psc_dma->slots |= s->ac97_slot_bits;
  155. out_be32(&psc_dma->psc_regs->ac97_slots, psc_dma->slots);
  156. break;
  157. case SNDRV_PCM_TRIGGER_STOP:
  158. dev_dbg(psc_dma->dev, "AC97 STOP: stream=%i\n",
  159. substream->pstr->stream);
  160. /* Clear the slot enable bits */
  161. psc_dma->slots &= ~(s->ac97_slot_bits);
  162. out_be32(&psc_dma->psc_regs->ac97_slots, psc_dma->slots);
  163. break;
  164. }
  165. return 0;
  166. }
  167. static int psc_ac97_probe(struct snd_soc_dai *cpu_dai)
  168. {
  169. struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(cpu_dai);
  170. struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
  171. /* Go */
  172. out_8(&regs->command, MPC52xx_PSC_TX_ENABLE | MPC52xx_PSC_RX_ENABLE);
  173. return 0;
  174. }
  175. /* ---------------------------------------------------------------------
  176. * ALSA SoC Bindings
  177. *
  178. * - Digital Audio Interface (DAI) template
  179. * - create/destroy dai hooks
  180. */
  181. /**
  182. * psc_ac97_dai_template: template CPU Digital Audio Interface
  183. */
  184. static const struct snd_soc_dai_ops psc_ac97_analog_ops = {
  185. .hw_params = psc_ac97_hw_analog_params,
  186. .trigger = psc_ac97_trigger,
  187. };
  188. static const struct snd_soc_dai_ops psc_ac97_digital_ops = {
  189. .hw_params = psc_ac97_hw_digital_params,
  190. };
  191. static struct snd_soc_dai_driver psc_ac97_dai[] = {
  192. {
  193. .name = "mpc5200-psc-ac97.0",
  194. .bus_control = true,
  195. .probe = psc_ac97_probe,
  196. .playback = {
  197. .stream_name = "AC97 Playback",
  198. .channels_min = 1,
  199. .channels_max = 6,
  200. .rates = SNDRV_PCM_RATE_8000_48000,
  201. .formats = SNDRV_PCM_FMTBIT_S32_BE,
  202. },
  203. .capture = {
  204. .stream_name = "AC97 Capture",
  205. .channels_min = 1,
  206. .channels_max = 2,
  207. .rates = SNDRV_PCM_RATE_8000_48000,
  208. .formats = SNDRV_PCM_FMTBIT_S32_BE,
  209. },
  210. .ops = &psc_ac97_analog_ops,
  211. },
  212. {
  213. .name = "mpc5200-psc-ac97.1",
  214. .bus_control = true,
  215. .playback = {
  216. .stream_name = "AC97 SPDIF",
  217. .channels_min = 1,
  218. .channels_max = 2,
  219. .rates = SNDRV_PCM_RATE_32000 | \
  220. SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000,
  221. .formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_BE,
  222. },
  223. .ops = &psc_ac97_digital_ops,
  224. } };
  225. static const struct snd_soc_component_driver psc_ac97_component = {
  226. .name = DRV_NAME,
  227. };
  228. /* ---------------------------------------------------------------------
  229. * OF platform bus binding code:
  230. * - Probe/remove operations
  231. * - OF device match table
  232. */
  233. static int psc_ac97_of_probe(struct platform_device *op)
  234. {
  235. int rc;
  236. struct mpc52xx_psc __iomem *regs;
  237. rc = mpc5200_audio_dma_create(op);
  238. if (rc != 0)
  239. return rc;
  240. rc = snd_soc_set_ac97_ops(&psc_ac97_ops);
  241. if (rc != 0) {
  242. dev_err(&op->dev, "Failed to set AC'97 ops: %d\n", rc);
  243. return rc;
  244. }
  245. rc = snd_soc_register_component(&op->dev, &psc_ac97_component,
  246. psc_ac97_dai, ARRAY_SIZE(psc_ac97_dai));
  247. if (rc != 0) {
  248. dev_err(&op->dev, "Failed to register DAI\n");
  249. return rc;
  250. }
  251. psc_dma = dev_get_drvdata(&op->dev);
  252. regs = psc_dma->psc_regs;
  253. psc_dma->imr = 0;
  254. out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr);
  255. /* Configure the serial interface mode to AC97 */
  256. psc_dma->sicr = MPC52xx_PSC_SICR_SIM_AC97 | MPC52xx_PSC_SICR_ENAC97;
  257. out_be32(&regs->sicr, psc_dma->sicr);
  258. /* No slots active */
  259. out_be32(&regs->ac97_slots, 0x00000000);
  260. return 0;
  261. }
  262. static int psc_ac97_of_remove(struct platform_device *op)
  263. {
  264. mpc5200_audio_dma_destroy(op);
  265. snd_soc_unregister_component(&op->dev);
  266. snd_soc_set_ac97_ops(NULL);
  267. return 0;
  268. }
  269. /* Match table for of_platform binding */
  270. static const struct of_device_id psc_ac97_match[] = {
  271. { .compatible = "fsl,mpc5200-psc-ac97", },
  272. { .compatible = "fsl,mpc5200b-psc-ac97", },
  273. {}
  274. };
  275. MODULE_DEVICE_TABLE(of, psc_ac97_match);
  276. static struct platform_driver psc_ac97_driver = {
  277. .probe = psc_ac97_of_probe,
  278. .remove = psc_ac97_of_remove,
  279. .driver = {
  280. .name = "mpc5200-psc-ac97",
  281. .of_match_table = psc_ac97_match,
  282. },
  283. };
  284. module_platform_driver(psc_ac97_driver);
  285. MODULE_AUTHOR("Jon Smirl <jonsmirl@gmail.com>");
  286. MODULE_DESCRIPTION("mpc5200 AC97 module");
  287. MODULE_LICENSE("GPL");