wm8955.h 25 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487
  1. /*
  2. * wm8955.h -- WM8904 ASoC driver
  3. *
  4. * Copyright 2009 Wolfson Microelectronics, plc
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #ifndef _WM8955_H
  13. #define _WM8955_H
  14. #define WM8955_CLK_MCLK 1
  15. /*
  16. * Register values.
  17. */
  18. #define WM8955_LOUT1_VOLUME 0x02
  19. #define WM8955_ROUT1_VOLUME 0x03
  20. #define WM8955_DAC_CONTROL 0x05
  21. #define WM8955_AUDIO_INTERFACE 0x07
  22. #define WM8955_SAMPLE_RATE 0x08
  23. #define WM8955_LEFT_DAC_VOLUME 0x0A
  24. #define WM8955_RIGHT_DAC_VOLUME 0x0B
  25. #define WM8955_BASS_CONTROL 0x0C
  26. #define WM8955_TREBLE_CONTROL 0x0D
  27. #define WM8955_RESET 0x0F
  28. #define WM8955_ADDITIONAL_CONTROL_1 0x17
  29. #define WM8955_ADDITIONAL_CONTROL_2 0x18
  30. #define WM8955_POWER_MANAGEMENT_1 0x19
  31. #define WM8955_POWER_MANAGEMENT_2 0x1A
  32. #define WM8955_ADDITIONAL_CONTROL_3 0x1B
  33. #define WM8955_LEFT_OUT_MIX_1 0x22
  34. #define WM8955_LEFT_OUT_MIX_2 0x23
  35. #define WM8955_RIGHT_OUT_MIX_1 0x24
  36. #define WM8955_RIGHT_OUT_MIX_2 0x25
  37. #define WM8955_MONO_OUT_MIX_1 0x26
  38. #define WM8955_MONO_OUT_MIX_2 0x27
  39. #define WM8955_LOUT2_VOLUME 0x28
  40. #define WM8955_ROUT2_VOLUME 0x29
  41. #define WM8955_MONOOUT_VOLUME 0x2A
  42. #define WM8955_CLOCKING_PLL 0x2B
  43. #define WM8955_PLL_CONTROL_1 0x2C
  44. #define WM8955_PLL_CONTROL_2 0x2D
  45. #define WM8955_PLL_CONTROL_3 0x2E
  46. #define WM8955_PLL_CONTROL_4 0x3B
  47. #define WM8955_REGISTER_COUNT 29
  48. #define WM8955_MAX_REGISTER 0x3B
  49. /*
  50. * Field Definitions.
  51. */
  52. /*
  53. * R2 (0x02) - LOUT1 volume
  54. */
  55. #define WM8955_LO1VU 0x0100 /* LO1VU */
  56. #define WM8955_LO1VU_MASK 0x0100 /* LO1VU */
  57. #define WM8955_LO1VU_SHIFT 8 /* LO1VU */
  58. #define WM8955_LO1VU_WIDTH 1 /* LO1VU */
  59. #define WM8955_LO1ZC 0x0080 /* LO1ZC */
  60. #define WM8955_LO1ZC_MASK 0x0080 /* LO1ZC */
  61. #define WM8955_LO1ZC_SHIFT 7 /* LO1ZC */
  62. #define WM8955_LO1ZC_WIDTH 1 /* LO1ZC */
  63. #define WM8955_LOUTVOL_MASK 0x007F /* LOUTVOL - [6:0] */
  64. #define WM8955_LOUTVOL_SHIFT 0 /* LOUTVOL - [6:0] */
  65. #define WM8955_LOUTVOL_WIDTH 7 /* LOUTVOL - [6:0] */
  66. /*
  67. * R3 (0x03) - ROUT1 volume
  68. */
  69. #define WM8955_RO1VU 0x0100 /* RO1VU */
  70. #define WM8955_RO1VU_MASK 0x0100 /* RO1VU */
  71. #define WM8955_RO1VU_SHIFT 8 /* RO1VU */
  72. #define WM8955_RO1VU_WIDTH 1 /* RO1VU */
  73. #define WM8955_RO1ZC 0x0080 /* RO1ZC */
  74. #define WM8955_RO1ZC_MASK 0x0080 /* RO1ZC */
  75. #define WM8955_RO1ZC_SHIFT 7 /* RO1ZC */
  76. #define WM8955_RO1ZC_WIDTH 1 /* RO1ZC */
  77. #define WM8955_ROUTVOL_MASK 0x007F /* ROUTVOL - [6:0] */
  78. #define WM8955_ROUTVOL_SHIFT 0 /* ROUTVOL - [6:0] */
  79. #define WM8955_ROUTVOL_WIDTH 7 /* ROUTVOL - [6:0] */
  80. /*
  81. * R5 (0x05) - DAC Control
  82. */
  83. #define WM8955_DAT 0x0080 /* DAT */
  84. #define WM8955_DAT_MASK 0x0080 /* DAT */
  85. #define WM8955_DAT_SHIFT 7 /* DAT */
  86. #define WM8955_DAT_WIDTH 1 /* DAT */
  87. #define WM8955_DACMU 0x0008 /* DACMU */
  88. #define WM8955_DACMU_MASK 0x0008 /* DACMU */
  89. #define WM8955_DACMU_SHIFT 3 /* DACMU */
  90. #define WM8955_DACMU_WIDTH 1 /* DACMU */
  91. #define WM8955_DEEMPH_MASK 0x0006 /* DEEMPH - [2:1] */
  92. #define WM8955_DEEMPH_SHIFT 1 /* DEEMPH - [2:1] */
  93. #define WM8955_DEEMPH_WIDTH 2 /* DEEMPH - [2:1] */
  94. /*
  95. * R7 (0x07) - Audio Interface
  96. */
  97. #define WM8955_BCLKINV 0x0080 /* BCLKINV */
  98. #define WM8955_BCLKINV_MASK 0x0080 /* BCLKINV */
  99. #define WM8955_BCLKINV_SHIFT 7 /* BCLKINV */
  100. #define WM8955_BCLKINV_WIDTH 1 /* BCLKINV */
  101. #define WM8955_MS 0x0040 /* MS */
  102. #define WM8955_MS_MASK 0x0040 /* MS */
  103. #define WM8955_MS_SHIFT 6 /* MS */
  104. #define WM8955_MS_WIDTH 1 /* MS */
  105. #define WM8955_LRSWAP 0x0020 /* LRSWAP */
  106. #define WM8955_LRSWAP_MASK 0x0020 /* LRSWAP */
  107. #define WM8955_LRSWAP_SHIFT 5 /* LRSWAP */
  108. #define WM8955_LRSWAP_WIDTH 1 /* LRSWAP */
  109. #define WM8955_LRP 0x0010 /* LRP */
  110. #define WM8955_LRP_MASK 0x0010 /* LRP */
  111. #define WM8955_LRP_SHIFT 4 /* LRP */
  112. #define WM8955_LRP_WIDTH 1 /* LRP */
  113. #define WM8955_WL_MASK 0x000C /* WL - [3:2] */
  114. #define WM8955_WL_SHIFT 2 /* WL - [3:2] */
  115. #define WM8955_WL_WIDTH 2 /* WL - [3:2] */
  116. #define WM8955_FORMAT_MASK 0x0003 /* FORMAT - [1:0] */
  117. #define WM8955_FORMAT_SHIFT 0 /* FORMAT - [1:0] */
  118. #define WM8955_FORMAT_WIDTH 2 /* FORMAT - [1:0] */
  119. /*
  120. * R8 (0x08) - Sample Rate
  121. */
  122. #define WM8955_BCLKDIV2 0x0080 /* BCLKDIV2 */
  123. #define WM8955_BCLKDIV2_MASK 0x0080 /* BCLKDIV2 */
  124. #define WM8955_BCLKDIV2_SHIFT 7 /* BCLKDIV2 */
  125. #define WM8955_BCLKDIV2_WIDTH 1 /* BCLKDIV2 */
  126. #define WM8955_MCLKDIV2 0x0040 /* MCLKDIV2 */
  127. #define WM8955_MCLKDIV2_MASK 0x0040 /* MCLKDIV2 */
  128. #define WM8955_MCLKDIV2_SHIFT 6 /* MCLKDIV2 */
  129. #define WM8955_MCLKDIV2_WIDTH 1 /* MCLKDIV2 */
  130. #define WM8955_SR_MASK 0x003E /* SR - [5:1] */
  131. #define WM8955_SR_SHIFT 1 /* SR - [5:1] */
  132. #define WM8955_SR_WIDTH 5 /* SR - [5:1] */
  133. #define WM8955_USB 0x0001 /* USB */
  134. #define WM8955_USB_MASK 0x0001 /* USB */
  135. #define WM8955_USB_SHIFT 0 /* USB */
  136. #define WM8955_USB_WIDTH 1 /* USB */
  137. /*
  138. * R10 (0x0A) - Left DAC volume
  139. */
  140. #define WM8955_LDVU 0x0100 /* LDVU */
  141. #define WM8955_LDVU_MASK 0x0100 /* LDVU */
  142. #define WM8955_LDVU_SHIFT 8 /* LDVU */
  143. #define WM8955_LDVU_WIDTH 1 /* LDVU */
  144. #define WM8955_LDACVOL_MASK 0x00FF /* LDACVOL - [7:0] */
  145. #define WM8955_LDACVOL_SHIFT 0 /* LDACVOL - [7:0] */
  146. #define WM8955_LDACVOL_WIDTH 8 /* LDACVOL - [7:0] */
  147. /*
  148. * R11 (0x0B) - Right DAC volume
  149. */
  150. #define WM8955_RDVU 0x0100 /* RDVU */
  151. #define WM8955_RDVU_MASK 0x0100 /* RDVU */
  152. #define WM8955_RDVU_SHIFT 8 /* RDVU */
  153. #define WM8955_RDVU_WIDTH 1 /* RDVU */
  154. #define WM8955_RDACVOL_MASK 0x00FF /* RDACVOL - [7:0] */
  155. #define WM8955_RDACVOL_SHIFT 0 /* RDACVOL - [7:0] */
  156. #define WM8955_RDACVOL_WIDTH 8 /* RDACVOL - [7:0] */
  157. /*
  158. * R12 (0x0C) - Bass control
  159. */
  160. #define WM8955_BB 0x0080 /* BB */
  161. #define WM8955_BB_MASK 0x0080 /* BB */
  162. #define WM8955_BB_SHIFT 7 /* BB */
  163. #define WM8955_BB_WIDTH 1 /* BB */
  164. #define WM8955_BC 0x0040 /* BC */
  165. #define WM8955_BC_MASK 0x0040 /* BC */
  166. #define WM8955_BC_SHIFT 6 /* BC */
  167. #define WM8955_BC_WIDTH 1 /* BC */
  168. #define WM8955_BASS_MASK 0x000F /* BASS - [3:0] */
  169. #define WM8955_BASS_SHIFT 0 /* BASS - [3:0] */
  170. #define WM8955_BASS_WIDTH 4 /* BASS - [3:0] */
  171. /*
  172. * R13 (0x0D) - Treble control
  173. */
  174. #define WM8955_TC 0x0040 /* TC */
  175. #define WM8955_TC_MASK 0x0040 /* TC */
  176. #define WM8955_TC_SHIFT 6 /* TC */
  177. #define WM8955_TC_WIDTH 1 /* TC */
  178. #define WM8955_TRBL_MASK 0x000F /* TRBL - [3:0] */
  179. #define WM8955_TRBL_SHIFT 0 /* TRBL - [3:0] */
  180. #define WM8955_TRBL_WIDTH 4 /* TRBL - [3:0] */
  181. /*
  182. * R15 (0x0F) - Reset
  183. */
  184. #define WM8955_RESET_MASK 0x01FF /* RESET - [8:0] */
  185. #define WM8955_RESET_SHIFT 0 /* RESET - [8:0] */
  186. #define WM8955_RESET_WIDTH 9 /* RESET - [8:0] */
  187. /*
  188. * R23 (0x17) - Additional control (1)
  189. */
  190. #define WM8955_TSDEN 0x0100 /* TSDEN */
  191. #define WM8955_TSDEN_MASK 0x0100 /* TSDEN */
  192. #define WM8955_TSDEN_SHIFT 8 /* TSDEN */
  193. #define WM8955_TSDEN_WIDTH 1 /* TSDEN */
  194. #define WM8955_VSEL_MASK 0x00C0 /* VSEL - [7:6] */
  195. #define WM8955_VSEL_SHIFT 6 /* VSEL - [7:6] */
  196. #define WM8955_VSEL_WIDTH 2 /* VSEL - [7:6] */
  197. #define WM8955_DMONOMIX_MASK 0x0030 /* DMONOMIX - [5:4] */
  198. #define WM8955_DMONOMIX_SHIFT 4 /* DMONOMIX - [5:4] */
  199. #define WM8955_DMONOMIX_WIDTH 2 /* DMONOMIX - [5:4] */
  200. #define WM8955_DACINV 0x0002 /* DACINV */
  201. #define WM8955_DACINV_MASK 0x0002 /* DACINV */
  202. #define WM8955_DACINV_SHIFT 1 /* DACINV */
  203. #define WM8955_DACINV_WIDTH 1 /* DACINV */
  204. #define WM8955_TOEN 0x0001 /* TOEN */
  205. #define WM8955_TOEN_MASK 0x0001 /* TOEN */
  206. #define WM8955_TOEN_SHIFT 0 /* TOEN */
  207. #define WM8955_TOEN_WIDTH 1 /* TOEN */
  208. /*
  209. * R24 (0x18) - Additional control (2)
  210. */
  211. #define WM8955_OUT3SW_MASK 0x0180 /* OUT3SW - [8:7] */
  212. #define WM8955_OUT3SW_SHIFT 7 /* OUT3SW - [8:7] */
  213. #define WM8955_OUT3SW_WIDTH 2 /* OUT3SW - [8:7] */
  214. #define WM8955_ROUT2INV 0x0010 /* ROUT2INV */
  215. #define WM8955_ROUT2INV_MASK 0x0010 /* ROUT2INV */
  216. #define WM8955_ROUT2INV_SHIFT 4 /* ROUT2INV */
  217. #define WM8955_ROUT2INV_WIDTH 1 /* ROUT2INV */
  218. #define WM8955_DACOSR 0x0001 /* DACOSR */
  219. #define WM8955_DACOSR_MASK 0x0001 /* DACOSR */
  220. #define WM8955_DACOSR_SHIFT 0 /* DACOSR */
  221. #define WM8955_DACOSR_WIDTH 1 /* DACOSR */
  222. /*
  223. * R25 (0x19) - Power Management (1)
  224. */
  225. #define WM8955_VMIDSEL_MASK 0x0180 /* VMIDSEL - [8:7] */
  226. #define WM8955_VMIDSEL_SHIFT 7 /* VMIDSEL - [8:7] */
  227. #define WM8955_VMIDSEL_WIDTH 2 /* VMIDSEL - [8:7] */
  228. #define WM8955_VREF 0x0040 /* VREF */
  229. #define WM8955_VREF_MASK 0x0040 /* VREF */
  230. #define WM8955_VREF_SHIFT 6 /* VREF */
  231. #define WM8955_VREF_WIDTH 1 /* VREF */
  232. #define WM8955_DIGENB 0x0001 /* DIGENB */
  233. #define WM8955_DIGENB_MASK 0x0001 /* DIGENB */
  234. #define WM8955_DIGENB_SHIFT 0 /* DIGENB */
  235. #define WM8955_DIGENB_WIDTH 1 /* DIGENB */
  236. /*
  237. * R26 (0x1A) - Power Management (2)
  238. */
  239. #define WM8955_DACL 0x0100 /* DACL */
  240. #define WM8955_DACL_MASK 0x0100 /* DACL */
  241. #define WM8955_DACL_SHIFT 8 /* DACL */
  242. #define WM8955_DACL_WIDTH 1 /* DACL */
  243. #define WM8955_DACR 0x0080 /* DACR */
  244. #define WM8955_DACR_MASK 0x0080 /* DACR */
  245. #define WM8955_DACR_SHIFT 7 /* DACR */
  246. #define WM8955_DACR_WIDTH 1 /* DACR */
  247. #define WM8955_LOUT1 0x0040 /* LOUT1 */
  248. #define WM8955_LOUT1_MASK 0x0040 /* LOUT1 */
  249. #define WM8955_LOUT1_SHIFT 6 /* LOUT1 */
  250. #define WM8955_LOUT1_WIDTH 1 /* LOUT1 */
  251. #define WM8955_ROUT1 0x0020 /* ROUT1 */
  252. #define WM8955_ROUT1_MASK 0x0020 /* ROUT1 */
  253. #define WM8955_ROUT1_SHIFT 5 /* ROUT1 */
  254. #define WM8955_ROUT1_WIDTH 1 /* ROUT1 */
  255. #define WM8955_LOUT2 0x0010 /* LOUT2 */
  256. #define WM8955_LOUT2_MASK 0x0010 /* LOUT2 */
  257. #define WM8955_LOUT2_SHIFT 4 /* LOUT2 */
  258. #define WM8955_LOUT2_WIDTH 1 /* LOUT2 */
  259. #define WM8955_ROUT2 0x0008 /* ROUT2 */
  260. #define WM8955_ROUT2_MASK 0x0008 /* ROUT2 */
  261. #define WM8955_ROUT2_SHIFT 3 /* ROUT2 */
  262. #define WM8955_ROUT2_WIDTH 1 /* ROUT2 */
  263. #define WM8955_MONO 0x0004 /* MONO */
  264. #define WM8955_MONO_MASK 0x0004 /* MONO */
  265. #define WM8955_MONO_SHIFT 2 /* MONO */
  266. #define WM8955_MONO_WIDTH 1 /* MONO */
  267. #define WM8955_OUT3 0x0002 /* OUT3 */
  268. #define WM8955_OUT3_MASK 0x0002 /* OUT3 */
  269. #define WM8955_OUT3_SHIFT 1 /* OUT3 */
  270. #define WM8955_OUT3_WIDTH 1 /* OUT3 */
  271. /*
  272. * R27 (0x1B) - Additional Control (3)
  273. */
  274. #define WM8955_VROI 0x0040 /* VROI */
  275. #define WM8955_VROI_MASK 0x0040 /* VROI */
  276. #define WM8955_VROI_SHIFT 6 /* VROI */
  277. #define WM8955_VROI_WIDTH 1 /* VROI */
  278. /*
  279. * R34 (0x22) - Left out Mix (1)
  280. */
  281. #define WM8955_LD2LO 0x0100 /* LD2LO */
  282. #define WM8955_LD2LO_MASK 0x0100 /* LD2LO */
  283. #define WM8955_LD2LO_SHIFT 8 /* LD2LO */
  284. #define WM8955_LD2LO_WIDTH 1 /* LD2LO */
  285. #define WM8955_LI2LO 0x0080 /* LI2LO */
  286. #define WM8955_LI2LO_MASK 0x0080 /* LI2LO */
  287. #define WM8955_LI2LO_SHIFT 7 /* LI2LO */
  288. #define WM8955_LI2LO_WIDTH 1 /* LI2LO */
  289. #define WM8955_LI2LOVOL_MASK 0x0070 /* LI2LOVOL - [6:4] */
  290. #define WM8955_LI2LOVOL_SHIFT 4 /* LI2LOVOL - [6:4] */
  291. #define WM8955_LI2LOVOL_WIDTH 3 /* LI2LOVOL - [6:4] */
  292. /*
  293. * R35 (0x23) - Left out Mix (2)
  294. */
  295. #define WM8955_RD2LO 0x0100 /* RD2LO */
  296. #define WM8955_RD2LO_MASK 0x0100 /* RD2LO */
  297. #define WM8955_RD2LO_SHIFT 8 /* RD2LO */
  298. #define WM8955_RD2LO_WIDTH 1 /* RD2LO */
  299. #define WM8955_RI2LO 0x0080 /* RI2LO */
  300. #define WM8955_RI2LO_MASK 0x0080 /* RI2LO */
  301. #define WM8955_RI2LO_SHIFT 7 /* RI2LO */
  302. #define WM8955_RI2LO_WIDTH 1 /* RI2LO */
  303. #define WM8955_RI2LOVOL_MASK 0x0070 /* RI2LOVOL - [6:4] */
  304. #define WM8955_RI2LOVOL_SHIFT 4 /* RI2LOVOL - [6:4] */
  305. #define WM8955_RI2LOVOL_WIDTH 3 /* RI2LOVOL - [6:4] */
  306. /*
  307. * R36 (0x24) - Right out Mix (1)
  308. */
  309. #define WM8955_LD2RO 0x0100 /* LD2RO */
  310. #define WM8955_LD2RO_MASK 0x0100 /* LD2RO */
  311. #define WM8955_LD2RO_SHIFT 8 /* LD2RO */
  312. #define WM8955_LD2RO_WIDTH 1 /* LD2RO */
  313. #define WM8955_LI2RO 0x0080 /* LI2RO */
  314. #define WM8955_LI2RO_MASK 0x0080 /* LI2RO */
  315. #define WM8955_LI2RO_SHIFT 7 /* LI2RO */
  316. #define WM8955_LI2RO_WIDTH 1 /* LI2RO */
  317. #define WM8955_LI2ROVOL_MASK 0x0070 /* LI2ROVOL - [6:4] */
  318. #define WM8955_LI2ROVOL_SHIFT 4 /* LI2ROVOL - [6:4] */
  319. #define WM8955_LI2ROVOL_WIDTH 3 /* LI2ROVOL - [6:4] */
  320. /*
  321. * R37 (0x25) - Right Out Mix (2)
  322. */
  323. #define WM8955_RD2RO 0x0100 /* RD2RO */
  324. #define WM8955_RD2RO_MASK 0x0100 /* RD2RO */
  325. #define WM8955_RD2RO_SHIFT 8 /* RD2RO */
  326. #define WM8955_RD2RO_WIDTH 1 /* RD2RO */
  327. #define WM8955_RI2RO 0x0080 /* RI2RO */
  328. #define WM8955_RI2RO_MASK 0x0080 /* RI2RO */
  329. #define WM8955_RI2RO_SHIFT 7 /* RI2RO */
  330. #define WM8955_RI2RO_WIDTH 1 /* RI2RO */
  331. #define WM8955_RI2ROVOL_MASK 0x0070 /* RI2ROVOL - [6:4] */
  332. #define WM8955_RI2ROVOL_SHIFT 4 /* RI2ROVOL - [6:4] */
  333. #define WM8955_RI2ROVOL_WIDTH 3 /* RI2ROVOL - [6:4] */
  334. /*
  335. * R38 (0x26) - Mono out Mix (1)
  336. */
  337. #define WM8955_LD2MO 0x0100 /* LD2MO */
  338. #define WM8955_LD2MO_MASK 0x0100 /* LD2MO */
  339. #define WM8955_LD2MO_SHIFT 8 /* LD2MO */
  340. #define WM8955_LD2MO_WIDTH 1 /* LD2MO */
  341. #define WM8955_LI2MO 0x0080 /* LI2MO */
  342. #define WM8955_LI2MO_MASK 0x0080 /* LI2MO */
  343. #define WM8955_LI2MO_SHIFT 7 /* LI2MO */
  344. #define WM8955_LI2MO_WIDTH 1 /* LI2MO */
  345. #define WM8955_LI2MOVOL_MASK 0x0070 /* LI2MOVOL - [6:4] */
  346. #define WM8955_LI2MOVOL_SHIFT 4 /* LI2MOVOL - [6:4] */
  347. #define WM8955_LI2MOVOL_WIDTH 3 /* LI2MOVOL - [6:4] */
  348. #define WM8955_DMEN 0x0001 /* DMEN */
  349. #define WM8955_DMEN_MASK 0x0001 /* DMEN */
  350. #define WM8955_DMEN_SHIFT 0 /* DMEN */
  351. #define WM8955_DMEN_WIDTH 1 /* DMEN */
  352. /*
  353. * R39 (0x27) - Mono out Mix (2)
  354. */
  355. #define WM8955_RD2MO 0x0100 /* RD2MO */
  356. #define WM8955_RD2MO_MASK 0x0100 /* RD2MO */
  357. #define WM8955_RD2MO_SHIFT 8 /* RD2MO */
  358. #define WM8955_RD2MO_WIDTH 1 /* RD2MO */
  359. #define WM8955_RI2MO 0x0080 /* RI2MO */
  360. #define WM8955_RI2MO_MASK 0x0080 /* RI2MO */
  361. #define WM8955_RI2MO_SHIFT 7 /* RI2MO */
  362. #define WM8955_RI2MO_WIDTH 1 /* RI2MO */
  363. #define WM8955_RI2MOVOL_MASK 0x0070 /* RI2MOVOL - [6:4] */
  364. #define WM8955_RI2MOVOL_SHIFT 4 /* RI2MOVOL - [6:4] */
  365. #define WM8955_RI2MOVOL_WIDTH 3 /* RI2MOVOL - [6:4] */
  366. /*
  367. * R40 (0x28) - LOUT2 volume
  368. */
  369. #define WM8955_LO2VU 0x0100 /* LO2VU */
  370. #define WM8955_LO2VU_MASK 0x0100 /* LO2VU */
  371. #define WM8955_LO2VU_SHIFT 8 /* LO2VU */
  372. #define WM8955_LO2VU_WIDTH 1 /* LO2VU */
  373. #define WM8955_LO2ZC 0x0080 /* LO2ZC */
  374. #define WM8955_LO2ZC_MASK 0x0080 /* LO2ZC */
  375. #define WM8955_LO2ZC_SHIFT 7 /* LO2ZC */
  376. #define WM8955_LO2ZC_WIDTH 1 /* LO2ZC */
  377. #define WM8955_LOUT2VOL_MASK 0x007F /* LOUT2VOL - [6:0] */
  378. #define WM8955_LOUT2VOL_SHIFT 0 /* LOUT2VOL - [6:0] */
  379. #define WM8955_LOUT2VOL_WIDTH 7 /* LOUT2VOL - [6:0] */
  380. /*
  381. * R41 (0x29) - ROUT2 volume
  382. */
  383. #define WM8955_RO2VU 0x0100 /* RO2VU */
  384. #define WM8955_RO2VU_MASK 0x0100 /* RO2VU */
  385. #define WM8955_RO2VU_SHIFT 8 /* RO2VU */
  386. #define WM8955_RO2VU_WIDTH 1 /* RO2VU */
  387. #define WM8955_RO2ZC 0x0080 /* RO2ZC */
  388. #define WM8955_RO2ZC_MASK 0x0080 /* RO2ZC */
  389. #define WM8955_RO2ZC_SHIFT 7 /* RO2ZC */
  390. #define WM8955_RO2ZC_WIDTH 1 /* RO2ZC */
  391. #define WM8955_ROUT2VOL_MASK 0x007F /* ROUT2VOL - [6:0] */
  392. #define WM8955_ROUT2VOL_SHIFT 0 /* ROUT2VOL - [6:0] */
  393. #define WM8955_ROUT2VOL_WIDTH 7 /* ROUT2VOL - [6:0] */
  394. /*
  395. * R42 (0x2A) - MONOOUT volume
  396. */
  397. #define WM8955_MOZC 0x0080 /* MOZC */
  398. #define WM8955_MOZC_MASK 0x0080 /* MOZC */
  399. #define WM8955_MOZC_SHIFT 7 /* MOZC */
  400. #define WM8955_MOZC_WIDTH 1 /* MOZC */
  401. #define WM8955_MOUTVOL_MASK 0x007F /* MOUTVOL - [6:0] */
  402. #define WM8955_MOUTVOL_SHIFT 0 /* MOUTVOL - [6:0] */
  403. #define WM8955_MOUTVOL_WIDTH 7 /* MOUTVOL - [6:0] */
  404. /*
  405. * R43 (0x2B) - Clocking / PLL
  406. */
  407. #define WM8955_MCLKSEL 0x0100 /* MCLKSEL */
  408. #define WM8955_MCLKSEL_MASK 0x0100 /* MCLKSEL */
  409. #define WM8955_MCLKSEL_SHIFT 8 /* MCLKSEL */
  410. #define WM8955_MCLKSEL_WIDTH 1 /* MCLKSEL */
  411. #define WM8955_PLLOUTDIV2 0x0020 /* PLLOUTDIV2 */
  412. #define WM8955_PLLOUTDIV2_MASK 0x0020 /* PLLOUTDIV2 */
  413. #define WM8955_PLLOUTDIV2_SHIFT 5 /* PLLOUTDIV2 */
  414. #define WM8955_PLLOUTDIV2_WIDTH 1 /* PLLOUTDIV2 */
  415. #define WM8955_PLL_RB 0x0010 /* PLL_RB */
  416. #define WM8955_PLL_RB_MASK 0x0010 /* PLL_RB */
  417. #define WM8955_PLL_RB_SHIFT 4 /* PLL_RB */
  418. #define WM8955_PLL_RB_WIDTH 1 /* PLL_RB */
  419. #define WM8955_PLLEN 0x0008 /* PLLEN */
  420. #define WM8955_PLLEN_MASK 0x0008 /* PLLEN */
  421. #define WM8955_PLLEN_SHIFT 3 /* PLLEN */
  422. #define WM8955_PLLEN_WIDTH 1 /* PLLEN */
  423. /*
  424. * R44 (0x2C) - PLL Control 1
  425. */
  426. #define WM8955_N_MASK 0x01E0 /* N - [8:5] */
  427. #define WM8955_N_SHIFT 5 /* N - [8:5] */
  428. #define WM8955_N_WIDTH 4 /* N - [8:5] */
  429. #define WM8955_K_21_18_MASK 0x000F /* K(21:18) - [3:0] */
  430. #define WM8955_K_21_18_SHIFT 0 /* K(21:18) - [3:0] */
  431. #define WM8955_K_21_18_WIDTH 4 /* K(21:18) - [3:0] */
  432. /*
  433. * R45 (0x2D) - PLL Control 2
  434. */
  435. #define WM8955_K_17_9_MASK 0x01FF /* K(17:9) - [8:0] */
  436. #define WM8955_K_17_9_SHIFT 0 /* K(17:9) - [8:0] */
  437. #define WM8955_K_17_9_WIDTH 9 /* K(17:9) - [8:0] */
  438. /*
  439. * R46 (0x2E) - PLL Control 3
  440. */
  441. #define WM8955_K_8_0_MASK 0x01FF /* K(8:0) - [8:0] */
  442. #define WM8955_K_8_0_SHIFT 0 /* K(8:0) - [8:0] */
  443. #define WM8955_K_8_0_WIDTH 9 /* K(8:0) - [8:0] */
  444. /*
  445. * R59 (0x3B) - PLL Control 4
  446. */
  447. #define WM8955_KEN 0x0080 /* KEN */
  448. #define WM8955_KEN_MASK 0x0080 /* KEN */
  449. #define WM8955_KEN_SHIFT 7 /* KEN */
  450. #define WM8955_KEN_WIDTH 1 /* KEN */
  451. #endif