wm8523.h 7.3 KB

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  1. /*
  2. * wm8523.h -- WM8423 ASoC driver
  3. *
  4. * Copyright 2009 Wolfson Microelectronics, plc
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. * Based on wm8753.h
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #ifndef _WM8523_H
  15. #define _WM8523_H
  16. /*
  17. * Register values.
  18. */
  19. #define WM8523_DEVICE_ID 0x00
  20. #define WM8523_REVISION 0x01
  21. #define WM8523_PSCTRL1 0x02
  22. #define WM8523_AIF_CTRL1 0x03
  23. #define WM8523_AIF_CTRL2 0x04
  24. #define WM8523_DAC_CTRL3 0x05
  25. #define WM8523_DAC_GAINL 0x06
  26. #define WM8523_DAC_GAINR 0x07
  27. #define WM8523_ZERO_DETECT 0x08
  28. #define WM8523_REGISTER_COUNT 9
  29. #define WM8523_MAX_REGISTER 0x08
  30. /*
  31. * Field Definitions.
  32. */
  33. /*
  34. * R0 (0x00) - DEVICE_ID
  35. */
  36. #define WM8523_CHIP_ID_MASK 0xFFFF /* CHIP_ID - [15:0] */
  37. #define WM8523_CHIP_ID_SHIFT 0 /* CHIP_ID - [15:0] */
  38. #define WM8523_CHIP_ID_WIDTH 16 /* CHIP_ID - [15:0] */
  39. /*
  40. * R1 (0x01) - REVISION
  41. */
  42. #define WM8523_CHIP_REV_MASK 0x0007 /* CHIP_REV - [2:0] */
  43. #define WM8523_CHIP_REV_SHIFT 0 /* CHIP_REV - [2:0] */
  44. #define WM8523_CHIP_REV_WIDTH 3 /* CHIP_REV - [2:0] */
  45. /*
  46. * R2 (0x02) - PSCTRL1
  47. */
  48. #define WM8523_SYS_ENA_MASK 0x0003 /* SYS_ENA - [1:0] */
  49. #define WM8523_SYS_ENA_SHIFT 0 /* SYS_ENA - [1:0] */
  50. #define WM8523_SYS_ENA_WIDTH 2 /* SYS_ENA - [1:0] */
  51. /*
  52. * R3 (0x03) - AIF_CTRL1
  53. */
  54. #define WM8523_TDM_MODE_MASK 0x1800 /* TDM_MODE - [12:11] */
  55. #define WM8523_TDM_MODE_SHIFT 11 /* TDM_MODE - [12:11] */
  56. #define WM8523_TDM_MODE_WIDTH 2 /* TDM_MODE - [12:11] */
  57. #define WM8523_TDM_SLOT_MASK 0x0600 /* TDM_SLOT - [10:9] */
  58. #define WM8523_TDM_SLOT_SHIFT 9 /* TDM_SLOT - [10:9] */
  59. #define WM8523_TDM_SLOT_WIDTH 2 /* TDM_SLOT - [10:9] */
  60. #define WM8523_DEEMPH 0x0100 /* DEEMPH */
  61. #define WM8523_DEEMPH_MASK 0x0100 /* DEEMPH */
  62. #define WM8523_DEEMPH_SHIFT 8 /* DEEMPH */
  63. #define WM8523_DEEMPH_WIDTH 1 /* DEEMPH */
  64. #define WM8523_AIF_MSTR 0x0080 /* AIF_MSTR */
  65. #define WM8523_AIF_MSTR_MASK 0x0080 /* AIF_MSTR */
  66. #define WM8523_AIF_MSTR_SHIFT 7 /* AIF_MSTR */
  67. #define WM8523_AIF_MSTR_WIDTH 1 /* AIF_MSTR */
  68. #define WM8523_LRCLK_INV 0x0040 /* LRCLK_INV */
  69. #define WM8523_LRCLK_INV_MASK 0x0040 /* LRCLK_INV */
  70. #define WM8523_LRCLK_INV_SHIFT 6 /* LRCLK_INV */
  71. #define WM8523_LRCLK_INV_WIDTH 1 /* LRCLK_INV */
  72. #define WM8523_BCLK_INV 0x0020 /* BCLK_INV */
  73. #define WM8523_BCLK_INV_MASK 0x0020 /* BCLK_INV */
  74. #define WM8523_BCLK_INV_SHIFT 5 /* BCLK_INV */
  75. #define WM8523_BCLK_INV_WIDTH 1 /* BCLK_INV */
  76. #define WM8523_WL_MASK 0x0018 /* WL - [4:3] */
  77. #define WM8523_WL_SHIFT 3 /* WL - [4:3] */
  78. #define WM8523_WL_WIDTH 2 /* WL - [4:3] */
  79. #define WM8523_FMT_MASK 0x0007 /* FMT - [2:0] */
  80. #define WM8523_FMT_SHIFT 0 /* FMT - [2:0] */
  81. #define WM8523_FMT_WIDTH 3 /* FMT - [2:0] */
  82. /*
  83. * R4 (0x04) - AIF_CTRL2
  84. */
  85. #define WM8523_DAC_OP_MUX_MASK 0x00C0 /* DAC_OP_MUX - [7:6] */
  86. #define WM8523_DAC_OP_MUX_SHIFT 6 /* DAC_OP_MUX - [7:6] */
  87. #define WM8523_DAC_OP_MUX_WIDTH 2 /* DAC_OP_MUX - [7:6] */
  88. #define WM8523_BCLKDIV_MASK 0x0038 /* BCLKDIV - [5:3] */
  89. #define WM8523_BCLKDIV_SHIFT 3 /* BCLKDIV - [5:3] */
  90. #define WM8523_BCLKDIV_WIDTH 3 /* BCLKDIV - [5:3] */
  91. #define WM8523_SR_MASK 0x0007 /* SR - [2:0] */
  92. #define WM8523_SR_SHIFT 0 /* SR - [2:0] */
  93. #define WM8523_SR_WIDTH 3 /* SR - [2:0] */
  94. /*
  95. * R5 (0x05) - DAC_CTRL3
  96. */
  97. #define WM8523_ZC 0x0010 /* ZC */
  98. #define WM8523_ZC_MASK 0x0010 /* ZC */
  99. #define WM8523_ZC_SHIFT 4 /* ZC */
  100. #define WM8523_ZC_WIDTH 1 /* ZC */
  101. #define WM8523_DACR 0x0008 /* DACR */
  102. #define WM8523_DACR_MASK 0x0008 /* DACR */
  103. #define WM8523_DACR_SHIFT 3 /* DACR */
  104. #define WM8523_DACR_WIDTH 1 /* DACR */
  105. #define WM8523_DACL 0x0004 /* DACL */
  106. #define WM8523_DACL_MASK 0x0004 /* DACL */
  107. #define WM8523_DACL_SHIFT 2 /* DACL */
  108. #define WM8523_DACL_WIDTH 1 /* DACL */
  109. #define WM8523_VOL_UP_RAMP 0x0002 /* VOL_UP_RAMP */
  110. #define WM8523_VOL_UP_RAMP_MASK 0x0002 /* VOL_UP_RAMP */
  111. #define WM8523_VOL_UP_RAMP_SHIFT 1 /* VOL_UP_RAMP */
  112. #define WM8523_VOL_UP_RAMP_WIDTH 1 /* VOL_UP_RAMP */
  113. #define WM8523_VOL_DOWN_RAMP 0x0001 /* VOL_DOWN_RAMP */
  114. #define WM8523_VOL_DOWN_RAMP_MASK 0x0001 /* VOL_DOWN_RAMP */
  115. #define WM8523_VOL_DOWN_RAMP_SHIFT 0 /* VOL_DOWN_RAMP */
  116. #define WM8523_VOL_DOWN_RAMP_WIDTH 1 /* VOL_DOWN_RAMP */
  117. /*
  118. * R6 (0x06) - DAC_GAINL
  119. */
  120. #define WM8523_DACL_VU 0x0200 /* DACL_VU */
  121. #define WM8523_DACL_VU_MASK 0x0200 /* DACL_VU */
  122. #define WM8523_DACL_VU_SHIFT 9 /* DACL_VU */
  123. #define WM8523_DACL_VU_WIDTH 1 /* DACL_VU */
  124. #define WM8523_DACL_VOL_MASK 0x01FF /* DACL_VOL - [8:0] */
  125. #define WM8523_DACL_VOL_SHIFT 0 /* DACL_VOL - [8:0] */
  126. #define WM8523_DACL_VOL_WIDTH 9 /* DACL_VOL - [8:0] */
  127. /*
  128. * R7 (0x07) - DAC_GAINR
  129. */
  130. #define WM8523_DACR_VU 0x0200 /* DACR_VU */
  131. #define WM8523_DACR_VU_MASK 0x0200 /* DACR_VU */
  132. #define WM8523_DACR_VU_SHIFT 9 /* DACR_VU */
  133. #define WM8523_DACR_VU_WIDTH 1 /* DACR_VU */
  134. #define WM8523_DACR_VOL_MASK 0x01FF /* DACR_VOL - [8:0] */
  135. #define WM8523_DACR_VOL_SHIFT 0 /* DACR_VOL - [8:0] */
  136. #define WM8523_DACR_VOL_WIDTH 9 /* DACR_VOL - [8:0] */
  137. /*
  138. * R8 (0x08) - ZERO_DETECT
  139. */
  140. #define WM8523_ZD_COUNT_MASK 0x0003 /* ZD_COUNT - [1:0] */
  141. #define WM8523_ZD_COUNT_SHIFT 0 /* ZD_COUNT - [1:0] */
  142. #define WM8523_ZD_COUNT_WIDTH 2 /* ZD_COUNT - [1:0] */
  143. #endif