wm8523.c 14 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573
  1. /*
  2. * wm8523.c -- WM8523 ALSA SoC Audio driver
  3. *
  4. * Copyright 2009 Wolfson Microelectronics plc
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/moduleparam.h>
  15. #include <linux/init.h>
  16. #include <linux/delay.h>
  17. #include <linux/pm.h>
  18. #include <linux/i2c.h>
  19. #include <linux/regmap.h>
  20. #include <linux/regulator/consumer.h>
  21. #include <linux/slab.h>
  22. #include <linux/of_device.h>
  23. #include <sound/core.h>
  24. #include <sound/pcm.h>
  25. #include <sound/pcm_params.h>
  26. #include <sound/soc.h>
  27. #include <sound/initval.h>
  28. #include <sound/tlv.h>
  29. #include "wm8523.h"
  30. #define WM8523_NUM_SUPPLIES 2
  31. static const char *wm8523_supply_names[WM8523_NUM_SUPPLIES] = {
  32. "AVDD",
  33. "LINEVDD",
  34. };
  35. #define WM8523_NUM_RATES 7
  36. /* codec private data */
  37. struct wm8523_priv {
  38. struct regmap *regmap;
  39. struct regulator_bulk_data supplies[WM8523_NUM_SUPPLIES];
  40. unsigned int sysclk;
  41. unsigned int rate_constraint_list[WM8523_NUM_RATES];
  42. struct snd_pcm_hw_constraint_list rate_constraint;
  43. };
  44. static const struct reg_default wm8523_reg_defaults[] = {
  45. { 2, 0x0000 }, /* R2 - PSCTRL1 */
  46. { 3, 0x1812 }, /* R3 - AIF_CTRL1 */
  47. { 4, 0x0000 }, /* R4 - AIF_CTRL2 */
  48. { 5, 0x0001 }, /* R5 - DAC_CTRL3 */
  49. { 6, 0x0190 }, /* R6 - DAC_GAINL */
  50. { 7, 0x0190 }, /* R7 - DAC_GAINR */
  51. { 8, 0x0000 }, /* R8 - ZERO_DETECT */
  52. };
  53. static bool wm8523_volatile_register(struct device *dev, unsigned int reg)
  54. {
  55. switch (reg) {
  56. case WM8523_DEVICE_ID:
  57. case WM8523_REVISION:
  58. return true;
  59. default:
  60. return false;
  61. }
  62. }
  63. static const DECLARE_TLV_DB_SCALE(dac_tlv, -10000, 25, 0);
  64. static const char *wm8523_zd_count_text[] = {
  65. "1024",
  66. "2048",
  67. };
  68. static SOC_ENUM_SINGLE_DECL(wm8523_zc_count, WM8523_ZERO_DETECT, 0,
  69. wm8523_zd_count_text);
  70. static const struct snd_kcontrol_new wm8523_controls[] = {
  71. SOC_DOUBLE_R_TLV("Playback Volume", WM8523_DAC_GAINL, WM8523_DAC_GAINR,
  72. 0, 448, 0, dac_tlv),
  73. SOC_SINGLE("ZC Switch", WM8523_DAC_CTRL3, 4, 1, 0),
  74. SOC_SINGLE("Playback Deemphasis Switch", WM8523_AIF_CTRL1, 8, 1, 0),
  75. SOC_DOUBLE("Playback Switch", WM8523_DAC_CTRL3, 2, 3, 1, 1),
  76. SOC_SINGLE("Volume Ramp Up Switch", WM8523_DAC_CTRL3, 1, 1, 0),
  77. SOC_SINGLE("Volume Ramp Down Switch", WM8523_DAC_CTRL3, 0, 1, 0),
  78. SOC_ENUM("Zero Detect Count", wm8523_zc_count),
  79. };
  80. static const struct snd_soc_dapm_widget wm8523_dapm_widgets[] = {
  81. SND_SOC_DAPM_DAC("DAC", "Playback", SND_SOC_NOPM, 0, 0),
  82. SND_SOC_DAPM_OUTPUT("LINEVOUTL"),
  83. SND_SOC_DAPM_OUTPUT("LINEVOUTR"),
  84. };
  85. static const struct snd_soc_dapm_route wm8523_dapm_routes[] = {
  86. { "LINEVOUTL", NULL, "DAC" },
  87. { "LINEVOUTR", NULL, "DAC" },
  88. };
  89. static struct {
  90. int value;
  91. int ratio;
  92. } lrclk_ratios[WM8523_NUM_RATES] = {
  93. { 1, 128 },
  94. { 2, 192 },
  95. { 3, 256 },
  96. { 4, 384 },
  97. { 5, 512 },
  98. { 6, 768 },
  99. { 7, 1152 },
  100. };
  101. static struct {
  102. int value;
  103. int ratio;
  104. } bclk_ratios[WM8523_NUM_RATES] = {
  105. { 2, 32 },
  106. { 3, 64 },
  107. { 4, 128 },
  108. };
  109. static int wm8523_startup(struct snd_pcm_substream *substream,
  110. struct snd_soc_dai *dai)
  111. {
  112. struct snd_soc_codec *codec = dai->codec;
  113. struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
  114. /* The set of sample rates that can be supported depends on the
  115. * MCLK supplied to the CODEC - enforce this.
  116. */
  117. if (!wm8523->sysclk) {
  118. dev_err(codec->dev,
  119. "No MCLK configured, call set_sysclk() on init\n");
  120. return -EINVAL;
  121. }
  122. snd_pcm_hw_constraint_list(substream->runtime, 0,
  123. SNDRV_PCM_HW_PARAM_RATE,
  124. &wm8523->rate_constraint);
  125. return 0;
  126. }
  127. static int wm8523_hw_params(struct snd_pcm_substream *substream,
  128. struct snd_pcm_hw_params *params,
  129. struct snd_soc_dai *dai)
  130. {
  131. struct snd_soc_codec *codec = dai->codec;
  132. struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
  133. int i;
  134. u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1);
  135. u16 aifctrl2 = snd_soc_read(codec, WM8523_AIF_CTRL2);
  136. /* Find a supported LRCLK ratio */
  137. for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
  138. if (wm8523->sysclk / params_rate(params) ==
  139. lrclk_ratios[i].ratio)
  140. break;
  141. }
  142. /* Should never happen, should be handled by constraints */
  143. if (i == ARRAY_SIZE(lrclk_ratios)) {
  144. dev_err(codec->dev, "MCLK/fs ratio %d unsupported\n",
  145. wm8523->sysclk / params_rate(params));
  146. return -EINVAL;
  147. }
  148. aifctrl2 &= ~WM8523_SR_MASK;
  149. aifctrl2 |= lrclk_ratios[i].value;
  150. if (aifctrl1 & WM8523_AIF_MSTR) {
  151. /* Find a fs->bclk ratio */
  152. for (i = 0; i < ARRAY_SIZE(bclk_ratios); i++)
  153. if (params_width(params) * 2 <= bclk_ratios[i].ratio)
  154. break;
  155. if (i == ARRAY_SIZE(bclk_ratios)) {
  156. dev_err(codec->dev,
  157. "No matching BCLK/fs ratio for word length %d\n",
  158. params_width(params));
  159. return -EINVAL;
  160. }
  161. aifctrl2 &= ~WM8523_BCLKDIV_MASK;
  162. aifctrl2 |= bclk_ratios[i].value << WM8523_BCLKDIV_SHIFT;
  163. }
  164. aifctrl1 &= ~WM8523_WL_MASK;
  165. switch (params_width(params)) {
  166. case 16:
  167. break;
  168. case 20:
  169. aifctrl1 |= 0x8;
  170. break;
  171. case 24:
  172. aifctrl1 |= 0x10;
  173. break;
  174. case 32:
  175. aifctrl1 |= 0x18;
  176. break;
  177. }
  178. snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1);
  179. snd_soc_write(codec, WM8523_AIF_CTRL2, aifctrl2);
  180. return 0;
  181. }
  182. static int wm8523_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  183. int clk_id, unsigned int freq, int dir)
  184. {
  185. struct snd_soc_codec *codec = codec_dai->codec;
  186. struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
  187. unsigned int val;
  188. int i;
  189. wm8523->sysclk = freq;
  190. wm8523->rate_constraint.count = 0;
  191. for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
  192. val = freq / lrclk_ratios[i].ratio;
  193. /* Check that it's a standard rate since core can't
  194. * cope with others and having the odd rates confuses
  195. * constraint matching.
  196. */
  197. switch (val) {
  198. case 8000:
  199. case 11025:
  200. case 16000:
  201. case 22050:
  202. case 32000:
  203. case 44100:
  204. case 48000:
  205. case 64000:
  206. case 88200:
  207. case 96000:
  208. case 176400:
  209. case 192000:
  210. dev_dbg(codec->dev, "Supported sample rate: %dHz\n",
  211. val);
  212. wm8523->rate_constraint_list[i] = val;
  213. wm8523->rate_constraint.count++;
  214. break;
  215. default:
  216. dev_dbg(codec->dev, "Skipping sample rate: %dHz\n",
  217. val);
  218. }
  219. }
  220. /* Need at least one supported rate... */
  221. if (wm8523->rate_constraint.count == 0)
  222. return -EINVAL;
  223. return 0;
  224. }
  225. static int wm8523_set_dai_fmt(struct snd_soc_dai *codec_dai,
  226. unsigned int fmt)
  227. {
  228. struct snd_soc_codec *codec = codec_dai->codec;
  229. u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1);
  230. aifctrl1 &= ~(WM8523_BCLK_INV_MASK | WM8523_LRCLK_INV_MASK |
  231. WM8523_FMT_MASK | WM8523_AIF_MSTR_MASK);
  232. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  233. case SND_SOC_DAIFMT_CBM_CFM:
  234. aifctrl1 |= WM8523_AIF_MSTR;
  235. break;
  236. case SND_SOC_DAIFMT_CBS_CFS:
  237. break;
  238. default:
  239. return -EINVAL;
  240. }
  241. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  242. case SND_SOC_DAIFMT_I2S:
  243. aifctrl1 |= 0x0002;
  244. break;
  245. case SND_SOC_DAIFMT_RIGHT_J:
  246. break;
  247. case SND_SOC_DAIFMT_LEFT_J:
  248. aifctrl1 |= 0x0001;
  249. break;
  250. case SND_SOC_DAIFMT_DSP_A:
  251. aifctrl1 |= 0x0003;
  252. break;
  253. case SND_SOC_DAIFMT_DSP_B:
  254. aifctrl1 |= 0x0023;
  255. break;
  256. default:
  257. return -EINVAL;
  258. }
  259. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  260. case SND_SOC_DAIFMT_NB_NF:
  261. break;
  262. case SND_SOC_DAIFMT_IB_IF:
  263. aifctrl1 |= WM8523_BCLK_INV | WM8523_LRCLK_INV;
  264. break;
  265. case SND_SOC_DAIFMT_IB_NF:
  266. aifctrl1 |= WM8523_BCLK_INV;
  267. break;
  268. case SND_SOC_DAIFMT_NB_IF:
  269. aifctrl1 |= WM8523_LRCLK_INV;
  270. break;
  271. default:
  272. return -EINVAL;
  273. }
  274. snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1);
  275. return 0;
  276. }
  277. static int wm8523_set_bias_level(struct snd_soc_codec *codec,
  278. enum snd_soc_bias_level level)
  279. {
  280. struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
  281. int ret;
  282. switch (level) {
  283. case SND_SOC_BIAS_ON:
  284. break;
  285. case SND_SOC_BIAS_PREPARE:
  286. /* Full power on */
  287. snd_soc_update_bits(codec, WM8523_PSCTRL1,
  288. WM8523_SYS_ENA_MASK, 3);
  289. break;
  290. case SND_SOC_BIAS_STANDBY:
  291. if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
  292. ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
  293. wm8523->supplies);
  294. if (ret != 0) {
  295. dev_err(codec->dev,
  296. "Failed to enable supplies: %d\n",
  297. ret);
  298. return ret;
  299. }
  300. /* Sync back default/cached values */
  301. regcache_sync(wm8523->regmap);
  302. /* Initial power up */
  303. snd_soc_update_bits(codec, WM8523_PSCTRL1,
  304. WM8523_SYS_ENA_MASK, 1);
  305. msleep(100);
  306. }
  307. /* Power up to mute */
  308. snd_soc_update_bits(codec, WM8523_PSCTRL1,
  309. WM8523_SYS_ENA_MASK, 2);
  310. break;
  311. case SND_SOC_BIAS_OFF:
  312. /* The chip runs through the power down sequence for us. */
  313. snd_soc_update_bits(codec, WM8523_PSCTRL1,
  314. WM8523_SYS_ENA_MASK, 0);
  315. msleep(100);
  316. regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies),
  317. wm8523->supplies);
  318. break;
  319. }
  320. return 0;
  321. }
  322. #define WM8523_RATES SNDRV_PCM_RATE_8000_192000
  323. #define WM8523_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
  324. SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
  325. static const struct snd_soc_dai_ops wm8523_dai_ops = {
  326. .startup = wm8523_startup,
  327. .hw_params = wm8523_hw_params,
  328. .set_sysclk = wm8523_set_dai_sysclk,
  329. .set_fmt = wm8523_set_dai_fmt,
  330. };
  331. static struct snd_soc_dai_driver wm8523_dai = {
  332. .name = "wm8523-hifi",
  333. .playback = {
  334. .stream_name = "Playback",
  335. .channels_min = 2, /* Mono modes not yet supported */
  336. .channels_max = 2,
  337. .rates = WM8523_RATES,
  338. .formats = WM8523_FORMATS,
  339. },
  340. .ops = &wm8523_dai_ops,
  341. };
  342. static int wm8523_probe(struct snd_soc_codec *codec)
  343. {
  344. struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
  345. wm8523->rate_constraint.list = &wm8523->rate_constraint_list[0];
  346. wm8523->rate_constraint.count =
  347. ARRAY_SIZE(wm8523->rate_constraint_list);
  348. /* Change some default settings - latch VU and enable ZC */
  349. snd_soc_update_bits(codec, WM8523_DAC_GAINR,
  350. WM8523_DACR_VU, WM8523_DACR_VU);
  351. snd_soc_update_bits(codec, WM8523_DAC_CTRL3, WM8523_ZC, WM8523_ZC);
  352. return 0;
  353. }
  354. static const struct snd_soc_codec_driver soc_codec_dev_wm8523 = {
  355. .probe = wm8523_probe,
  356. .set_bias_level = wm8523_set_bias_level,
  357. .suspend_bias_off = true,
  358. .component_driver = {
  359. .controls = wm8523_controls,
  360. .num_controls = ARRAY_SIZE(wm8523_controls),
  361. .dapm_widgets = wm8523_dapm_widgets,
  362. .num_dapm_widgets = ARRAY_SIZE(wm8523_dapm_widgets),
  363. .dapm_routes = wm8523_dapm_routes,
  364. .num_dapm_routes = ARRAY_SIZE(wm8523_dapm_routes),
  365. },
  366. };
  367. static const struct of_device_id wm8523_of_match[] = {
  368. { .compatible = "wlf,wm8523" },
  369. { },
  370. };
  371. MODULE_DEVICE_TABLE(of, wm8523_of_match);
  372. static const struct regmap_config wm8523_regmap = {
  373. .reg_bits = 8,
  374. .val_bits = 16,
  375. .max_register = WM8523_ZERO_DETECT,
  376. .reg_defaults = wm8523_reg_defaults,
  377. .num_reg_defaults = ARRAY_SIZE(wm8523_reg_defaults),
  378. .cache_type = REGCACHE_RBTREE,
  379. .volatile_reg = wm8523_volatile_register,
  380. };
  381. #if IS_ENABLED(CONFIG_I2C)
  382. static int wm8523_i2c_probe(struct i2c_client *i2c,
  383. const struct i2c_device_id *id)
  384. {
  385. struct wm8523_priv *wm8523;
  386. unsigned int val;
  387. int ret, i;
  388. wm8523 = devm_kzalloc(&i2c->dev, sizeof(struct wm8523_priv),
  389. GFP_KERNEL);
  390. if (wm8523 == NULL)
  391. return -ENOMEM;
  392. wm8523->regmap = devm_regmap_init_i2c(i2c, &wm8523_regmap);
  393. if (IS_ERR(wm8523->regmap)) {
  394. ret = PTR_ERR(wm8523->regmap);
  395. dev_err(&i2c->dev, "Failed to create regmap: %d\n", ret);
  396. return ret;
  397. }
  398. for (i = 0; i < ARRAY_SIZE(wm8523->supplies); i++)
  399. wm8523->supplies[i].supply = wm8523_supply_names[i];
  400. ret = devm_regulator_bulk_get(&i2c->dev, ARRAY_SIZE(wm8523->supplies),
  401. wm8523->supplies);
  402. if (ret != 0) {
  403. dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret);
  404. return ret;
  405. }
  406. ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
  407. wm8523->supplies);
  408. if (ret != 0) {
  409. dev_err(&i2c->dev, "Failed to enable supplies: %d\n", ret);
  410. return ret;
  411. }
  412. ret = regmap_read(wm8523->regmap, WM8523_DEVICE_ID, &val);
  413. if (ret < 0) {
  414. dev_err(&i2c->dev, "Failed to read ID register\n");
  415. goto err_enable;
  416. }
  417. if (val != 0x8523) {
  418. dev_err(&i2c->dev, "Device is not a WM8523, ID is %x\n", ret);
  419. ret = -EINVAL;
  420. goto err_enable;
  421. }
  422. ret = regmap_read(wm8523->regmap, WM8523_REVISION, &val);
  423. if (ret < 0) {
  424. dev_err(&i2c->dev, "Failed to read revision register\n");
  425. goto err_enable;
  426. }
  427. dev_info(&i2c->dev, "revision %c\n",
  428. (val & WM8523_CHIP_REV_MASK) + 'A');
  429. ret = regmap_write(wm8523->regmap, WM8523_DEVICE_ID, 0x8523);
  430. if (ret != 0) {
  431. dev_err(&i2c->dev, "Failed to reset device: %d\n", ret);
  432. goto err_enable;
  433. }
  434. regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
  435. i2c_set_clientdata(i2c, wm8523);
  436. ret = snd_soc_register_codec(&i2c->dev,
  437. &soc_codec_dev_wm8523, &wm8523_dai, 1);
  438. return ret;
  439. err_enable:
  440. regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
  441. return ret;
  442. }
  443. static int wm8523_i2c_remove(struct i2c_client *client)
  444. {
  445. snd_soc_unregister_codec(&client->dev);
  446. return 0;
  447. }
  448. static const struct i2c_device_id wm8523_i2c_id[] = {
  449. { "wm8523", 0 },
  450. { }
  451. };
  452. MODULE_DEVICE_TABLE(i2c, wm8523_i2c_id);
  453. static struct i2c_driver wm8523_i2c_driver = {
  454. .driver = {
  455. .name = "wm8523",
  456. .of_match_table = wm8523_of_match,
  457. },
  458. .probe = wm8523_i2c_probe,
  459. .remove = wm8523_i2c_remove,
  460. .id_table = wm8523_i2c_id,
  461. };
  462. #endif
  463. static int __init wm8523_modinit(void)
  464. {
  465. int ret;
  466. #if IS_ENABLED(CONFIG_I2C)
  467. ret = i2c_add_driver(&wm8523_i2c_driver);
  468. if (ret != 0) {
  469. printk(KERN_ERR "Failed to register WM8523 I2C driver: %d\n",
  470. ret);
  471. }
  472. #endif
  473. return 0;
  474. }
  475. module_init(wm8523_modinit);
  476. static void __exit wm8523_exit(void)
  477. {
  478. #if IS_ENABLED(CONFIG_I2C)
  479. i2c_del_driver(&wm8523_i2c_driver);
  480. #endif
  481. }
  482. module_exit(wm8523_exit);
  483. MODULE_DESCRIPTION("ASoC WM8523 driver");
  484. MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
  485. MODULE_LICENSE("GPL");