twl4030.c 67 KB

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  1. /*
  2. * ALSA SoC TWL4030 codec driver
  3. *
  4. * Author: Steve Sakoman, <steve@sakoman.com>
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * version 2 as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  13. * General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  18. * 02110-1301 USA
  19. *
  20. */
  21. #include <linux/module.h>
  22. #include <linux/moduleparam.h>
  23. #include <linux/init.h>
  24. #include <linux/delay.h>
  25. #include <linux/pm.h>
  26. #include <linux/i2c.h>
  27. #include <linux/platform_device.h>
  28. #include <linux/of.h>
  29. #include <linux/of_gpio.h>
  30. #include <linux/i2c/twl.h>
  31. #include <linux/slab.h>
  32. #include <linux/gpio.h>
  33. #include <sound/core.h>
  34. #include <sound/pcm.h>
  35. #include <sound/pcm_params.h>
  36. #include <sound/soc.h>
  37. #include <sound/initval.h>
  38. #include <sound/tlv.h>
  39. /* Register descriptions are here */
  40. #include <linux/mfd/twl4030-audio.h>
  41. /* TWL4030 PMBR1 Register */
  42. #define TWL4030_PMBR1_REG 0x0D
  43. /* TWL4030 PMBR1 Register GPIO6 mux bits */
  44. #define TWL4030_GPIO6_PWM0_MUTE(value) ((value & 0x03) << 2)
  45. #define TWL4030_CACHEREGNUM (TWL4030_REG_MISC_SET_2 + 1)
  46. /* codec private data */
  47. struct twl4030_priv {
  48. unsigned int codec_powered;
  49. /* reference counts of AIF/APLL users */
  50. unsigned int apll_enabled;
  51. struct snd_pcm_substream *master_substream;
  52. struct snd_pcm_substream *slave_substream;
  53. unsigned int configured;
  54. unsigned int rate;
  55. unsigned int sample_bits;
  56. unsigned int channels;
  57. unsigned int sysclk;
  58. /* Output (with associated amp) states */
  59. u8 hsl_enabled, hsr_enabled;
  60. u8 earpiece_enabled;
  61. u8 predrivel_enabled, predriver_enabled;
  62. u8 carkitl_enabled, carkitr_enabled;
  63. u8 ctl_cache[TWL4030_REG_PRECKR_CTL - TWL4030_REG_EAR_CTL + 1];
  64. struct twl4030_codec_data *pdata;
  65. };
  66. static void tw4030_init_ctl_cache(struct twl4030_priv *twl4030)
  67. {
  68. int i;
  69. u8 byte;
  70. for (i = TWL4030_REG_EAR_CTL; i <= TWL4030_REG_PRECKR_CTL; i++) {
  71. twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte, i);
  72. twl4030->ctl_cache[i - TWL4030_REG_EAR_CTL] = byte;
  73. }
  74. }
  75. static unsigned int twl4030_read(struct snd_soc_codec *codec, unsigned int reg)
  76. {
  77. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  78. u8 value = 0;
  79. if (reg >= TWL4030_CACHEREGNUM)
  80. return -EIO;
  81. switch (reg) {
  82. case TWL4030_REG_EAR_CTL:
  83. case TWL4030_REG_PREDL_CTL:
  84. case TWL4030_REG_PREDR_CTL:
  85. case TWL4030_REG_PRECKL_CTL:
  86. case TWL4030_REG_PRECKR_CTL:
  87. case TWL4030_REG_HS_GAIN_SET:
  88. value = twl4030->ctl_cache[reg - TWL4030_REG_EAR_CTL];
  89. break;
  90. default:
  91. twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &value, reg);
  92. break;
  93. }
  94. return value;
  95. }
  96. static bool twl4030_can_write_to_chip(struct twl4030_priv *twl4030,
  97. unsigned int reg)
  98. {
  99. bool write_to_reg = false;
  100. /* Decide if the given register can be written */
  101. switch (reg) {
  102. case TWL4030_REG_EAR_CTL:
  103. if (twl4030->earpiece_enabled)
  104. write_to_reg = true;
  105. break;
  106. case TWL4030_REG_PREDL_CTL:
  107. if (twl4030->predrivel_enabled)
  108. write_to_reg = true;
  109. break;
  110. case TWL4030_REG_PREDR_CTL:
  111. if (twl4030->predriver_enabled)
  112. write_to_reg = true;
  113. break;
  114. case TWL4030_REG_PRECKL_CTL:
  115. if (twl4030->carkitl_enabled)
  116. write_to_reg = true;
  117. break;
  118. case TWL4030_REG_PRECKR_CTL:
  119. if (twl4030->carkitr_enabled)
  120. write_to_reg = true;
  121. break;
  122. case TWL4030_REG_HS_GAIN_SET:
  123. if (twl4030->hsl_enabled || twl4030->hsr_enabled)
  124. write_to_reg = true;
  125. break;
  126. default:
  127. /* All other register can be written */
  128. write_to_reg = true;
  129. break;
  130. }
  131. return write_to_reg;
  132. }
  133. static int twl4030_write(struct snd_soc_codec *codec, unsigned int reg,
  134. unsigned int value)
  135. {
  136. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  137. /* Update the ctl cache */
  138. switch (reg) {
  139. case TWL4030_REG_EAR_CTL:
  140. case TWL4030_REG_PREDL_CTL:
  141. case TWL4030_REG_PREDR_CTL:
  142. case TWL4030_REG_PRECKL_CTL:
  143. case TWL4030_REG_PRECKR_CTL:
  144. case TWL4030_REG_HS_GAIN_SET:
  145. twl4030->ctl_cache[reg - TWL4030_REG_EAR_CTL] = value;
  146. break;
  147. default:
  148. break;
  149. }
  150. if (twl4030_can_write_to_chip(twl4030, reg))
  151. return twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, value, reg);
  152. return 0;
  153. }
  154. static inline void twl4030_wait_ms(int time)
  155. {
  156. if (time < 60) {
  157. time *= 1000;
  158. usleep_range(time, time + 500);
  159. } else {
  160. msleep(time);
  161. }
  162. }
  163. static void twl4030_codec_enable(struct snd_soc_codec *codec, int enable)
  164. {
  165. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  166. int mode;
  167. if (enable == twl4030->codec_powered)
  168. return;
  169. if (enable)
  170. mode = twl4030_audio_enable_resource(TWL4030_AUDIO_RES_POWER);
  171. else
  172. mode = twl4030_audio_disable_resource(TWL4030_AUDIO_RES_POWER);
  173. if (mode >= 0)
  174. twl4030->codec_powered = enable;
  175. /* REVISIT: this delay is present in TI sample drivers */
  176. /* but there seems to be no TRM requirement for it */
  177. udelay(10);
  178. }
  179. static void twl4030_setup_pdata_of(struct twl4030_codec_data *pdata,
  180. struct device_node *node)
  181. {
  182. int value;
  183. of_property_read_u32(node, "ti,digimic_delay",
  184. &pdata->digimic_delay);
  185. of_property_read_u32(node, "ti,ramp_delay_value",
  186. &pdata->ramp_delay_value);
  187. of_property_read_u32(node, "ti,offset_cncl_path",
  188. &pdata->offset_cncl_path);
  189. if (!of_property_read_u32(node, "ti,hs_extmute", &value))
  190. pdata->hs_extmute = value;
  191. pdata->hs_extmute_gpio = of_get_named_gpio(node,
  192. "ti,hs_extmute_gpio", 0);
  193. if (gpio_is_valid(pdata->hs_extmute_gpio))
  194. pdata->hs_extmute = 1;
  195. }
  196. static struct twl4030_codec_data *twl4030_get_pdata(struct snd_soc_codec *codec)
  197. {
  198. struct twl4030_codec_data *pdata = dev_get_platdata(codec->dev);
  199. struct device_node *twl4030_codec_node = NULL;
  200. twl4030_codec_node = of_get_child_by_name(codec->dev->parent->of_node,
  201. "codec");
  202. if (!pdata && twl4030_codec_node) {
  203. pdata = devm_kzalloc(codec->dev,
  204. sizeof(struct twl4030_codec_data),
  205. GFP_KERNEL);
  206. if (!pdata) {
  207. dev_err(codec->dev, "Can not allocate memory\n");
  208. of_node_put(twl4030_codec_node);
  209. return NULL;
  210. }
  211. twl4030_setup_pdata_of(pdata, twl4030_codec_node);
  212. of_node_put(twl4030_codec_node);
  213. }
  214. return pdata;
  215. }
  216. static void twl4030_init_chip(struct snd_soc_codec *codec)
  217. {
  218. struct twl4030_codec_data *pdata;
  219. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  220. u8 reg, byte;
  221. int i = 0;
  222. pdata = twl4030_get_pdata(codec);
  223. if (pdata && pdata->hs_extmute) {
  224. if (gpio_is_valid(pdata->hs_extmute_gpio)) {
  225. int ret;
  226. if (!pdata->hs_extmute_gpio)
  227. dev_warn(codec->dev,
  228. "Extmute GPIO is 0 is this correct?\n");
  229. ret = gpio_request_one(pdata->hs_extmute_gpio,
  230. GPIOF_OUT_INIT_LOW,
  231. "hs_extmute");
  232. if (ret) {
  233. dev_err(codec->dev,
  234. "Failed to get hs_extmute GPIO\n");
  235. pdata->hs_extmute_gpio = -1;
  236. }
  237. } else {
  238. u8 pin_mux;
  239. /* Set TWL4030 GPIO6 as EXTMUTE signal */
  240. twl_i2c_read_u8(TWL4030_MODULE_INTBR, &pin_mux,
  241. TWL4030_PMBR1_REG);
  242. pin_mux &= ~TWL4030_GPIO6_PWM0_MUTE(0x03);
  243. pin_mux |= TWL4030_GPIO6_PWM0_MUTE(0x02);
  244. twl_i2c_write_u8(TWL4030_MODULE_INTBR, pin_mux,
  245. TWL4030_PMBR1_REG);
  246. }
  247. }
  248. /* Initialize the local ctl register cache */
  249. tw4030_init_ctl_cache(twl4030);
  250. /* anti-pop when changing analog gain */
  251. reg = twl4030_read(codec, TWL4030_REG_MISC_SET_1);
  252. twl4030_write(codec, TWL4030_REG_MISC_SET_1,
  253. reg | TWL4030_SMOOTH_ANAVOL_EN);
  254. twl4030_write(codec, TWL4030_REG_OPTION,
  255. TWL4030_ATXL1_EN | TWL4030_ATXR1_EN |
  256. TWL4030_ARXL2_EN | TWL4030_ARXR2_EN);
  257. /* REG_ARXR2_APGA_CTL reset according to the TRM: 0dB, DA_EN */
  258. twl4030_write(codec, TWL4030_REG_ARXR2_APGA_CTL, 0x32);
  259. /* Machine dependent setup */
  260. if (!pdata)
  261. return;
  262. twl4030->pdata = pdata;
  263. reg = twl4030_read(codec, TWL4030_REG_HS_POPN_SET);
  264. reg &= ~TWL4030_RAMP_DELAY;
  265. reg |= (pdata->ramp_delay_value << 2);
  266. twl4030_write(codec, TWL4030_REG_HS_POPN_SET, reg);
  267. /* initiate offset cancellation */
  268. twl4030_codec_enable(codec, 1);
  269. reg = twl4030_read(codec, TWL4030_REG_ANAMICL);
  270. reg &= ~TWL4030_OFFSET_CNCL_SEL;
  271. reg |= pdata->offset_cncl_path;
  272. twl4030_write(codec, TWL4030_REG_ANAMICL,
  273. reg | TWL4030_CNCL_OFFSET_START);
  274. /*
  275. * Wait for offset cancellation to complete.
  276. * Since this takes a while, do not slam the i2c.
  277. * Start polling the status after ~20ms.
  278. */
  279. msleep(20);
  280. do {
  281. usleep_range(1000, 2000);
  282. twl_set_regcache_bypass(TWL4030_MODULE_AUDIO_VOICE, true);
  283. twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,
  284. TWL4030_REG_ANAMICL);
  285. twl_set_regcache_bypass(TWL4030_MODULE_AUDIO_VOICE, false);
  286. } while ((i++ < 100) &&
  287. ((byte & TWL4030_CNCL_OFFSET_START) ==
  288. TWL4030_CNCL_OFFSET_START));
  289. twl4030_codec_enable(codec, 0);
  290. }
  291. static void twl4030_apll_enable(struct snd_soc_codec *codec, int enable)
  292. {
  293. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  294. if (enable) {
  295. twl4030->apll_enabled++;
  296. if (twl4030->apll_enabled == 1)
  297. twl4030_audio_enable_resource(
  298. TWL4030_AUDIO_RES_APLL);
  299. } else {
  300. twl4030->apll_enabled--;
  301. if (!twl4030->apll_enabled)
  302. twl4030_audio_disable_resource(
  303. TWL4030_AUDIO_RES_APLL);
  304. }
  305. }
  306. /* Earpiece */
  307. static const struct snd_kcontrol_new twl4030_dapm_earpiece_controls[] = {
  308. SOC_DAPM_SINGLE("Voice", TWL4030_REG_EAR_CTL, 0, 1, 0),
  309. SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_EAR_CTL, 1, 1, 0),
  310. SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_EAR_CTL, 2, 1, 0),
  311. SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_EAR_CTL, 3, 1, 0),
  312. };
  313. /* PreDrive Left */
  314. static const struct snd_kcontrol_new twl4030_dapm_predrivel_controls[] = {
  315. SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDL_CTL, 0, 1, 0),
  316. SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PREDL_CTL, 1, 1, 0),
  317. SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDL_CTL, 2, 1, 0),
  318. SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDL_CTL, 3, 1, 0),
  319. };
  320. /* PreDrive Right */
  321. static const struct snd_kcontrol_new twl4030_dapm_predriver_controls[] = {
  322. SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDR_CTL, 0, 1, 0),
  323. SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PREDR_CTL, 1, 1, 0),
  324. SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDR_CTL, 2, 1, 0),
  325. SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDR_CTL, 3, 1, 0),
  326. };
  327. /* Headset Left */
  328. static const struct snd_kcontrol_new twl4030_dapm_hsol_controls[] = {
  329. SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 0, 1, 0),
  330. SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_HS_SEL, 1, 1, 0),
  331. SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_HS_SEL, 2, 1, 0),
  332. };
  333. /* Headset Right */
  334. static const struct snd_kcontrol_new twl4030_dapm_hsor_controls[] = {
  335. SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 3, 1, 0),
  336. SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_HS_SEL, 4, 1, 0),
  337. SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_HS_SEL, 5, 1, 0),
  338. };
  339. /* Carkit Left */
  340. static const struct snd_kcontrol_new twl4030_dapm_carkitl_controls[] = {
  341. SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKL_CTL, 0, 1, 0),
  342. SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PRECKL_CTL, 1, 1, 0),
  343. SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PRECKL_CTL, 2, 1, 0),
  344. };
  345. /* Carkit Right */
  346. static const struct snd_kcontrol_new twl4030_dapm_carkitr_controls[] = {
  347. SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKR_CTL, 0, 1, 0),
  348. SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PRECKR_CTL, 1, 1, 0),
  349. SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PRECKR_CTL, 2, 1, 0),
  350. };
  351. /* Handsfree Left */
  352. static const char *twl4030_handsfreel_texts[] =
  353. {"Voice", "AudioL1", "AudioL2", "AudioR2"};
  354. static SOC_ENUM_SINGLE_DECL(twl4030_handsfreel_enum,
  355. TWL4030_REG_HFL_CTL, 0,
  356. twl4030_handsfreel_texts);
  357. static const struct snd_kcontrol_new twl4030_dapm_handsfreel_control =
  358. SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum);
  359. /* Handsfree Left virtual mute */
  360. static const struct snd_kcontrol_new twl4030_dapm_handsfreelmute_control =
  361. SOC_DAPM_SINGLE_VIRT("Switch", 1);
  362. /* Handsfree Right */
  363. static const char *twl4030_handsfreer_texts[] =
  364. {"Voice", "AudioR1", "AudioR2", "AudioL2"};
  365. static SOC_ENUM_SINGLE_DECL(twl4030_handsfreer_enum,
  366. TWL4030_REG_HFR_CTL, 0,
  367. twl4030_handsfreer_texts);
  368. static const struct snd_kcontrol_new twl4030_dapm_handsfreer_control =
  369. SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum);
  370. /* Handsfree Right virtual mute */
  371. static const struct snd_kcontrol_new twl4030_dapm_handsfreermute_control =
  372. SOC_DAPM_SINGLE_VIRT("Switch", 1);
  373. /* Vibra */
  374. /* Vibra audio path selection */
  375. static const char *twl4030_vibra_texts[] =
  376. {"AudioL1", "AudioR1", "AudioL2", "AudioR2"};
  377. static SOC_ENUM_SINGLE_DECL(twl4030_vibra_enum,
  378. TWL4030_REG_VIBRA_CTL, 2,
  379. twl4030_vibra_texts);
  380. static const struct snd_kcontrol_new twl4030_dapm_vibra_control =
  381. SOC_DAPM_ENUM("Route", twl4030_vibra_enum);
  382. /* Vibra path selection: local vibrator (PWM) or audio driven */
  383. static const char *twl4030_vibrapath_texts[] =
  384. {"Local vibrator", "Audio"};
  385. static SOC_ENUM_SINGLE_DECL(twl4030_vibrapath_enum,
  386. TWL4030_REG_VIBRA_CTL, 4,
  387. twl4030_vibrapath_texts);
  388. static const struct snd_kcontrol_new twl4030_dapm_vibrapath_control =
  389. SOC_DAPM_ENUM("Route", twl4030_vibrapath_enum);
  390. /* Left analog microphone selection */
  391. static const struct snd_kcontrol_new twl4030_dapm_analoglmic_controls[] = {
  392. SOC_DAPM_SINGLE("Main Mic Capture Switch",
  393. TWL4030_REG_ANAMICL, 0, 1, 0),
  394. SOC_DAPM_SINGLE("Headset Mic Capture Switch",
  395. TWL4030_REG_ANAMICL, 1, 1, 0),
  396. SOC_DAPM_SINGLE("AUXL Capture Switch",
  397. TWL4030_REG_ANAMICL, 2, 1, 0),
  398. SOC_DAPM_SINGLE("Carkit Mic Capture Switch",
  399. TWL4030_REG_ANAMICL, 3, 1, 0),
  400. };
  401. /* Right analog microphone selection */
  402. static const struct snd_kcontrol_new twl4030_dapm_analogrmic_controls[] = {
  403. SOC_DAPM_SINGLE("Sub Mic Capture Switch", TWL4030_REG_ANAMICR, 0, 1, 0),
  404. SOC_DAPM_SINGLE("AUXR Capture Switch", TWL4030_REG_ANAMICR, 2, 1, 0),
  405. };
  406. /* TX1 L/R Analog/Digital microphone selection */
  407. static const char *twl4030_micpathtx1_texts[] =
  408. {"Analog", "Digimic0"};
  409. static SOC_ENUM_SINGLE_DECL(twl4030_micpathtx1_enum,
  410. TWL4030_REG_ADCMICSEL, 0,
  411. twl4030_micpathtx1_texts);
  412. static const struct snd_kcontrol_new twl4030_dapm_micpathtx1_control =
  413. SOC_DAPM_ENUM("Route", twl4030_micpathtx1_enum);
  414. /* TX2 L/R Analog/Digital microphone selection */
  415. static const char *twl4030_micpathtx2_texts[] =
  416. {"Analog", "Digimic1"};
  417. static SOC_ENUM_SINGLE_DECL(twl4030_micpathtx2_enum,
  418. TWL4030_REG_ADCMICSEL, 2,
  419. twl4030_micpathtx2_texts);
  420. static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control =
  421. SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum);
  422. /* Analog bypass for AudioR1 */
  423. static const struct snd_kcontrol_new twl4030_dapm_abypassr1_control =
  424. SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR1_APGA_CTL, 2, 1, 0);
  425. /* Analog bypass for AudioL1 */
  426. static const struct snd_kcontrol_new twl4030_dapm_abypassl1_control =
  427. SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL1_APGA_CTL, 2, 1, 0);
  428. /* Analog bypass for AudioR2 */
  429. static const struct snd_kcontrol_new twl4030_dapm_abypassr2_control =
  430. SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR2_APGA_CTL, 2, 1, 0);
  431. /* Analog bypass for AudioL2 */
  432. static const struct snd_kcontrol_new twl4030_dapm_abypassl2_control =
  433. SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL2_APGA_CTL, 2, 1, 0);
  434. /* Analog bypass for Voice */
  435. static const struct snd_kcontrol_new twl4030_dapm_abypassv_control =
  436. SOC_DAPM_SINGLE("Switch", TWL4030_REG_VDL_APGA_CTL, 2, 1, 0);
  437. /* Digital bypass gain, mute instead of -30dB */
  438. static const DECLARE_TLV_DB_RANGE(twl4030_dapm_dbypass_tlv,
  439. 0, 1, TLV_DB_SCALE_ITEM(-3000, 600, 1),
  440. 2, 3, TLV_DB_SCALE_ITEM(-2400, 0, 0),
  441. 4, 7, TLV_DB_SCALE_ITEM(-1800, 600, 0)
  442. );
  443. /* Digital bypass left (TX1L -> RX2L) */
  444. static const struct snd_kcontrol_new twl4030_dapm_dbypassl_control =
  445. SOC_DAPM_SINGLE_TLV("Volume",
  446. TWL4030_REG_ATX2ARXPGA, 3, 7, 0,
  447. twl4030_dapm_dbypass_tlv);
  448. /* Digital bypass right (TX1R -> RX2R) */
  449. static const struct snd_kcontrol_new twl4030_dapm_dbypassr_control =
  450. SOC_DAPM_SINGLE_TLV("Volume",
  451. TWL4030_REG_ATX2ARXPGA, 0, 7, 0,
  452. twl4030_dapm_dbypass_tlv);
  453. /*
  454. * Voice Sidetone GAIN volume control:
  455. * from -51 to -10 dB in 1 dB steps (mute instead of -51 dB)
  456. */
  457. static DECLARE_TLV_DB_SCALE(twl4030_dapm_dbypassv_tlv, -5100, 100, 1);
  458. /* Digital bypass voice: sidetone (VUL -> VDL)*/
  459. static const struct snd_kcontrol_new twl4030_dapm_dbypassv_control =
  460. SOC_DAPM_SINGLE_TLV("Volume",
  461. TWL4030_REG_VSTPGA, 0, 0x29, 0,
  462. twl4030_dapm_dbypassv_tlv);
  463. /*
  464. * Output PGA builder:
  465. * Handle the muting and unmuting of the given output (turning off the
  466. * amplifier associated with the output pin)
  467. * On mute bypass the reg_cache and write 0 to the register
  468. * On unmute: restore the register content from the reg_cache
  469. * Outputs handled in this way: Earpiece, PreDrivL/R, CarkitL/R
  470. */
  471. #define TWL4030_OUTPUT_PGA(pin_name, reg, mask) \
  472. static int pin_name##pga_event(struct snd_soc_dapm_widget *w, \
  473. struct snd_kcontrol *kcontrol, int event) \
  474. { \
  475. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); \
  476. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec); \
  477. \
  478. switch (event) { \
  479. case SND_SOC_DAPM_POST_PMU: \
  480. twl4030->pin_name##_enabled = 1; \
  481. twl4030_write(codec, reg, twl4030_read(codec, reg)); \
  482. break; \
  483. case SND_SOC_DAPM_POST_PMD: \
  484. twl4030->pin_name##_enabled = 0; \
  485. twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, 0, reg); \
  486. break; \
  487. } \
  488. return 0; \
  489. }
  490. TWL4030_OUTPUT_PGA(earpiece, TWL4030_REG_EAR_CTL, TWL4030_EAR_GAIN);
  491. TWL4030_OUTPUT_PGA(predrivel, TWL4030_REG_PREDL_CTL, TWL4030_PREDL_GAIN);
  492. TWL4030_OUTPUT_PGA(predriver, TWL4030_REG_PREDR_CTL, TWL4030_PREDR_GAIN);
  493. TWL4030_OUTPUT_PGA(carkitl, TWL4030_REG_PRECKL_CTL, TWL4030_PRECKL_GAIN);
  494. TWL4030_OUTPUT_PGA(carkitr, TWL4030_REG_PRECKR_CTL, TWL4030_PRECKR_GAIN);
  495. static void handsfree_ramp(struct snd_soc_codec *codec, int reg, int ramp)
  496. {
  497. unsigned char hs_ctl;
  498. hs_ctl = twl4030_read(codec, reg);
  499. if (ramp) {
  500. /* HF ramp-up */
  501. hs_ctl |= TWL4030_HF_CTL_REF_EN;
  502. twl4030_write(codec, reg, hs_ctl);
  503. udelay(10);
  504. hs_ctl |= TWL4030_HF_CTL_RAMP_EN;
  505. twl4030_write(codec, reg, hs_ctl);
  506. udelay(40);
  507. hs_ctl |= TWL4030_HF_CTL_LOOP_EN;
  508. hs_ctl |= TWL4030_HF_CTL_HB_EN;
  509. twl4030_write(codec, reg, hs_ctl);
  510. } else {
  511. /* HF ramp-down */
  512. hs_ctl &= ~TWL4030_HF_CTL_LOOP_EN;
  513. hs_ctl &= ~TWL4030_HF_CTL_HB_EN;
  514. twl4030_write(codec, reg, hs_ctl);
  515. hs_ctl &= ~TWL4030_HF_CTL_RAMP_EN;
  516. twl4030_write(codec, reg, hs_ctl);
  517. udelay(40);
  518. hs_ctl &= ~TWL4030_HF_CTL_REF_EN;
  519. twl4030_write(codec, reg, hs_ctl);
  520. }
  521. }
  522. static int handsfreelpga_event(struct snd_soc_dapm_widget *w,
  523. struct snd_kcontrol *kcontrol, int event)
  524. {
  525. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  526. switch (event) {
  527. case SND_SOC_DAPM_POST_PMU:
  528. handsfree_ramp(codec, TWL4030_REG_HFL_CTL, 1);
  529. break;
  530. case SND_SOC_DAPM_POST_PMD:
  531. handsfree_ramp(codec, TWL4030_REG_HFL_CTL, 0);
  532. break;
  533. }
  534. return 0;
  535. }
  536. static int handsfreerpga_event(struct snd_soc_dapm_widget *w,
  537. struct snd_kcontrol *kcontrol, int event)
  538. {
  539. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  540. switch (event) {
  541. case SND_SOC_DAPM_POST_PMU:
  542. handsfree_ramp(codec, TWL4030_REG_HFR_CTL, 1);
  543. break;
  544. case SND_SOC_DAPM_POST_PMD:
  545. handsfree_ramp(codec, TWL4030_REG_HFR_CTL, 0);
  546. break;
  547. }
  548. return 0;
  549. }
  550. static int vibramux_event(struct snd_soc_dapm_widget *w,
  551. struct snd_kcontrol *kcontrol, int event)
  552. {
  553. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  554. twl4030_write(codec, TWL4030_REG_VIBRA_SET, 0xff);
  555. return 0;
  556. }
  557. static int apll_event(struct snd_soc_dapm_widget *w,
  558. struct snd_kcontrol *kcontrol, int event)
  559. {
  560. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  561. switch (event) {
  562. case SND_SOC_DAPM_PRE_PMU:
  563. twl4030_apll_enable(codec, 1);
  564. break;
  565. case SND_SOC_DAPM_POST_PMD:
  566. twl4030_apll_enable(codec, 0);
  567. break;
  568. }
  569. return 0;
  570. }
  571. static int aif_event(struct snd_soc_dapm_widget *w,
  572. struct snd_kcontrol *kcontrol, int event)
  573. {
  574. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  575. u8 audio_if;
  576. audio_if = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
  577. switch (event) {
  578. case SND_SOC_DAPM_PRE_PMU:
  579. /* Enable AIF */
  580. /* enable the PLL before we use it to clock the DAI */
  581. twl4030_apll_enable(codec, 1);
  582. twl4030_write(codec, TWL4030_REG_AUDIO_IF,
  583. audio_if | TWL4030_AIF_EN);
  584. break;
  585. case SND_SOC_DAPM_POST_PMD:
  586. /* disable the DAI before we stop it's source PLL */
  587. twl4030_write(codec, TWL4030_REG_AUDIO_IF,
  588. audio_if & ~TWL4030_AIF_EN);
  589. twl4030_apll_enable(codec, 0);
  590. break;
  591. }
  592. return 0;
  593. }
  594. static void headset_ramp(struct snd_soc_codec *codec, int ramp)
  595. {
  596. unsigned char hs_gain, hs_pop;
  597. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  598. struct twl4030_codec_data *pdata = twl4030->pdata;
  599. /* Base values for ramp delay calculation: 2^19 - 2^26 */
  600. unsigned int ramp_base[] = {524288, 1048576, 2097152, 4194304,
  601. 8388608, 16777216, 33554432, 67108864};
  602. unsigned int delay;
  603. hs_gain = twl4030_read(codec, TWL4030_REG_HS_GAIN_SET);
  604. hs_pop = twl4030_read(codec, TWL4030_REG_HS_POPN_SET);
  605. delay = (ramp_base[(hs_pop & TWL4030_RAMP_DELAY) >> 2] /
  606. twl4030->sysclk) + 1;
  607. /* Enable external mute control, this dramatically reduces
  608. * the pop-noise */
  609. if (pdata && pdata->hs_extmute) {
  610. if (gpio_is_valid(pdata->hs_extmute_gpio)) {
  611. gpio_set_value(pdata->hs_extmute_gpio, 1);
  612. } else {
  613. hs_pop |= TWL4030_EXTMUTE;
  614. twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
  615. }
  616. }
  617. if (ramp) {
  618. /* Headset ramp-up according to the TRM */
  619. hs_pop |= TWL4030_VMID_EN;
  620. twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
  621. /* Actually write to the register */
  622. twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, hs_gain,
  623. TWL4030_REG_HS_GAIN_SET);
  624. hs_pop |= TWL4030_RAMP_EN;
  625. twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
  626. /* Wait ramp delay time + 1, so the VMID can settle */
  627. twl4030_wait_ms(delay);
  628. } else {
  629. /* Headset ramp-down _not_ according to
  630. * the TRM, but in a way that it is working */
  631. hs_pop &= ~TWL4030_RAMP_EN;
  632. twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
  633. /* Wait ramp delay time + 1, so the VMID can settle */
  634. twl4030_wait_ms(delay);
  635. /* Bypass the reg_cache to mute the headset */
  636. twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, hs_gain & (~0x0f),
  637. TWL4030_REG_HS_GAIN_SET);
  638. hs_pop &= ~TWL4030_VMID_EN;
  639. twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
  640. }
  641. /* Disable external mute */
  642. if (pdata && pdata->hs_extmute) {
  643. if (gpio_is_valid(pdata->hs_extmute_gpio)) {
  644. gpio_set_value(pdata->hs_extmute_gpio, 0);
  645. } else {
  646. hs_pop &= ~TWL4030_EXTMUTE;
  647. twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
  648. }
  649. }
  650. }
  651. static int headsetlpga_event(struct snd_soc_dapm_widget *w,
  652. struct snd_kcontrol *kcontrol, int event)
  653. {
  654. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  655. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  656. switch (event) {
  657. case SND_SOC_DAPM_POST_PMU:
  658. /* Do the ramp-up only once */
  659. if (!twl4030->hsr_enabled)
  660. headset_ramp(codec, 1);
  661. twl4030->hsl_enabled = 1;
  662. break;
  663. case SND_SOC_DAPM_POST_PMD:
  664. /* Do the ramp-down only if both headsetL/R is disabled */
  665. if (!twl4030->hsr_enabled)
  666. headset_ramp(codec, 0);
  667. twl4030->hsl_enabled = 0;
  668. break;
  669. }
  670. return 0;
  671. }
  672. static int headsetrpga_event(struct snd_soc_dapm_widget *w,
  673. struct snd_kcontrol *kcontrol, int event)
  674. {
  675. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  676. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  677. switch (event) {
  678. case SND_SOC_DAPM_POST_PMU:
  679. /* Do the ramp-up only once */
  680. if (!twl4030->hsl_enabled)
  681. headset_ramp(codec, 1);
  682. twl4030->hsr_enabled = 1;
  683. break;
  684. case SND_SOC_DAPM_POST_PMD:
  685. /* Do the ramp-down only if both headsetL/R is disabled */
  686. if (!twl4030->hsl_enabled)
  687. headset_ramp(codec, 0);
  688. twl4030->hsr_enabled = 0;
  689. break;
  690. }
  691. return 0;
  692. }
  693. static int digimic_event(struct snd_soc_dapm_widget *w,
  694. struct snd_kcontrol *kcontrol, int event)
  695. {
  696. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  697. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  698. struct twl4030_codec_data *pdata = twl4030->pdata;
  699. if (pdata && pdata->digimic_delay)
  700. twl4030_wait_ms(pdata->digimic_delay);
  701. return 0;
  702. }
  703. /*
  704. * Some of the gain controls in TWL (mostly those which are associated with
  705. * the outputs) are implemented in an interesting way:
  706. * 0x0 : Power down (mute)
  707. * 0x1 : 6dB
  708. * 0x2 : 0 dB
  709. * 0x3 : -6 dB
  710. * Inverting not going to help with these.
  711. * Custom volsw and volsw_2r get/put functions to handle these gain bits.
  712. */
  713. static int snd_soc_get_volsw_twl4030(struct snd_kcontrol *kcontrol,
  714. struct snd_ctl_elem_value *ucontrol)
  715. {
  716. struct soc_mixer_control *mc =
  717. (struct soc_mixer_control *)kcontrol->private_value;
  718. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  719. unsigned int reg = mc->reg;
  720. unsigned int shift = mc->shift;
  721. unsigned int rshift = mc->rshift;
  722. int max = mc->max;
  723. int mask = (1 << fls(max)) - 1;
  724. ucontrol->value.integer.value[0] =
  725. (snd_soc_read(codec, reg) >> shift) & mask;
  726. if (ucontrol->value.integer.value[0])
  727. ucontrol->value.integer.value[0] =
  728. max + 1 - ucontrol->value.integer.value[0];
  729. if (shift != rshift) {
  730. ucontrol->value.integer.value[1] =
  731. (snd_soc_read(codec, reg) >> rshift) & mask;
  732. if (ucontrol->value.integer.value[1])
  733. ucontrol->value.integer.value[1] =
  734. max + 1 - ucontrol->value.integer.value[1];
  735. }
  736. return 0;
  737. }
  738. static int snd_soc_put_volsw_twl4030(struct snd_kcontrol *kcontrol,
  739. struct snd_ctl_elem_value *ucontrol)
  740. {
  741. struct soc_mixer_control *mc =
  742. (struct soc_mixer_control *)kcontrol->private_value;
  743. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  744. unsigned int reg = mc->reg;
  745. unsigned int shift = mc->shift;
  746. unsigned int rshift = mc->rshift;
  747. int max = mc->max;
  748. int mask = (1 << fls(max)) - 1;
  749. unsigned short val, val2, val_mask;
  750. val = (ucontrol->value.integer.value[0] & mask);
  751. val_mask = mask << shift;
  752. if (val)
  753. val = max + 1 - val;
  754. val = val << shift;
  755. if (shift != rshift) {
  756. val2 = (ucontrol->value.integer.value[1] & mask);
  757. val_mask |= mask << rshift;
  758. if (val2)
  759. val2 = max + 1 - val2;
  760. val |= val2 << rshift;
  761. }
  762. return snd_soc_update_bits(codec, reg, val_mask, val);
  763. }
  764. static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
  765. struct snd_ctl_elem_value *ucontrol)
  766. {
  767. struct soc_mixer_control *mc =
  768. (struct soc_mixer_control *)kcontrol->private_value;
  769. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  770. unsigned int reg = mc->reg;
  771. unsigned int reg2 = mc->rreg;
  772. unsigned int shift = mc->shift;
  773. int max = mc->max;
  774. int mask = (1<<fls(max))-1;
  775. ucontrol->value.integer.value[0] =
  776. (snd_soc_read(codec, reg) >> shift) & mask;
  777. ucontrol->value.integer.value[1] =
  778. (snd_soc_read(codec, reg2) >> shift) & mask;
  779. if (ucontrol->value.integer.value[0])
  780. ucontrol->value.integer.value[0] =
  781. max + 1 - ucontrol->value.integer.value[0];
  782. if (ucontrol->value.integer.value[1])
  783. ucontrol->value.integer.value[1] =
  784. max + 1 - ucontrol->value.integer.value[1];
  785. return 0;
  786. }
  787. static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
  788. struct snd_ctl_elem_value *ucontrol)
  789. {
  790. struct soc_mixer_control *mc =
  791. (struct soc_mixer_control *)kcontrol->private_value;
  792. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  793. unsigned int reg = mc->reg;
  794. unsigned int reg2 = mc->rreg;
  795. unsigned int shift = mc->shift;
  796. int max = mc->max;
  797. int mask = (1 << fls(max)) - 1;
  798. int err;
  799. unsigned short val, val2, val_mask;
  800. val_mask = mask << shift;
  801. val = (ucontrol->value.integer.value[0] & mask);
  802. val2 = (ucontrol->value.integer.value[1] & mask);
  803. if (val)
  804. val = max + 1 - val;
  805. if (val2)
  806. val2 = max + 1 - val2;
  807. val = val << shift;
  808. val2 = val2 << shift;
  809. err = snd_soc_update_bits(codec, reg, val_mask, val);
  810. if (err < 0)
  811. return err;
  812. err = snd_soc_update_bits(codec, reg2, val_mask, val2);
  813. return err;
  814. }
  815. /* Codec operation modes */
  816. static const char *twl4030_op_modes_texts[] = {
  817. "Option 2 (voice/audio)", "Option 1 (audio)"
  818. };
  819. static SOC_ENUM_SINGLE_DECL(twl4030_op_modes_enum,
  820. TWL4030_REG_CODEC_MODE, 0,
  821. twl4030_op_modes_texts);
  822. static int snd_soc_put_twl4030_opmode_enum_double(struct snd_kcontrol *kcontrol,
  823. struct snd_ctl_elem_value *ucontrol)
  824. {
  825. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  826. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  827. if (twl4030->configured) {
  828. dev_err(codec->dev,
  829. "operation mode cannot be changed on-the-fly\n");
  830. return -EBUSY;
  831. }
  832. return snd_soc_put_enum_double(kcontrol, ucontrol);
  833. }
  834. /*
  835. * FGAIN volume control:
  836. * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB)
  837. */
  838. static DECLARE_TLV_DB_SCALE(digital_fine_tlv, -6300, 100, 1);
  839. /*
  840. * CGAIN volume control:
  841. * 0 dB to 12 dB in 6 dB steps
  842. * value 2 and 3 means 12 dB
  843. */
  844. static DECLARE_TLV_DB_SCALE(digital_coarse_tlv, 0, 600, 0);
  845. /*
  846. * Voice Downlink GAIN volume control:
  847. * from -37 to 12 dB in 1 dB steps (mute instead of -37 dB)
  848. */
  849. static DECLARE_TLV_DB_SCALE(digital_voice_downlink_tlv, -3700, 100, 1);
  850. /*
  851. * Analog playback gain
  852. * -24 dB to 12 dB in 2 dB steps
  853. */
  854. static DECLARE_TLV_DB_SCALE(analog_tlv, -2400, 200, 0);
  855. /*
  856. * Gain controls tied to outputs
  857. * -6 dB to 6 dB in 6 dB steps (mute instead of -12)
  858. */
  859. static DECLARE_TLV_DB_SCALE(output_tvl, -1200, 600, 1);
  860. /*
  861. * Gain control for earpiece amplifier
  862. * 0 dB to 12 dB in 6 dB steps (mute instead of -6)
  863. */
  864. static DECLARE_TLV_DB_SCALE(output_ear_tvl, -600, 600, 1);
  865. /*
  866. * Capture gain after the ADCs
  867. * from 0 dB to 31 dB in 1 dB steps
  868. */
  869. static DECLARE_TLV_DB_SCALE(digital_capture_tlv, 0, 100, 0);
  870. /*
  871. * Gain control for input amplifiers
  872. * 0 dB to 30 dB in 6 dB steps
  873. */
  874. static DECLARE_TLV_DB_SCALE(input_gain_tlv, 0, 600, 0);
  875. /* AVADC clock priority */
  876. static const char *twl4030_avadc_clk_priority_texts[] = {
  877. "Voice high priority", "HiFi high priority"
  878. };
  879. static SOC_ENUM_SINGLE_DECL(twl4030_avadc_clk_priority_enum,
  880. TWL4030_REG_AVADC_CTL, 2,
  881. twl4030_avadc_clk_priority_texts);
  882. static const char *twl4030_rampdelay_texts[] = {
  883. "27/20/14 ms", "55/40/27 ms", "109/81/55 ms", "218/161/109 ms",
  884. "437/323/218 ms", "874/645/437 ms", "1748/1291/874 ms",
  885. "3495/2581/1748 ms"
  886. };
  887. static SOC_ENUM_SINGLE_DECL(twl4030_rampdelay_enum,
  888. TWL4030_REG_HS_POPN_SET, 2,
  889. twl4030_rampdelay_texts);
  890. /* Vibra H-bridge direction mode */
  891. static const char *twl4030_vibradirmode_texts[] = {
  892. "Vibra H-bridge direction", "Audio data MSB",
  893. };
  894. static SOC_ENUM_SINGLE_DECL(twl4030_vibradirmode_enum,
  895. TWL4030_REG_VIBRA_CTL, 5,
  896. twl4030_vibradirmode_texts);
  897. /* Vibra H-bridge direction */
  898. static const char *twl4030_vibradir_texts[] = {
  899. "Positive polarity", "Negative polarity",
  900. };
  901. static SOC_ENUM_SINGLE_DECL(twl4030_vibradir_enum,
  902. TWL4030_REG_VIBRA_CTL, 1,
  903. twl4030_vibradir_texts);
  904. /* Digimic Left and right swapping */
  905. static const char *twl4030_digimicswap_texts[] = {
  906. "Not swapped", "Swapped",
  907. };
  908. static SOC_ENUM_SINGLE_DECL(twl4030_digimicswap_enum,
  909. TWL4030_REG_MISC_SET_1, 0,
  910. twl4030_digimicswap_texts);
  911. static const struct snd_kcontrol_new twl4030_snd_controls[] = {
  912. /* Codec operation mode control */
  913. SOC_ENUM_EXT("Codec Operation Mode", twl4030_op_modes_enum,
  914. snd_soc_get_enum_double,
  915. snd_soc_put_twl4030_opmode_enum_double),
  916. /* Common playback gain controls */
  917. SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume",
  918. TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
  919. 0, 0x3f, 0, digital_fine_tlv),
  920. SOC_DOUBLE_R_TLV("DAC2 Digital Fine Playback Volume",
  921. TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
  922. 0, 0x3f, 0, digital_fine_tlv),
  923. SOC_DOUBLE_R_TLV("DAC1 Digital Coarse Playback Volume",
  924. TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
  925. 6, 0x2, 0, digital_coarse_tlv),
  926. SOC_DOUBLE_R_TLV("DAC2 Digital Coarse Playback Volume",
  927. TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
  928. 6, 0x2, 0, digital_coarse_tlv),
  929. SOC_DOUBLE_R_TLV("DAC1 Analog Playback Volume",
  930. TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
  931. 3, 0x12, 1, analog_tlv),
  932. SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume",
  933. TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
  934. 3, 0x12, 1, analog_tlv),
  935. SOC_DOUBLE_R("DAC1 Analog Playback Switch",
  936. TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
  937. 1, 1, 0),
  938. SOC_DOUBLE_R("DAC2 Analog Playback Switch",
  939. TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
  940. 1, 1, 0),
  941. /* Common voice downlink gain controls */
  942. SOC_SINGLE_TLV("DAC Voice Digital Downlink Volume",
  943. TWL4030_REG_VRXPGA, 0, 0x31, 0, digital_voice_downlink_tlv),
  944. SOC_SINGLE_TLV("DAC Voice Analog Downlink Volume",
  945. TWL4030_REG_VDL_APGA_CTL, 3, 0x12, 1, analog_tlv),
  946. SOC_SINGLE("DAC Voice Analog Downlink Switch",
  947. TWL4030_REG_VDL_APGA_CTL, 1, 1, 0),
  948. /* Separate output gain controls */
  949. SOC_DOUBLE_R_EXT_TLV("PreDriv Playback Volume",
  950. TWL4030_REG_PREDL_CTL, TWL4030_REG_PREDR_CTL,
  951. 4, 3, 0, snd_soc_get_volsw_r2_twl4030,
  952. snd_soc_put_volsw_r2_twl4030, output_tvl),
  953. SOC_DOUBLE_EXT_TLV("Headset Playback Volume",
  954. TWL4030_REG_HS_GAIN_SET, 0, 2, 3, 0, snd_soc_get_volsw_twl4030,
  955. snd_soc_put_volsw_twl4030, output_tvl),
  956. SOC_DOUBLE_R_EXT_TLV("Carkit Playback Volume",
  957. TWL4030_REG_PRECKL_CTL, TWL4030_REG_PRECKR_CTL,
  958. 4, 3, 0, snd_soc_get_volsw_r2_twl4030,
  959. snd_soc_put_volsw_r2_twl4030, output_tvl),
  960. SOC_SINGLE_EXT_TLV("Earpiece Playback Volume",
  961. TWL4030_REG_EAR_CTL, 4, 3, 0, snd_soc_get_volsw_twl4030,
  962. snd_soc_put_volsw_twl4030, output_ear_tvl),
  963. /* Common capture gain controls */
  964. SOC_DOUBLE_R_TLV("TX1 Digital Capture Volume",
  965. TWL4030_REG_ATXL1PGA, TWL4030_REG_ATXR1PGA,
  966. 0, 0x1f, 0, digital_capture_tlv),
  967. SOC_DOUBLE_R_TLV("TX2 Digital Capture Volume",
  968. TWL4030_REG_AVTXL2PGA, TWL4030_REG_AVTXR2PGA,
  969. 0, 0x1f, 0, digital_capture_tlv),
  970. SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN,
  971. 0, 3, 5, 0, input_gain_tlv),
  972. SOC_ENUM("AVADC Clock Priority", twl4030_avadc_clk_priority_enum),
  973. SOC_ENUM("HS ramp delay", twl4030_rampdelay_enum),
  974. SOC_ENUM("Vibra H-bridge mode", twl4030_vibradirmode_enum),
  975. SOC_ENUM("Vibra H-bridge direction", twl4030_vibradir_enum),
  976. SOC_ENUM("Digimic LR Swap", twl4030_digimicswap_enum),
  977. };
  978. static const struct snd_soc_dapm_widget twl4030_dapm_widgets[] = {
  979. /* Left channel inputs */
  980. SND_SOC_DAPM_INPUT("MAINMIC"),
  981. SND_SOC_DAPM_INPUT("HSMIC"),
  982. SND_SOC_DAPM_INPUT("AUXL"),
  983. SND_SOC_DAPM_INPUT("CARKITMIC"),
  984. /* Right channel inputs */
  985. SND_SOC_DAPM_INPUT("SUBMIC"),
  986. SND_SOC_DAPM_INPUT("AUXR"),
  987. /* Digital microphones (Stereo) */
  988. SND_SOC_DAPM_INPUT("DIGIMIC0"),
  989. SND_SOC_DAPM_INPUT("DIGIMIC1"),
  990. /* Outputs */
  991. SND_SOC_DAPM_OUTPUT("EARPIECE"),
  992. SND_SOC_DAPM_OUTPUT("PREDRIVEL"),
  993. SND_SOC_DAPM_OUTPUT("PREDRIVER"),
  994. SND_SOC_DAPM_OUTPUT("HSOL"),
  995. SND_SOC_DAPM_OUTPUT("HSOR"),
  996. SND_SOC_DAPM_OUTPUT("CARKITL"),
  997. SND_SOC_DAPM_OUTPUT("CARKITR"),
  998. SND_SOC_DAPM_OUTPUT("HFL"),
  999. SND_SOC_DAPM_OUTPUT("HFR"),
  1000. SND_SOC_DAPM_OUTPUT("VIBRA"),
  1001. /* AIF and APLL clocks for running DAIs (including loopback) */
  1002. SND_SOC_DAPM_OUTPUT("Virtual HiFi OUT"),
  1003. SND_SOC_DAPM_INPUT("Virtual HiFi IN"),
  1004. SND_SOC_DAPM_OUTPUT("Virtual Voice OUT"),
  1005. /* DACs */
  1006. SND_SOC_DAPM_DAC("DAC Right1", NULL, SND_SOC_NOPM, 0, 0),
  1007. SND_SOC_DAPM_DAC("DAC Left1", NULL, SND_SOC_NOPM, 0, 0),
  1008. SND_SOC_DAPM_DAC("DAC Right2", NULL, SND_SOC_NOPM, 0, 0),
  1009. SND_SOC_DAPM_DAC("DAC Left2", NULL, SND_SOC_NOPM, 0, 0),
  1010. SND_SOC_DAPM_DAC("DAC Voice", NULL, SND_SOC_NOPM, 0, 0),
  1011. SND_SOC_DAPM_AIF_IN("VAIFIN", "Voice Playback", 0,
  1012. TWL4030_REG_VOICE_IF, 6, 0),
  1013. /* Analog bypasses */
  1014. SND_SOC_DAPM_SWITCH("Right1 Analog Loopback", SND_SOC_NOPM, 0, 0,
  1015. &twl4030_dapm_abypassr1_control),
  1016. SND_SOC_DAPM_SWITCH("Left1 Analog Loopback", SND_SOC_NOPM, 0, 0,
  1017. &twl4030_dapm_abypassl1_control),
  1018. SND_SOC_DAPM_SWITCH("Right2 Analog Loopback", SND_SOC_NOPM, 0, 0,
  1019. &twl4030_dapm_abypassr2_control),
  1020. SND_SOC_DAPM_SWITCH("Left2 Analog Loopback", SND_SOC_NOPM, 0, 0,
  1021. &twl4030_dapm_abypassl2_control),
  1022. SND_SOC_DAPM_SWITCH("Voice Analog Loopback", SND_SOC_NOPM, 0, 0,
  1023. &twl4030_dapm_abypassv_control),
  1024. /* Master analog loopback switch */
  1025. SND_SOC_DAPM_SUPPLY("FM Loop Enable", TWL4030_REG_MISC_SET_1, 5, 0,
  1026. NULL, 0),
  1027. /* Digital bypasses */
  1028. SND_SOC_DAPM_SWITCH("Left Digital Loopback", SND_SOC_NOPM, 0, 0,
  1029. &twl4030_dapm_dbypassl_control),
  1030. SND_SOC_DAPM_SWITCH("Right Digital Loopback", SND_SOC_NOPM, 0, 0,
  1031. &twl4030_dapm_dbypassr_control),
  1032. SND_SOC_DAPM_SWITCH("Voice Digital Loopback", SND_SOC_NOPM, 0, 0,
  1033. &twl4030_dapm_dbypassv_control),
  1034. /* Digital mixers, power control for the physical DACs */
  1035. SND_SOC_DAPM_MIXER("Digital R1 Playback Mixer",
  1036. TWL4030_REG_AVDAC_CTL, 0, 0, NULL, 0),
  1037. SND_SOC_DAPM_MIXER("Digital L1 Playback Mixer",
  1038. TWL4030_REG_AVDAC_CTL, 1, 0, NULL, 0),
  1039. SND_SOC_DAPM_MIXER("Digital R2 Playback Mixer",
  1040. TWL4030_REG_AVDAC_CTL, 2, 0, NULL, 0),
  1041. SND_SOC_DAPM_MIXER("Digital L2 Playback Mixer",
  1042. TWL4030_REG_AVDAC_CTL, 3, 0, NULL, 0),
  1043. SND_SOC_DAPM_MIXER("Digital Voice Playback Mixer",
  1044. TWL4030_REG_AVDAC_CTL, 4, 0, NULL, 0),
  1045. /* Analog mixers, power control for the physical PGAs */
  1046. SND_SOC_DAPM_MIXER("Analog R1 Playback Mixer",
  1047. TWL4030_REG_ARXR1_APGA_CTL, 0, 0, NULL, 0),
  1048. SND_SOC_DAPM_MIXER("Analog L1 Playback Mixer",
  1049. TWL4030_REG_ARXL1_APGA_CTL, 0, 0, NULL, 0),
  1050. SND_SOC_DAPM_MIXER("Analog R2 Playback Mixer",
  1051. TWL4030_REG_ARXR2_APGA_CTL, 0, 0, NULL, 0),
  1052. SND_SOC_DAPM_MIXER("Analog L2 Playback Mixer",
  1053. TWL4030_REG_ARXL2_APGA_CTL, 0, 0, NULL, 0),
  1054. SND_SOC_DAPM_MIXER("Analog Voice Playback Mixer",
  1055. TWL4030_REG_VDL_APGA_CTL, 0, 0, NULL, 0),
  1056. SND_SOC_DAPM_SUPPLY("APLL Enable", SND_SOC_NOPM, 0, 0, apll_event,
  1057. SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
  1058. SND_SOC_DAPM_SUPPLY("AIF Enable", SND_SOC_NOPM, 0, 0, aif_event,
  1059. SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
  1060. /* Output MIXER controls */
  1061. /* Earpiece */
  1062. SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
  1063. &twl4030_dapm_earpiece_controls[0],
  1064. ARRAY_SIZE(twl4030_dapm_earpiece_controls)),
  1065. SND_SOC_DAPM_PGA_E("Earpiece PGA", SND_SOC_NOPM,
  1066. 0, 0, NULL, 0, earpiecepga_event,
  1067. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1068. /* PreDrivL/R */
  1069. SND_SOC_DAPM_MIXER("PredriveL Mixer", SND_SOC_NOPM, 0, 0,
  1070. &twl4030_dapm_predrivel_controls[0],
  1071. ARRAY_SIZE(twl4030_dapm_predrivel_controls)),
  1072. SND_SOC_DAPM_PGA_E("PredriveL PGA", SND_SOC_NOPM,
  1073. 0, 0, NULL, 0, predrivelpga_event,
  1074. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1075. SND_SOC_DAPM_MIXER("PredriveR Mixer", SND_SOC_NOPM, 0, 0,
  1076. &twl4030_dapm_predriver_controls[0],
  1077. ARRAY_SIZE(twl4030_dapm_predriver_controls)),
  1078. SND_SOC_DAPM_PGA_E("PredriveR PGA", SND_SOC_NOPM,
  1079. 0, 0, NULL, 0, predriverpga_event,
  1080. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1081. /* HeadsetL/R */
  1082. SND_SOC_DAPM_MIXER("HeadsetL Mixer", SND_SOC_NOPM, 0, 0,
  1083. &twl4030_dapm_hsol_controls[0],
  1084. ARRAY_SIZE(twl4030_dapm_hsol_controls)),
  1085. SND_SOC_DAPM_PGA_E("HeadsetL PGA", SND_SOC_NOPM,
  1086. 0, 0, NULL, 0, headsetlpga_event,
  1087. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1088. SND_SOC_DAPM_MIXER("HeadsetR Mixer", SND_SOC_NOPM, 0, 0,
  1089. &twl4030_dapm_hsor_controls[0],
  1090. ARRAY_SIZE(twl4030_dapm_hsor_controls)),
  1091. SND_SOC_DAPM_PGA_E("HeadsetR PGA", SND_SOC_NOPM,
  1092. 0, 0, NULL, 0, headsetrpga_event,
  1093. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1094. /* CarkitL/R */
  1095. SND_SOC_DAPM_MIXER("CarkitL Mixer", SND_SOC_NOPM, 0, 0,
  1096. &twl4030_dapm_carkitl_controls[0],
  1097. ARRAY_SIZE(twl4030_dapm_carkitl_controls)),
  1098. SND_SOC_DAPM_PGA_E("CarkitL PGA", SND_SOC_NOPM,
  1099. 0, 0, NULL, 0, carkitlpga_event,
  1100. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1101. SND_SOC_DAPM_MIXER("CarkitR Mixer", SND_SOC_NOPM, 0, 0,
  1102. &twl4030_dapm_carkitr_controls[0],
  1103. ARRAY_SIZE(twl4030_dapm_carkitr_controls)),
  1104. SND_SOC_DAPM_PGA_E("CarkitR PGA", SND_SOC_NOPM,
  1105. 0, 0, NULL, 0, carkitrpga_event,
  1106. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1107. /* Output MUX controls */
  1108. /* HandsfreeL/R */
  1109. SND_SOC_DAPM_MUX("HandsfreeL Mux", SND_SOC_NOPM, 0, 0,
  1110. &twl4030_dapm_handsfreel_control),
  1111. SND_SOC_DAPM_SWITCH("HandsfreeL", SND_SOC_NOPM, 0, 0,
  1112. &twl4030_dapm_handsfreelmute_control),
  1113. SND_SOC_DAPM_PGA_E("HandsfreeL PGA", SND_SOC_NOPM,
  1114. 0, 0, NULL, 0, handsfreelpga_event,
  1115. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1116. SND_SOC_DAPM_MUX("HandsfreeR Mux", SND_SOC_NOPM, 5, 0,
  1117. &twl4030_dapm_handsfreer_control),
  1118. SND_SOC_DAPM_SWITCH("HandsfreeR", SND_SOC_NOPM, 0, 0,
  1119. &twl4030_dapm_handsfreermute_control),
  1120. SND_SOC_DAPM_PGA_E("HandsfreeR PGA", SND_SOC_NOPM,
  1121. 0, 0, NULL, 0, handsfreerpga_event,
  1122. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1123. /* Vibra */
  1124. SND_SOC_DAPM_MUX_E("Vibra Mux", TWL4030_REG_VIBRA_CTL, 0, 0,
  1125. &twl4030_dapm_vibra_control, vibramux_event,
  1126. SND_SOC_DAPM_PRE_PMU),
  1127. SND_SOC_DAPM_MUX("Vibra Route", SND_SOC_NOPM, 0, 0,
  1128. &twl4030_dapm_vibrapath_control),
  1129. /* Introducing four virtual ADC, since TWL4030 have four channel for
  1130. capture */
  1131. SND_SOC_DAPM_ADC("ADC Virtual Left1", NULL, SND_SOC_NOPM, 0, 0),
  1132. SND_SOC_DAPM_ADC("ADC Virtual Right1", NULL, SND_SOC_NOPM, 0, 0),
  1133. SND_SOC_DAPM_ADC("ADC Virtual Left2", NULL, SND_SOC_NOPM, 0, 0),
  1134. SND_SOC_DAPM_ADC("ADC Virtual Right2", NULL, SND_SOC_NOPM, 0, 0),
  1135. SND_SOC_DAPM_AIF_OUT("VAIFOUT", "Voice Capture", 0,
  1136. TWL4030_REG_VOICE_IF, 5, 0),
  1137. /* Analog/Digital mic path selection.
  1138. TX1 Left/Right: either analog Left/Right or Digimic0
  1139. TX2 Left/Right: either analog Left/Right or Digimic1 */
  1140. SND_SOC_DAPM_MUX("TX1 Capture Route", SND_SOC_NOPM, 0, 0,
  1141. &twl4030_dapm_micpathtx1_control),
  1142. SND_SOC_DAPM_MUX("TX2 Capture Route", SND_SOC_NOPM, 0, 0,
  1143. &twl4030_dapm_micpathtx2_control),
  1144. /* Analog input mixers for the capture amplifiers */
  1145. SND_SOC_DAPM_MIXER("Analog Left",
  1146. TWL4030_REG_ANAMICL, 4, 0,
  1147. &twl4030_dapm_analoglmic_controls[0],
  1148. ARRAY_SIZE(twl4030_dapm_analoglmic_controls)),
  1149. SND_SOC_DAPM_MIXER("Analog Right",
  1150. TWL4030_REG_ANAMICR, 4, 0,
  1151. &twl4030_dapm_analogrmic_controls[0],
  1152. ARRAY_SIZE(twl4030_dapm_analogrmic_controls)),
  1153. SND_SOC_DAPM_PGA("ADC Physical Left",
  1154. TWL4030_REG_AVADC_CTL, 3, 0, NULL, 0),
  1155. SND_SOC_DAPM_PGA("ADC Physical Right",
  1156. TWL4030_REG_AVADC_CTL, 1, 0, NULL, 0),
  1157. SND_SOC_DAPM_PGA_E("Digimic0 Enable",
  1158. TWL4030_REG_ADCMICSEL, 1, 0, NULL, 0,
  1159. digimic_event, SND_SOC_DAPM_POST_PMU),
  1160. SND_SOC_DAPM_PGA_E("Digimic1 Enable",
  1161. TWL4030_REG_ADCMICSEL, 3, 0, NULL, 0,
  1162. digimic_event, SND_SOC_DAPM_POST_PMU),
  1163. SND_SOC_DAPM_SUPPLY("micbias1 select", TWL4030_REG_MICBIAS_CTL, 5, 0,
  1164. NULL, 0),
  1165. SND_SOC_DAPM_SUPPLY("micbias2 select", TWL4030_REG_MICBIAS_CTL, 6, 0,
  1166. NULL, 0),
  1167. /* Microphone bias */
  1168. SND_SOC_DAPM_SUPPLY("Mic Bias 1",
  1169. TWL4030_REG_MICBIAS_CTL, 0, 0, NULL, 0),
  1170. SND_SOC_DAPM_SUPPLY("Mic Bias 2",
  1171. TWL4030_REG_MICBIAS_CTL, 1, 0, NULL, 0),
  1172. SND_SOC_DAPM_SUPPLY("Headset Mic Bias",
  1173. TWL4030_REG_MICBIAS_CTL, 2, 0, NULL, 0),
  1174. SND_SOC_DAPM_SUPPLY("VIF Enable", TWL4030_REG_VOICE_IF, 0, 0, NULL, 0),
  1175. };
  1176. static const struct snd_soc_dapm_route intercon[] = {
  1177. /* Stream -> DAC mapping */
  1178. {"DAC Right1", NULL, "HiFi Playback"},
  1179. {"DAC Left1", NULL, "HiFi Playback"},
  1180. {"DAC Right2", NULL, "HiFi Playback"},
  1181. {"DAC Left2", NULL, "HiFi Playback"},
  1182. {"DAC Voice", NULL, "VAIFIN"},
  1183. /* ADC -> Stream mapping */
  1184. {"HiFi Capture", NULL, "ADC Virtual Left1"},
  1185. {"HiFi Capture", NULL, "ADC Virtual Right1"},
  1186. {"HiFi Capture", NULL, "ADC Virtual Left2"},
  1187. {"HiFi Capture", NULL, "ADC Virtual Right2"},
  1188. {"VAIFOUT", NULL, "ADC Virtual Left2"},
  1189. {"VAIFOUT", NULL, "ADC Virtual Right2"},
  1190. {"VAIFOUT", NULL, "VIF Enable"},
  1191. {"Digital L1 Playback Mixer", NULL, "DAC Left1"},
  1192. {"Digital R1 Playback Mixer", NULL, "DAC Right1"},
  1193. {"Digital L2 Playback Mixer", NULL, "DAC Left2"},
  1194. {"Digital R2 Playback Mixer", NULL, "DAC Right2"},
  1195. {"Digital Voice Playback Mixer", NULL, "DAC Voice"},
  1196. /* Supply for the digital part (APLL) */
  1197. {"Digital Voice Playback Mixer", NULL, "APLL Enable"},
  1198. {"DAC Left1", NULL, "AIF Enable"},
  1199. {"DAC Right1", NULL, "AIF Enable"},
  1200. {"DAC Left2", NULL, "AIF Enable"},
  1201. {"DAC Right1", NULL, "AIF Enable"},
  1202. {"DAC Voice", NULL, "VIF Enable"},
  1203. {"Digital R2 Playback Mixer", NULL, "AIF Enable"},
  1204. {"Digital L2 Playback Mixer", NULL, "AIF Enable"},
  1205. {"Analog L1 Playback Mixer", NULL, "Digital L1 Playback Mixer"},
  1206. {"Analog R1 Playback Mixer", NULL, "Digital R1 Playback Mixer"},
  1207. {"Analog L2 Playback Mixer", NULL, "Digital L2 Playback Mixer"},
  1208. {"Analog R2 Playback Mixer", NULL, "Digital R2 Playback Mixer"},
  1209. {"Analog Voice Playback Mixer", NULL, "Digital Voice Playback Mixer"},
  1210. /* Internal playback routings */
  1211. /* Earpiece */
  1212. {"Earpiece Mixer", "Voice", "Analog Voice Playback Mixer"},
  1213. {"Earpiece Mixer", "AudioL1", "Analog L1 Playback Mixer"},
  1214. {"Earpiece Mixer", "AudioL2", "Analog L2 Playback Mixer"},
  1215. {"Earpiece Mixer", "AudioR1", "Analog R1 Playback Mixer"},
  1216. {"Earpiece PGA", NULL, "Earpiece Mixer"},
  1217. /* PreDrivL */
  1218. {"PredriveL Mixer", "Voice", "Analog Voice Playback Mixer"},
  1219. {"PredriveL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
  1220. {"PredriveL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
  1221. {"PredriveL Mixer", "AudioR2", "Analog R2 Playback Mixer"},
  1222. {"PredriveL PGA", NULL, "PredriveL Mixer"},
  1223. /* PreDrivR */
  1224. {"PredriveR Mixer", "Voice", "Analog Voice Playback Mixer"},
  1225. {"PredriveR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
  1226. {"PredriveR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
  1227. {"PredriveR Mixer", "AudioL2", "Analog L2 Playback Mixer"},
  1228. {"PredriveR PGA", NULL, "PredriveR Mixer"},
  1229. /* HeadsetL */
  1230. {"HeadsetL Mixer", "Voice", "Analog Voice Playback Mixer"},
  1231. {"HeadsetL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
  1232. {"HeadsetL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
  1233. {"HeadsetL PGA", NULL, "HeadsetL Mixer"},
  1234. /* HeadsetR */
  1235. {"HeadsetR Mixer", "Voice", "Analog Voice Playback Mixer"},
  1236. {"HeadsetR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
  1237. {"HeadsetR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
  1238. {"HeadsetR PGA", NULL, "HeadsetR Mixer"},
  1239. /* CarkitL */
  1240. {"CarkitL Mixer", "Voice", "Analog Voice Playback Mixer"},
  1241. {"CarkitL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
  1242. {"CarkitL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
  1243. {"CarkitL PGA", NULL, "CarkitL Mixer"},
  1244. /* CarkitR */
  1245. {"CarkitR Mixer", "Voice", "Analog Voice Playback Mixer"},
  1246. {"CarkitR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
  1247. {"CarkitR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
  1248. {"CarkitR PGA", NULL, "CarkitR Mixer"},
  1249. /* HandsfreeL */
  1250. {"HandsfreeL Mux", "Voice", "Analog Voice Playback Mixer"},
  1251. {"HandsfreeL Mux", "AudioL1", "Analog L1 Playback Mixer"},
  1252. {"HandsfreeL Mux", "AudioL2", "Analog L2 Playback Mixer"},
  1253. {"HandsfreeL Mux", "AudioR2", "Analog R2 Playback Mixer"},
  1254. {"HandsfreeL", "Switch", "HandsfreeL Mux"},
  1255. {"HandsfreeL PGA", NULL, "HandsfreeL"},
  1256. /* HandsfreeR */
  1257. {"HandsfreeR Mux", "Voice", "Analog Voice Playback Mixer"},
  1258. {"HandsfreeR Mux", "AudioR1", "Analog R1 Playback Mixer"},
  1259. {"HandsfreeR Mux", "AudioR2", "Analog R2 Playback Mixer"},
  1260. {"HandsfreeR Mux", "AudioL2", "Analog L2 Playback Mixer"},
  1261. {"HandsfreeR", "Switch", "HandsfreeR Mux"},
  1262. {"HandsfreeR PGA", NULL, "HandsfreeR"},
  1263. /* Vibra */
  1264. {"Vibra Mux", "AudioL1", "DAC Left1"},
  1265. {"Vibra Mux", "AudioR1", "DAC Right1"},
  1266. {"Vibra Mux", "AudioL2", "DAC Left2"},
  1267. {"Vibra Mux", "AudioR2", "DAC Right2"},
  1268. /* outputs */
  1269. /* Must be always connected (for AIF and APLL) */
  1270. {"Virtual HiFi OUT", NULL, "DAC Left1"},
  1271. {"Virtual HiFi OUT", NULL, "DAC Right1"},
  1272. {"Virtual HiFi OUT", NULL, "DAC Left2"},
  1273. {"Virtual HiFi OUT", NULL, "DAC Right2"},
  1274. /* Must be always connected (for APLL) */
  1275. {"Virtual Voice OUT", NULL, "Digital Voice Playback Mixer"},
  1276. /* Physical outputs */
  1277. {"EARPIECE", NULL, "Earpiece PGA"},
  1278. {"PREDRIVEL", NULL, "PredriveL PGA"},
  1279. {"PREDRIVER", NULL, "PredriveR PGA"},
  1280. {"HSOL", NULL, "HeadsetL PGA"},
  1281. {"HSOR", NULL, "HeadsetR PGA"},
  1282. {"CARKITL", NULL, "CarkitL PGA"},
  1283. {"CARKITR", NULL, "CarkitR PGA"},
  1284. {"HFL", NULL, "HandsfreeL PGA"},
  1285. {"HFR", NULL, "HandsfreeR PGA"},
  1286. {"Vibra Route", "Audio", "Vibra Mux"},
  1287. {"VIBRA", NULL, "Vibra Route"},
  1288. /* Capture path */
  1289. /* Must be always connected (for AIF and APLL) */
  1290. {"ADC Virtual Left1", NULL, "Virtual HiFi IN"},
  1291. {"ADC Virtual Right1", NULL, "Virtual HiFi IN"},
  1292. {"ADC Virtual Left2", NULL, "Virtual HiFi IN"},
  1293. {"ADC Virtual Right2", NULL, "Virtual HiFi IN"},
  1294. /* Physical inputs */
  1295. {"Analog Left", "Main Mic Capture Switch", "MAINMIC"},
  1296. {"Analog Left", "Headset Mic Capture Switch", "HSMIC"},
  1297. {"Analog Left", "AUXL Capture Switch", "AUXL"},
  1298. {"Analog Left", "Carkit Mic Capture Switch", "CARKITMIC"},
  1299. {"Analog Right", "Sub Mic Capture Switch", "SUBMIC"},
  1300. {"Analog Right", "AUXR Capture Switch", "AUXR"},
  1301. {"ADC Physical Left", NULL, "Analog Left"},
  1302. {"ADC Physical Right", NULL, "Analog Right"},
  1303. {"Digimic0 Enable", NULL, "DIGIMIC0"},
  1304. {"Digimic1 Enable", NULL, "DIGIMIC1"},
  1305. {"DIGIMIC0", NULL, "micbias1 select"},
  1306. {"DIGIMIC1", NULL, "micbias2 select"},
  1307. /* TX1 Left capture path */
  1308. {"TX1 Capture Route", "Analog", "ADC Physical Left"},
  1309. {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
  1310. /* TX1 Right capture path */
  1311. {"TX1 Capture Route", "Analog", "ADC Physical Right"},
  1312. {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
  1313. /* TX2 Left capture path */
  1314. {"TX2 Capture Route", "Analog", "ADC Physical Left"},
  1315. {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
  1316. /* TX2 Right capture path */
  1317. {"TX2 Capture Route", "Analog", "ADC Physical Right"},
  1318. {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
  1319. {"ADC Virtual Left1", NULL, "TX1 Capture Route"},
  1320. {"ADC Virtual Right1", NULL, "TX1 Capture Route"},
  1321. {"ADC Virtual Left2", NULL, "TX2 Capture Route"},
  1322. {"ADC Virtual Right2", NULL, "TX2 Capture Route"},
  1323. {"ADC Virtual Left1", NULL, "AIF Enable"},
  1324. {"ADC Virtual Right1", NULL, "AIF Enable"},
  1325. {"ADC Virtual Left2", NULL, "AIF Enable"},
  1326. {"ADC Virtual Right2", NULL, "AIF Enable"},
  1327. /* Analog bypass routes */
  1328. {"Right1 Analog Loopback", "Switch", "Analog Right"},
  1329. {"Left1 Analog Loopback", "Switch", "Analog Left"},
  1330. {"Right2 Analog Loopback", "Switch", "Analog Right"},
  1331. {"Left2 Analog Loopback", "Switch", "Analog Left"},
  1332. {"Voice Analog Loopback", "Switch", "Analog Left"},
  1333. /* Supply for the Analog loopbacks */
  1334. {"Right1 Analog Loopback", NULL, "FM Loop Enable"},
  1335. {"Left1 Analog Loopback", NULL, "FM Loop Enable"},
  1336. {"Right2 Analog Loopback", NULL, "FM Loop Enable"},
  1337. {"Left2 Analog Loopback", NULL, "FM Loop Enable"},
  1338. {"Voice Analog Loopback", NULL, "FM Loop Enable"},
  1339. {"Analog R1 Playback Mixer", NULL, "Right1 Analog Loopback"},
  1340. {"Analog L1 Playback Mixer", NULL, "Left1 Analog Loopback"},
  1341. {"Analog R2 Playback Mixer", NULL, "Right2 Analog Loopback"},
  1342. {"Analog L2 Playback Mixer", NULL, "Left2 Analog Loopback"},
  1343. {"Analog Voice Playback Mixer", NULL, "Voice Analog Loopback"},
  1344. /* Digital bypass routes */
  1345. {"Right Digital Loopback", "Volume", "TX1 Capture Route"},
  1346. {"Left Digital Loopback", "Volume", "TX1 Capture Route"},
  1347. {"Voice Digital Loopback", "Volume", "TX2 Capture Route"},
  1348. {"Digital R2 Playback Mixer", NULL, "Right Digital Loopback"},
  1349. {"Digital L2 Playback Mixer", NULL, "Left Digital Loopback"},
  1350. {"Digital Voice Playback Mixer", NULL, "Voice Digital Loopback"},
  1351. };
  1352. static int twl4030_set_bias_level(struct snd_soc_codec *codec,
  1353. enum snd_soc_bias_level level)
  1354. {
  1355. switch (level) {
  1356. case SND_SOC_BIAS_ON:
  1357. break;
  1358. case SND_SOC_BIAS_PREPARE:
  1359. break;
  1360. case SND_SOC_BIAS_STANDBY:
  1361. if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF)
  1362. twl4030_codec_enable(codec, 1);
  1363. break;
  1364. case SND_SOC_BIAS_OFF:
  1365. twl4030_codec_enable(codec, 0);
  1366. break;
  1367. }
  1368. return 0;
  1369. }
  1370. static void twl4030_constraints(struct twl4030_priv *twl4030,
  1371. struct snd_pcm_substream *mst_substream)
  1372. {
  1373. struct snd_pcm_substream *slv_substream;
  1374. /* Pick the stream, which need to be constrained */
  1375. if (mst_substream == twl4030->master_substream)
  1376. slv_substream = twl4030->slave_substream;
  1377. else if (mst_substream == twl4030->slave_substream)
  1378. slv_substream = twl4030->master_substream;
  1379. else /* This should not happen.. */
  1380. return;
  1381. /* Set the constraints according to the already configured stream */
  1382. snd_pcm_hw_constraint_single(slv_substream->runtime,
  1383. SNDRV_PCM_HW_PARAM_RATE,
  1384. twl4030->rate);
  1385. snd_pcm_hw_constraint_single(slv_substream->runtime,
  1386. SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
  1387. twl4030->sample_bits);
  1388. snd_pcm_hw_constraint_single(slv_substream->runtime,
  1389. SNDRV_PCM_HW_PARAM_CHANNELS,
  1390. twl4030->channels);
  1391. }
  1392. /* In case of 4 channel mode, the RX1 L/R for playback and the TX2 L/R for
  1393. * capture has to be enabled/disabled. */
  1394. static void twl4030_tdm_enable(struct snd_soc_codec *codec, int direction,
  1395. int enable)
  1396. {
  1397. u8 reg, mask;
  1398. reg = twl4030_read(codec, TWL4030_REG_OPTION);
  1399. if (direction == SNDRV_PCM_STREAM_PLAYBACK)
  1400. mask = TWL4030_ARXL1_VRX_EN | TWL4030_ARXR1_EN;
  1401. else
  1402. mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
  1403. if (enable)
  1404. reg |= mask;
  1405. else
  1406. reg &= ~mask;
  1407. twl4030_write(codec, TWL4030_REG_OPTION, reg);
  1408. }
  1409. static int twl4030_startup(struct snd_pcm_substream *substream,
  1410. struct snd_soc_dai *dai)
  1411. {
  1412. struct snd_soc_codec *codec = dai->codec;
  1413. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  1414. if (twl4030->master_substream) {
  1415. twl4030->slave_substream = substream;
  1416. /* The DAI has one configuration for playback and capture, so
  1417. * if the DAI has been already configured then constrain this
  1418. * substream to match it. */
  1419. if (twl4030->configured)
  1420. twl4030_constraints(twl4030, twl4030->master_substream);
  1421. } else {
  1422. if (!(twl4030_read(codec, TWL4030_REG_CODEC_MODE) &
  1423. TWL4030_OPTION_1)) {
  1424. /* In option2 4 channel is not supported, set the
  1425. * constraint for the first stream for channels, the
  1426. * second stream will 'inherit' this cosntraint */
  1427. snd_pcm_hw_constraint_single(substream->runtime,
  1428. SNDRV_PCM_HW_PARAM_CHANNELS,
  1429. 2);
  1430. }
  1431. twl4030->master_substream = substream;
  1432. }
  1433. return 0;
  1434. }
  1435. static void twl4030_shutdown(struct snd_pcm_substream *substream,
  1436. struct snd_soc_dai *dai)
  1437. {
  1438. struct snd_soc_codec *codec = dai->codec;
  1439. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  1440. if (twl4030->master_substream == substream)
  1441. twl4030->master_substream = twl4030->slave_substream;
  1442. twl4030->slave_substream = NULL;
  1443. /* If all streams are closed, or the remaining stream has not yet
  1444. * been configured than set the DAI as not configured. */
  1445. if (!twl4030->master_substream)
  1446. twl4030->configured = 0;
  1447. else if (!twl4030->master_substream->runtime->channels)
  1448. twl4030->configured = 0;
  1449. /* If the closing substream had 4 channel, do the necessary cleanup */
  1450. if (substream->runtime->channels == 4)
  1451. twl4030_tdm_enable(codec, substream->stream, 0);
  1452. }
  1453. static int twl4030_hw_params(struct snd_pcm_substream *substream,
  1454. struct snd_pcm_hw_params *params,
  1455. struct snd_soc_dai *dai)
  1456. {
  1457. struct snd_soc_codec *codec = dai->codec;
  1458. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  1459. u8 mode, old_mode, format, old_format;
  1460. /* If the substream has 4 channel, do the necessary setup */
  1461. if (params_channels(params) == 4) {
  1462. format = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
  1463. mode = twl4030_read(codec, TWL4030_REG_CODEC_MODE);
  1464. /* Safety check: are we in the correct operating mode and
  1465. * the interface is in TDM mode? */
  1466. if ((mode & TWL4030_OPTION_1) &&
  1467. ((format & TWL4030_AIF_FORMAT) == TWL4030_AIF_FORMAT_TDM))
  1468. twl4030_tdm_enable(codec, substream->stream, 1);
  1469. else
  1470. return -EINVAL;
  1471. }
  1472. if (twl4030->configured)
  1473. /* Ignoring hw_params for already configured DAI */
  1474. return 0;
  1475. /* bit rate */
  1476. old_mode = twl4030_read(codec,
  1477. TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
  1478. mode = old_mode & ~TWL4030_APLL_RATE;
  1479. switch (params_rate(params)) {
  1480. case 8000:
  1481. mode |= TWL4030_APLL_RATE_8000;
  1482. break;
  1483. case 11025:
  1484. mode |= TWL4030_APLL_RATE_11025;
  1485. break;
  1486. case 12000:
  1487. mode |= TWL4030_APLL_RATE_12000;
  1488. break;
  1489. case 16000:
  1490. mode |= TWL4030_APLL_RATE_16000;
  1491. break;
  1492. case 22050:
  1493. mode |= TWL4030_APLL_RATE_22050;
  1494. break;
  1495. case 24000:
  1496. mode |= TWL4030_APLL_RATE_24000;
  1497. break;
  1498. case 32000:
  1499. mode |= TWL4030_APLL_RATE_32000;
  1500. break;
  1501. case 44100:
  1502. mode |= TWL4030_APLL_RATE_44100;
  1503. break;
  1504. case 48000:
  1505. mode |= TWL4030_APLL_RATE_48000;
  1506. break;
  1507. case 96000:
  1508. mode |= TWL4030_APLL_RATE_96000;
  1509. break;
  1510. default:
  1511. dev_err(codec->dev, "%s: unknown rate %d\n", __func__,
  1512. params_rate(params));
  1513. return -EINVAL;
  1514. }
  1515. /* sample size */
  1516. old_format = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
  1517. format = old_format;
  1518. format &= ~TWL4030_DATA_WIDTH;
  1519. switch (params_width(params)) {
  1520. case 16:
  1521. format |= TWL4030_DATA_WIDTH_16S_16W;
  1522. break;
  1523. case 32:
  1524. format |= TWL4030_DATA_WIDTH_32S_24W;
  1525. break;
  1526. default:
  1527. dev_err(codec->dev, "%s: unsupported bits/sample %d\n",
  1528. __func__, params_width(params));
  1529. return -EINVAL;
  1530. }
  1531. if (format != old_format || mode != old_mode) {
  1532. if (twl4030->codec_powered) {
  1533. /*
  1534. * If the codec is powered, than we need to toggle the
  1535. * codec power.
  1536. */
  1537. twl4030_codec_enable(codec, 0);
  1538. twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
  1539. twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
  1540. twl4030_codec_enable(codec, 1);
  1541. } else {
  1542. twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
  1543. twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
  1544. }
  1545. }
  1546. /* Store the important parameters for the DAI configuration and set
  1547. * the DAI as configured */
  1548. twl4030->configured = 1;
  1549. twl4030->rate = params_rate(params);
  1550. twl4030->sample_bits = hw_param_interval(params,
  1551. SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min;
  1552. twl4030->channels = params_channels(params);
  1553. /* If both playback and capture streams are open, and one of them
  1554. * is setting the hw parameters right now (since we are here), set
  1555. * constraints to the other stream to match the current one. */
  1556. if (twl4030->slave_substream)
  1557. twl4030_constraints(twl4030, substream);
  1558. return 0;
  1559. }
  1560. static int twl4030_set_dai_sysclk(struct snd_soc_dai *codec_dai, int clk_id,
  1561. unsigned int freq, int dir)
  1562. {
  1563. struct snd_soc_codec *codec = codec_dai->codec;
  1564. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  1565. switch (freq) {
  1566. case 19200000:
  1567. case 26000000:
  1568. case 38400000:
  1569. break;
  1570. default:
  1571. dev_err(codec->dev, "Unsupported HFCLKIN: %u\n", freq);
  1572. return -EINVAL;
  1573. }
  1574. if ((freq / 1000) != twl4030->sysclk) {
  1575. dev_err(codec->dev,
  1576. "Mismatch in HFCLKIN: %u (configured: %u)\n",
  1577. freq, twl4030->sysclk * 1000);
  1578. return -EINVAL;
  1579. }
  1580. return 0;
  1581. }
  1582. static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
  1583. {
  1584. struct snd_soc_codec *codec = codec_dai->codec;
  1585. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  1586. u8 old_format, format;
  1587. /* get format */
  1588. old_format = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
  1589. format = old_format;
  1590. /* set master/slave audio interface */
  1591. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  1592. case SND_SOC_DAIFMT_CBM_CFM:
  1593. format &= ~(TWL4030_AIF_SLAVE_EN);
  1594. format &= ~(TWL4030_CLK256FS_EN);
  1595. break;
  1596. case SND_SOC_DAIFMT_CBS_CFS:
  1597. format |= TWL4030_AIF_SLAVE_EN;
  1598. format |= TWL4030_CLK256FS_EN;
  1599. break;
  1600. default:
  1601. return -EINVAL;
  1602. }
  1603. /* interface format */
  1604. format &= ~TWL4030_AIF_FORMAT;
  1605. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  1606. case SND_SOC_DAIFMT_I2S:
  1607. format |= TWL4030_AIF_FORMAT_CODEC;
  1608. break;
  1609. case SND_SOC_DAIFMT_DSP_A:
  1610. format |= TWL4030_AIF_FORMAT_TDM;
  1611. break;
  1612. default:
  1613. return -EINVAL;
  1614. }
  1615. if (format != old_format) {
  1616. if (twl4030->codec_powered) {
  1617. /*
  1618. * If the codec is powered, than we need to toggle the
  1619. * codec power.
  1620. */
  1621. twl4030_codec_enable(codec, 0);
  1622. twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
  1623. twl4030_codec_enable(codec, 1);
  1624. } else {
  1625. twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
  1626. }
  1627. }
  1628. return 0;
  1629. }
  1630. static int twl4030_set_tristate(struct snd_soc_dai *dai, int tristate)
  1631. {
  1632. struct snd_soc_codec *codec = dai->codec;
  1633. u8 reg = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
  1634. if (tristate)
  1635. reg |= TWL4030_AIF_TRI_EN;
  1636. else
  1637. reg &= ~TWL4030_AIF_TRI_EN;
  1638. return twl4030_write(codec, TWL4030_REG_AUDIO_IF, reg);
  1639. }
  1640. /* In case of voice mode, the RX1 L(VRX) for downlink and the TX2 L/R
  1641. * (VTXL, VTXR) for uplink has to be enabled/disabled. */
  1642. static void twl4030_voice_enable(struct snd_soc_codec *codec, int direction,
  1643. int enable)
  1644. {
  1645. u8 reg, mask;
  1646. reg = twl4030_read(codec, TWL4030_REG_OPTION);
  1647. if (direction == SNDRV_PCM_STREAM_PLAYBACK)
  1648. mask = TWL4030_ARXL1_VRX_EN;
  1649. else
  1650. mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
  1651. if (enable)
  1652. reg |= mask;
  1653. else
  1654. reg &= ~mask;
  1655. twl4030_write(codec, TWL4030_REG_OPTION, reg);
  1656. }
  1657. static int twl4030_voice_startup(struct snd_pcm_substream *substream,
  1658. struct snd_soc_dai *dai)
  1659. {
  1660. struct snd_soc_codec *codec = dai->codec;
  1661. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  1662. u8 mode;
  1663. /* If the system master clock is not 26MHz, the voice PCM interface is
  1664. * not available.
  1665. */
  1666. if (twl4030->sysclk != 26000) {
  1667. dev_err(codec->dev,
  1668. "%s: HFCLKIN is %u KHz, voice interface needs 26MHz\n",
  1669. __func__, twl4030->sysclk);
  1670. return -EINVAL;
  1671. }
  1672. /* If the codec mode is not option2, the voice PCM interface is not
  1673. * available.
  1674. */
  1675. mode = twl4030_read(codec, TWL4030_REG_CODEC_MODE)
  1676. & TWL4030_OPT_MODE;
  1677. if (mode != TWL4030_OPTION_2) {
  1678. dev_err(codec->dev, "%s: the codec mode is not option2\n",
  1679. __func__);
  1680. return -EINVAL;
  1681. }
  1682. return 0;
  1683. }
  1684. static void twl4030_voice_shutdown(struct snd_pcm_substream *substream,
  1685. struct snd_soc_dai *dai)
  1686. {
  1687. struct snd_soc_codec *codec = dai->codec;
  1688. /* Enable voice digital filters */
  1689. twl4030_voice_enable(codec, substream->stream, 0);
  1690. }
  1691. static int twl4030_voice_hw_params(struct snd_pcm_substream *substream,
  1692. struct snd_pcm_hw_params *params,
  1693. struct snd_soc_dai *dai)
  1694. {
  1695. struct snd_soc_codec *codec = dai->codec;
  1696. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  1697. u8 old_mode, mode;
  1698. /* Enable voice digital filters */
  1699. twl4030_voice_enable(codec, substream->stream, 1);
  1700. /* bit rate */
  1701. old_mode = twl4030_read(codec,
  1702. TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
  1703. mode = old_mode;
  1704. switch (params_rate(params)) {
  1705. case 8000:
  1706. mode &= ~(TWL4030_SEL_16K);
  1707. break;
  1708. case 16000:
  1709. mode |= TWL4030_SEL_16K;
  1710. break;
  1711. default:
  1712. dev_err(codec->dev, "%s: unknown rate %d\n", __func__,
  1713. params_rate(params));
  1714. return -EINVAL;
  1715. }
  1716. if (mode != old_mode) {
  1717. if (twl4030->codec_powered) {
  1718. /*
  1719. * If the codec is powered, than we need to toggle the
  1720. * codec power.
  1721. */
  1722. twl4030_codec_enable(codec, 0);
  1723. twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
  1724. twl4030_codec_enable(codec, 1);
  1725. } else {
  1726. twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
  1727. }
  1728. }
  1729. return 0;
  1730. }
  1731. static int twl4030_voice_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  1732. int clk_id, unsigned int freq, int dir)
  1733. {
  1734. struct snd_soc_codec *codec = codec_dai->codec;
  1735. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  1736. if (freq != 26000000) {
  1737. dev_err(codec->dev,
  1738. "%s: HFCLKIN is %u KHz, voice interface needs 26MHz\n",
  1739. __func__, freq / 1000);
  1740. return -EINVAL;
  1741. }
  1742. if ((freq / 1000) != twl4030->sysclk) {
  1743. dev_err(codec->dev,
  1744. "Mismatch in HFCLKIN: %u (configured: %u)\n",
  1745. freq, twl4030->sysclk * 1000);
  1746. return -EINVAL;
  1747. }
  1748. return 0;
  1749. }
  1750. static int twl4030_voice_set_dai_fmt(struct snd_soc_dai *codec_dai,
  1751. unsigned int fmt)
  1752. {
  1753. struct snd_soc_codec *codec = codec_dai->codec;
  1754. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  1755. u8 old_format, format;
  1756. /* get format */
  1757. old_format = twl4030_read(codec, TWL4030_REG_VOICE_IF);
  1758. format = old_format;
  1759. /* set master/slave audio interface */
  1760. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  1761. case SND_SOC_DAIFMT_CBM_CFM:
  1762. format &= ~(TWL4030_VIF_SLAVE_EN);
  1763. break;
  1764. case SND_SOC_DAIFMT_CBS_CFS:
  1765. format |= TWL4030_VIF_SLAVE_EN;
  1766. break;
  1767. default:
  1768. return -EINVAL;
  1769. }
  1770. /* clock inversion */
  1771. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  1772. case SND_SOC_DAIFMT_IB_NF:
  1773. format &= ~(TWL4030_VIF_FORMAT);
  1774. break;
  1775. case SND_SOC_DAIFMT_NB_IF:
  1776. format |= TWL4030_VIF_FORMAT;
  1777. break;
  1778. default:
  1779. return -EINVAL;
  1780. }
  1781. if (format != old_format) {
  1782. if (twl4030->codec_powered) {
  1783. /*
  1784. * If the codec is powered, than we need to toggle the
  1785. * codec power.
  1786. */
  1787. twl4030_codec_enable(codec, 0);
  1788. twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
  1789. twl4030_codec_enable(codec, 1);
  1790. } else {
  1791. twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
  1792. }
  1793. }
  1794. return 0;
  1795. }
  1796. static int twl4030_voice_set_tristate(struct snd_soc_dai *dai, int tristate)
  1797. {
  1798. struct snd_soc_codec *codec = dai->codec;
  1799. u8 reg = twl4030_read(codec, TWL4030_REG_VOICE_IF);
  1800. if (tristate)
  1801. reg |= TWL4030_VIF_TRI_EN;
  1802. else
  1803. reg &= ~TWL4030_VIF_TRI_EN;
  1804. return twl4030_write(codec, TWL4030_REG_VOICE_IF, reg);
  1805. }
  1806. #define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000)
  1807. #define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
  1808. static const struct snd_soc_dai_ops twl4030_dai_hifi_ops = {
  1809. .startup = twl4030_startup,
  1810. .shutdown = twl4030_shutdown,
  1811. .hw_params = twl4030_hw_params,
  1812. .set_sysclk = twl4030_set_dai_sysclk,
  1813. .set_fmt = twl4030_set_dai_fmt,
  1814. .set_tristate = twl4030_set_tristate,
  1815. };
  1816. static const struct snd_soc_dai_ops twl4030_dai_voice_ops = {
  1817. .startup = twl4030_voice_startup,
  1818. .shutdown = twl4030_voice_shutdown,
  1819. .hw_params = twl4030_voice_hw_params,
  1820. .set_sysclk = twl4030_voice_set_dai_sysclk,
  1821. .set_fmt = twl4030_voice_set_dai_fmt,
  1822. .set_tristate = twl4030_voice_set_tristate,
  1823. };
  1824. static struct snd_soc_dai_driver twl4030_dai[] = {
  1825. {
  1826. .name = "twl4030-hifi",
  1827. .playback = {
  1828. .stream_name = "HiFi Playback",
  1829. .channels_min = 2,
  1830. .channels_max = 4,
  1831. .rates = TWL4030_RATES | SNDRV_PCM_RATE_96000,
  1832. .formats = TWL4030_FORMATS,
  1833. .sig_bits = 24,},
  1834. .capture = {
  1835. .stream_name = "HiFi Capture",
  1836. .channels_min = 2,
  1837. .channels_max = 4,
  1838. .rates = TWL4030_RATES,
  1839. .formats = TWL4030_FORMATS,
  1840. .sig_bits = 24,},
  1841. .ops = &twl4030_dai_hifi_ops,
  1842. },
  1843. {
  1844. .name = "twl4030-voice",
  1845. .playback = {
  1846. .stream_name = "Voice Playback",
  1847. .channels_min = 1,
  1848. .channels_max = 1,
  1849. .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
  1850. .formats = SNDRV_PCM_FMTBIT_S16_LE,},
  1851. .capture = {
  1852. .stream_name = "Voice Capture",
  1853. .channels_min = 1,
  1854. .channels_max = 2,
  1855. .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
  1856. .formats = SNDRV_PCM_FMTBIT_S16_LE,},
  1857. .ops = &twl4030_dai_voice_ops,
  1858. },
  1859. };
  1860. static int twl4030_soc_probe(struct snd_soc_codec *codec)
  1861. {
  1862. struct twl4030_priv *twl4030;
  1863. twl4030 = devm_kzalloc(codec->dev, sizeof(struct twl4030_priv),
  1864. GFP_KERNEL);
  1865. if (!twl4030)
  1866. return -ENOMEM;
  1867. snd_soc_codec_set_drvdata(codec, twl4030);
  1868. /* Set the defaults, and power up the codec */
  1869. twl4030->sysclk = twl4030_audio_get_mclk() / 1000;
  1870. twl4030_init_chip(codec);
  1871. return 0;
  1872. }
  1873. static int twl4030_soc_remove(struct snd_soc_codec *codec)
  1874. {
  1875. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  1876. struct twl4030_codec_data *pdata = twl4030->pdata;
  1877. if (pdata && pdata->hs_extmute && gpio_is_valid(pdata->hs_extmute_gpio))
  1878. gpio_free(pdata->hs_extmute_gpio);
  1879. return 0;
  1880. }
  1881. static struct snd_soc_codec_driver soc_codec_dev_twl4030 = {
  1882. .probe = twl4030_soc_probe,
  1883. .remove = twl4030_soc_remove,
  1884. .read = twl4030_read,
  1885. .write = twl4030_write,
  1886. .set_bias_level = twl4030_set_bias_level,
  1887. .idle_bias_off = true,
  1888. .component_driver = {
  1889. .controls = twl4030_snd_controls,
  1890. .num_controls = ARRAY_SIZE(twl4030_snd_controls),
  1891. .dapm_widgets = twl4030_dapm_widgets,
  1892. .num_dapm_widgets = ARRAY_SIZE(twl4030_dapm_widgets),
  1893. .dapm_routes = intercon,
  1894. .num_dapm_routes = ARRAY_SIZE(intercon),
  1895. },
  1896. };
  1897. static int twl4030_codec_probe(struct platform_device *pdev)
  1898. {
  1899. return snd_soc_register_codec(&pdev->dev, &soc_codec_dev_twl4030,
  1900. twl4030_dai, ARRAY_SIZE(twl4030_dai));
  1901. }
  1902. static int twl4030_codec_remove(struct platform_device *pdev)
  1903. {
  1904. snd_soc_unregister_codec(&pdev->dev);
  1905. return 0;
  1906. }
  1907. MODULE_ALIAS("platform:twl4030-codec");
  1908. static struct platform_driver twl4030_codec_driver = {
  1909. .probe = twl4030_codec_probe,
  1910. .remove = twl4030_codec_remove,
  1911. .driver = {
  1912. .name = "twl4030-codec",
  1913. },
  1914. };
  1915. module_platform_driver(twl4030_codec_driver);
  1916. MODULE_DESCRIPTION("ASoC TWL4030 codec driver");
  1917. MODULE_AUTHOR("Steve Sakoman");
  1918. MODULE_LICENSE("GPL");