rt5670.c 93 KB

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  1. /*
  2. * rt5670.c -- RT5670 ALSA SoC audio codec driver
  3. *
  4. * Copyright 2014 Realtek Semiconductor Corp.
  5. * Author: Bard Liao <bardliao@realtek.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/moduleparam.h>
  13. #include <linux/init.h>
  14. #include <linux/delay.h>
  15. #include <linux/pm.h>
  16. #include <linux/pm_runtime.h>
  17. #include <linux/i2c.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/acpi.h>
  20. #include <linux/spi/spi.h>
  21. #include <linux/dmi.h>
  22. #include <sound/core.h>
  23. #include <sound/pcm.h>
  24. #include <sound/pcm_params.h>
  25. #include <sound/jack.h>
  26. #include <sound/soc.h>
  27. #include <sound/soc-dapm.h>
  28. #include <sound/initval.h>
  29. #include <sound/tlv.h>
  30. #include <sound/rt5670.h>
  31. #include "rl6231.h"
  32. #include "rt5670.h"
  33. #include "rt5670-dsp.h"
  34. #define RT5670_DEVICE_ID 0x6271
  35. #define RT5670_PR_RANGE_BASE (0xff + 1)
  36. #define RT5670_PR_SPACING 0x100
  37. #define RT5670_PR_BASE (RT5670_PR_RANGE_BASE + (0 * RT5670_PR_SPACING))
  38. static const struct regmap_range_cfg rt5670_ranges[] = {
  39. { .name = "PR", .range_min = RT5670_PR_BASE,
  40. .range_max = RT5670_PR_BASE + 0xf8,
  41. .selector_reg = RT5670_PRIV_INDEX,
  42. .selector_mask = 0xff,
  43. .selector_shift = 0x0,
  44. .window_start = RT5670_PRIV_DATA,
  45. .window_len = 0x1, },
  46. };
  47. static const struct reg_sequence init_list[] = {
  48. { RT5670_PR_BASE + 0x14, 0x9a8a },
  49. { RT5670_PR_BASE + 0x38, 0x3ba1 },
  50. { RT5670_PR_BASE + 0x3d, 0x3640 },
  51. { 0x8a, 0x0123 },
  52. };
  53. static const struct reg_default rt5670_reg[] = {
  54. { 0x00, 0x0000 },
  55. { 0x02, 0x8888 },
  56. { 0x03, 0x8888 },
  57. { 0x0a, 0x0001 },
  58. { 0x0b, 0x0827 },
  59. { 0x0c, 0x0000 },
  60. { 0x0d, 0x0008 },
  61. { 0x0e, 0x0000 },
  62. { 0x0f, 0x0808 },
  63. { 0x19, 0xafaf },
  64. { 0x1a, 0xafaf },
  65. { 0x1b, 0x0011 },
  66. { 0x1c, 0x2f2f },
  67. { 0x1d, 0x2f2f },
  68. { 0x1e, 0x0000 },
  69. { 0x1f, 0x2f2f },
  70. { 0x20, 0x0000 },
  71. { 0x26, 0x7860 },
  72. { 0x27, 0x7860 },
  73. { 0x28, 0x7871 },
  74. { 0x29, 0x8080 },
  75. { 0x2a, 0x5656 },
  76. { 0x2b, 0x5454 },
  77. { 0x2c, 0xaaa0 },
  78. { 0x2d, 0x0000 },
  79. { 0x2e, 0x2f2f },
  80. { 0x2f, 0x1002 },
  81. { 0x30, 0x0000 },
  82. { 0x31, 0x5f00 },
  83. { 0x32, 0x0000 },
  84. { 0x33, 0x0000 },
  85. { 0x34, 0x0000 },
  86. { 0x35, 0x0000 },
  87. { 0x36, 0x0000 },
  88. { 0x37, 0x0000 },
  89. { 0x38, 0x0000 },
  90. { 0x3b, 0x0000 },
  91. { 0x3c, 0x007f },
  92. { 0x3d, 0x0000 },
  93. { 0x3e, 0x007f },
  94. { 0x45, 0xe00f },
  95. { 0x4c, 0x5380 },
  96. { 0x4f, 0x0073 },
  97. { 0x52, 0x00d3 },
  98. { 0x53, 0xf000 },
  99. { 0x61, 0x0000 },
  100. { 0x62, 0x0001 },
  101. { 0x63, 0x00c3 },
  102. { 0x64, 0x0000 },
  103. { 0x65, 0x0001 },
  104. { 0x66, 0x0000 },
  105. { 0x6f, 0x8000 },
  106. { 0x70, 0x8000 },
  107. { 0x71, 0x8000 },
  108. { 0x72, 0x8000 },
  109. { 0x73, 0x7770 },
  110. { 0x74, 0x0e00 },
  111. { 0x75, 0x1505 },
  112. { 0x76, 0x0015 },
  113. { 0x77, 0x0c00 },
  114. { 0x78, 0x4000 },
  115. { 0x79, 0x0123 },
  116. { 0x7f, 0x1100 },
  117. { 0x80, 0x0000 },
  118. { 0x81, 0x0000 },
  119. { 0x82, 0x0000 },
  120. { 0x83, 0x0000 },
  121. { 0x84, 0x0000 },
  122. { 0x85, 0x0000 },
  123. { 0x86, 0x0004 },
  124. { 0x87, 0x0000 },
  125. { 0x88, 0x0000 },
  126. { 0x89, 0x0000 },
  127. { 0x8a, 0x0123 },
  128. { 0x8b, 0x0000 },
  129. { 0x8c, 0x0003 },
  130. { 0x8d, 0x0000 },
  131. { 0x8e, 0x0004 },
  132. { 0x8f, 0x1100 },
  133. { 0x90, 0x0646 },
  134. { 0x91, 0x0c06 },
  135. { 0x93, 0x0000 },
  136. { 0x94, 0x1270 },
  137. { 0x95, 0x1000 },
  138. { 0x97, 0x0000 },
  139. { 0x98, 0x0000 },
  140. { 0x99, 0x0000 },
  141. { 0x9a, 0x2184 },
  142. { 0x9b, 0x010a },
  143. { 0x9c, 0x0aea },
  144. { 0x9d, 0x000c },
  145. { 0x9e, 0x0400 },
  146. { 0xae, 0x7000 },
  147. { 0xaf, 0x0000 },
  148. { 0xb0, 0x7000 },
  149. { 0xb1, 0x0000 },
  150. { 0xb2, 0x0000 },
  151. { 0xb3, 0x001f },
  152. { 0xb4, 0x220c },
  153. { 0xb5, 0x1f00 },
  154. { 0xb6, 0x0000 },
  155. { 0xb7, 0x0000 },
  156. { 0xbb, 0x0000 },
  157. { 0xbc, 0x0000 },
  158. { 0xbd, 0x0000 },
  159. { 0xbe, 0x0000 },
  160. { 0xbf, 0x0000 },
  161. { 0xc0, 0x0000 },
  162. { 0xc1, 0x0000 },
  163. { 0xc2, 0x0000 },
  164. { 0xcd, 0x0000 },
  165. { 0xce, 0x0000 },
  166. { 0xcf, 0x1813 },
  167. { 0xd0, 0x0690 },
  168. { 0xd1, 0x1c17 },
  169. { 0xd3, 0xa220 },
  170. { 0xd4, 0x0000 },
  171. { 0xd6, 0x0400 },
  172. { 0xd9, 0x0809 },
  173. { 0xda, 0x0000 },
  174. { 0xdb, 0x0001 },
  175. { 0xdc, 0x0049 },
  176. { 0xdd, 0x0024 },
  177. { 0xe6, 0x8000 },
  178. { 0xe7, 0x0000 },
  179. { 0xec, 0xa200 },
  180. { 0xed, 0x0000 },
  181. { 0xee, 0xa200 },
  182. { 0xef, 0x0000 },
  183. { 0xf8, 0x0000 },
  184. { 0xf9, 0x0000 },
  185. { 0xfa, 0x8010 },
  186. { 0xfb, 0x0033 },
  187. { 0xfc, 0x0100 },
  188. };
  189. static bool rt5670_volatile_register(struct device *dev, unsigned int reg)
  190. {
  191. int i;
  192. for (i = 0; i < ARRAY_SIZE(rt5670_ranges); i++) {
  193. if ((reg >= rt5670_ranges[i].window_start &&
  194. reg <= rt5670_ranges[i].window_start +
  195. rt5670_ranges[i].window_len) ||
  196. (reg >= rt5670_ranges[i].range_min &&
  197. reg <= rt5670_ranges[i].range_max)) {
  198. return true;
  199. }
  200. }
  201. switch (reg) {
  202. case RT5670_RESET:
  203. case RT5670_PDM_DATA_CTRL1:
  204. case RT5670_PDM1_DATA_CTRL4:
  205. case RT5670_PDM2_DATA_CTRL4:
  206. case RT5670_PRIV_DATA:
  207. case RT5670_ASRC_5:
  208. case RT5670_CJ_CTRL1:
  209. case RT5670_CJ_CTRL2:
  210. case RT5670_CJ_CTRL3:
  211. case RT5670_A_JD_CTRL1:
  212. case RT5670_A_JD_CTRL2:
  213. case RT5670_VAD_CTRL5:
  214. case RT5670_ADC_EQ_CTRL1:
  215. case RT5670_EQ_CTRL1:
  216. case RT5670_ALC_CTRL_1:
  217. case RT5670_IRQ_CTRL2:
  218. case RT5670_INT_IRQ_ST:
  219. case RT5670_IL_CMD:
  220. case RT5670_DSP_CTRL1:
  221. case RT5670_DSP_CTRL2:
  222. case RT5670_DSP_CTRL3:
  223. case RT5670_DSP_CTRL4:
  224. case RT5670_DSP_CTRL5:
  225. case RT5670_VENDOR_ID:
  226. case RT5670_VENDOR_ID1:
  227. case RT5670_VENDOR_ID2:
  228. return true;
  229. default:
  230. return false;
  231. }
  232. }
  233. static bool rt5670_readable_register(struct device *dev, unsigned int reg)
  234. {
  235. int i;
  236. for (i = 0; i < ARRAY_SIZE(rt5670_ranges); i++) {
  237. if ((reg >= rt5670_ranges[i].window_start &&
  238. reg <= rt5670_ranges[i].window_start +
  239. rt5670_ranges[i].window_len) ||
  240. (reg >= rt5670_ranges[i].range_min &&
  241. reg <= rt5670_ranges[i].range_max)) {
  242. return true;
  243. }
  244. }
  245. switch (reg) {
  246. case RT5670_RESET:
  247. case RT5670_HP_VOL:
  248. case RT5670_LOUT1:
  249. case RT5670_CJ_CTRL1:
  250. case RT5670_CJ_CTRL2:
  251. case RT5670_CJ_CTRL3:
  252. case RT5670_IN2:
  253. case RT5670_INL1_INR1_VOL:
  254. case RT5670_DAC1_DIG_VOL:
  255. case RT5670_DAC2_DIG_VOL:
  256. case RT5670_DAC_CTRL:
  257. case RT5670_STO1_ADC_DIG_VOL:
  258. case RT5670_MONO_ADC_DIG_VOL:
  259. case RT5670_STO2_ADC_DIG_VOL:
  260. case RT5670_ADC_BST_VOL1:
  261. case RT5670_ADC_BST_VOL2:
  262. case RT5670_STO2_ADC_MIXER:
  263. case RT5670_STO1_ADC_MIXER:
  264. case RT5670_MONO_ADC_MIXER:
  265. case RT5670_AD_DA_MIXER:
  266. case RT5670_STO_DAC_MIXER:
  267. case RT5670_DD_MIXER:
  268. case RT5670_DIG_MIXER:
  269. case RT5670_DSP_PATH1:
  270. case RT5670_DSP_PATH2:
  271. case RT5670_DIG_INF1_DATA:
  272. case RT5670_DIG_INF2_DATA:
  273. case RT5670_PDM_OUT_CTRL:
  274. case RT5670_PDM_DATA_CTRL1:
  275. case RT5670_PDM1_DATA_CTRL2:
  276. case RT5670_PDM1_DATA_CTRL3:
  277. case RT5670_PDM1_DATA_CTRL4:
  278. case RT5670_PDM2_DATA_CTRL2:
  279. case RT5670_PDM2_DATA_CTRL3:
  280. case RT5670_PDM2_DATA_CTRL4:
  281. case RT5670_REC_L1_MIXER:
  282. case RT5670_REC_L2_MIXER:
  283. case RT5670_REC_R1_MIXER:
  284. case RT5670_REC_R2_MIXER:
  285. case RT5670_HPO_MIXER:
  286. case RT5670_MONO_MIXER:
  287. case RT5670_OUT_L1_MIXER:
  288. case RT5670_OUT_R1_MIXER:
  289. case RT5670_LOUT_MIXER:
  290. case RT5670_PWR_DIG1:
  291. case RT5670_PWR_DIG2:
  292. case RT5670_PWR_ANLG1:
  293. case RT5670_PWR_ANLG2:
  294. case RT5670_PWR_MIXER:
  295. case RT5670_PWR_VOL:
  296. case RT5670_PRIV_INDEX:
  297. case RT5670_PRIV_DATA:
  298. case RT5670_I2S4_SDP:
  299. case RT5670_I2S1_SDP:
  300. case RT5670_I2S2_SDP:
  301. case RT5670_I2S3_SDP:
  302. case RT5670_ADDA_CLK1:
  303. case RT5670_ADDA_CLK2:
  304. case RT5670_DMIC_CTRL1:
  305. case RT5670_DMIC_CTRL2:
  306. case RT5670_TDM_CTRL_1:
  307. case RT5670_TDM_CTRL_2:
  308. case RT5670_TDM_CTRL_3:
  309. case RT5670_DSP_CLK:
  310. case RT5670_GLB_CLK:
  311. case RT5670_PLL_CTRL1:
  312. case RT5670_PLL_CTRL2:
  313. case RT5670_ASRC_1:
  314. case RT5670_ASRC_2:
  315. case RT5670_ASRC_3:
  316. case RT5670_ASRC_4:
  317. case RT5670_ASRC_5:
  318. case RT5670_ASRC_7:
  319. case RT5670_ASRC_8:
  320. case RT5670_ASRC_9:
  321. case RT5670_ASRC_10:
  322. case RT5670_ASRC_11:
  323. case RT5670_ASRC_12:
  324. case RT5670_ASRC_13:
  325. case RT5670_ASRC_14:
  326. case RT5670_DEPOP_M1:
  327. case RT5670_DEPOP_M2:
  328. case RT5670_DEPOP_M3:
  329. case RT5670_CHARGE_PUMP:
  330. case RT5670_MICBIAS:
  331. case RT5670_A_JD_CTRL1:
  332. case RT5670_A_JD_CTRL2:
  333. case RT5670_VAD_CTRL1:
  334. case RT5670_VAD_CTRL2:
  335. case RT5670_VAD_CTRL3:
  336. case RT5670_VAD_CTRL4:
  337. case RT5670_VAD_CTRL5:
  338. case RT5670_ADC_EQ_CTRL1:
  339. case RT5670_ADC_EQ_CTRL2:
  340. case RT5670_EQ_CTRL1:
  341. case RT5670_EQ_CTRL2:
  342. case RT5670_ALC_DRC_CTRL1:
  343. case RT5670_ALC_DRC_CTRL2:
  344. case RT5670_ALC_CTRL_1:
  345. case RT5670_ALC_CTRL_2:
  346. case RT5670_ALC_CTRL_3:
  347. case RT5670_JD_CTRL:
  348. case RT5670_IRQ_CTRL1:
  349. case RT5670_IRQ_CTRL2:
  350. case RT5670_INT_IRQ_ST:
  351. case RT5670_GPIO_CTRL1:
  352. case RT5670_GPIO_CTRL2:
  353. case RT5670_GPIO_CTRL3:
  354. case RT5670_SCRABBLE_FUN:
  355. case RT5670_SCRABBLE_CTRL:
  356. case RT5670_BASE_BACK:
  357. case RT5670_MP3_PLUS1:
  358. case RT5670_MP3_PLUS2:
  359. case RT5670_ADJ_HPF1:
  360. case RT5670_ADJ_HPF2:
  361. case RT5670_HP_CALIB_AMP_DET:
  362. case RT5670_SV_ZCD1:
  363. case RT5670_SV_ZCD2:
  364. case RT5670_IL_CMD:
  365. case RT5670_IL_CMD2:
  366. case RT5670_IL_CMD3:
  367. case RT5670_DRC_HL_CTRL1:
  368. case RT5670_DRC_HL_CTRL2:
  369. case RT5670_ADC_MONO_HP_CTRL1:
  370. case RT5670_ADC_MONO_HP_CTRL2:
  371. case RT5670_ADC_STO2_HP_CTRL1:
  372. case RT5670_ADC_STO2_HP_CTRL2:
  373. case RT5670_JD_CTRL3:
  374. case RT5670_JD_CTRL4:
  375. case RT5670_DIG_MISC:
  376. case RT5670_DSP_CTRL1:
  377. case RT5670_DSP_CTRL2:
  378. case RT5670_DSP_CTRL3:
  379. case RT5670_DSP_CTRL4:
  380. case RT5670_DSP_CTRL5:
  381. case RT5670_GEN_CTRL2:
  382. case RT5670_GEN_CTRL3:
  383. case RT5670_VENDOR_ID:
  384. case RT5670_VENDOR_ID1:
  385. case RT5670_VENDOR_ID2:
  386. return true;
  387. default:
  388. return false;
  389. }
  390. }
  391. /**
  392. * rt5670_headset_detect - Detect headset.
  393. * @codec: SoC audio codec device.
  394. * @jack_insert: Jack insert or not.
  395. *
  396. * Detect whether is headset or not when jack inserted.
  397. *
  398. * Returns detect status.
  399. */
  400. static int rt5670_headset_detect(struct snd_soc_codec *codec, int jack_insert)
  401. {
  402. int val;
  403. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  404. struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
  405. if (jack_insert) {
  406. snd_soc_dapm_force_enable_pin(dapm, "Mic Det Power");
  407. snd_soc_dapm_sync(dapm);
  408. snd_soc_update_bits(codec, RT5670_GEN_CTRL3, 0x4, 0x0);
  409. snd_soc_update_bits(codec, RT5670_CJ_CTRL2,
  410. RT5670_CBJ_DET_MODE | RT5670_CBJ_MN_JD,
  411. RT5670_CBJ_MN_JD);
  412. snd_soc_write(codec, RT5670_GPIO_CTRL2, 0x0004);
  413. snd_soc_update_bits(codec, RT5670_GPIO_CTRL1,
  414. RT5670_GP1_PIN_MASK, RT5670_GP1_PIN_IRQ);
  415. snd_soc_update_bits(codec, RT5670_CJ_CTRL1,
  416. RT5670_CBJ_BST1_EN, RT5670_CBJ_BST1_EN);
  417. snd_soc_write(codec, RT5670_JD_CTRL3, 0x00f0);
  418. snd_soc_update_bits(codec, RT5670_CJ_CTRL2,
  419. RT5670_CBJ_MN_JD, RT5670_CBJ_MN_JD);
  420. snd_soc_update_bits(codec, RT5670_CJ_CTRL2,
  421. RT5670_CBJ_MN_JD, 0);
  422. msleep(300);
  423. val = snd_soc_read(codec, RT5670_CJ_CTRL3) & 0x7;
  424. if (val == 0x1 || val == 0x2) {
  425. rt5670->jack_type = SND_JACK_HEADSET;
  426. /* for push button */
  427. snd_soc_update_bits(codec, RT5670_INT_IRQ_ST, 0x8, 0x8);
  428. snd_soc_update_bits(codec, RT5670_IL_CMD, 0x40, 0x40);
  429. snd_soc_read(codec, RT5670_IL_CMD);
  430. } else {
  431. snd_soc_update_bits(codec, RT5670_GEN_CTRL3, 0x4, 0x4);
  432. rt5670->jack_type = SND_JACK_HEADPHONE;
  433. snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
  434. snd_soc_dapm_sync(dapm);
  435. }
  436. } else {
  437. snd_soc_update_bits(codec, RT5670_INT_IRQ_ST, 0x8, 0x0);
  438. snd_soc_update_bits(codec, RT5670_GEN_CTRL3, 0x4, 0x4);
  439. rt5670->jack_type = 0;
  440. snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
  441. snd_soc_dapm_sync(dapm);
  442. }
  443. return rt5670->jack_type;
  444. }
  445. void rt5670_jack_suspend(struct snd_soc_codec *codec)
  446. {
  447. struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
  448. rt5670->jack_type_saved = rt5670->jack_type;
  449. rt5670_headset_detect(codec, 0);
  450. }
  451. EXPORT_SYMBOL_GPL(rt5670_jack_suspend);
  452. void rt5670_jack_resume(struct snd_soc_codec *codec)
  453. {
  454. struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
  455. if (rt5670->jack_type_saved)
  456. rt5670_headset_detect(codec, 1);
  457. }
  458. EXPORT_SYMBOL_GPL(rt5670_jack_resume);
  459. static int rt5670_button_detect(struct snd_soc_codec *codec)
  460. {
  461. int btn_type, val;
  462. val = snd_soc_read(codec, RT5670_IL_CMD);
  463. btn_type = val & 0xff80;
  464. snd_soc_write(codec, RT5670_IL_CMD, val);
  465. if (btn_type != 0) {
  466. msleep(20);
  467. val = snd_soc_read(codec, RT5670_IL_CMD);
  468. snd_soc_write(codec, RT5670_IL_CMD, val);
  469. }
  470. return btn_type;
  471. }
  472. static int rt5670_irq_detection(void *data)
  473. {
  474. struct rt5670_priv *rt5670 = (struct rt5670_priv *)data;
  475. struct snd_soc_jack_gpio *gpio = &rt5670->hp_gpio;
  476. struct snd_soc_jack *jack = rt5670->jack;
  477. int val, btn_type, report = jack->status;
  478. if (rt5670->pdata.jd_mode == 1) /* 2 port */
  479. val = snd_soc_read(rt5670->codec, RT5670_A_JD_CTRL1) & 0x0070;
  480. else
  481. val = snd_soc_read(rt5670->codec, RT5670_A_JD_CTRL1) & 0x0020;
  482. switch (val) {
  483. /* jack in */
  484. case 0x30: /* 2 port */
  485. case 0x0: /* 1 port or 2 port */
  486. if (rt5670->jack_type == 0) {
  487. report = rt5670_headset_detect(rt5670->codec, 1);
  488. /* for push button and jack out */
  489. gpio->debounce_time = 25;
  490. break;
  491. }
  492. btn_type = 0;
  493. if (snd_soc_read(rt5670->codec, RT5670_INT_IRQ_ST) & 0x4) {
  494. /* button pressed */
  495. report = SND_JACK_HEADSET;
  496. btn_type = rt5670_button_detect(rt5670->codec);
  497. switch (btn_type) {
  498. case 0x2000: /* up */
  499. report |= SND_JACK_BTN_1;
  500. break;
  501. case 0x0400: /* center */
  502. report |= SND_JACK_BTN_0;
  503. break;
  504. case 0x0080: /* down */
  505. report |= SND_JACK_BTN_2;
  506. break;
  507. default:
  508. dev_err(rt5670->codec->dev,
  509. "Unexpected button code 0x%04x\n",
  510. btn_type);
  511. break;
  512. }
  513. }
  514. if (btn_type == 0)/* button release */
  515. report = rt5670->jack_type;
  516. break;
  517. /* jack out */
  518. case 0x70: /* 2 port */
  519. case 0x10: /* 2 port */
  520. case 0x20: /* 1 port */
  521. report = 0;
  522. snd_soc_update_bits(rt5670->codec, RT5670_INT_IRQ_ST, 0x1, 0x0);
  523. rt5670_headset_detect(rt5670->codec, 0);
  524. gpio->debounce_time = 150; /* for jack in */
  525. break;
  526. default:
  527. break;
  528. }
  529. return report;
  530. }
  531. int rt5670_set_jack_detect(struct snd_soc_codec *codec,
  532. struct snd_soc_jack *jack)
  533. {
  534. struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
  535. int ret;
  536. rt5670->jack = jack;
  537. rt5670->hp_gpio.gpiod_dev = codec->dev;
  538. rt5670->hp_gpio.name = "headphone detect";
  539. rt5670->hp_gpio.report = SND_JACK_HEADSET |
  540. SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2;
  541. rt5670->hp_gpio.debounce_time = 150;
  542. rt5670->hp_gpio.wake = true;
  543. rt5670->hp_gpio.data = (struct rt5670_priv *)rt5670;
  544. rt5670->hp_gpio.jack_status_check = rt5670_irq_detection;
  545. ret = snd_soc_jack_add_gpios(rt5670->jack, 1,
  546. &rt5670->hp_gpio);
  547. if (ret) {
  548. dev_err(codec->dev, "Adding jack GPIO failed\n");
  549. return ret;
  550. }
  551. return 0;
  552. }
  553. EXPORT_SYMBOL_GPL(rt5670_set_jack_detect);
  554. static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
  555. static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
  556. static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
  557. static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
  558. static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
  559. /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
  560. static const DECLARE_TLV_DB_RANGE(bst_tlv,
  561. 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
  562. 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
  563. 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
  564. 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
  565. 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
  566. 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
  567. 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0)
  568. );
  569. /* Interface data select */
  570. static const char * const rt5670_data_select[] = {
  571. "Normal", "Swap", "left copy to right", "right copy to left"
  572. };
  573. static SOC_ENUM_SINGLE_DECL(rt5670_if2_dac_enum, RT5670_DIG_INF1_DATA,
  574. RT5670_IF2_DAC_SEL_SFT, rt5670_data_select);
  575. static SOC_ENUM_SINGLE_DECL(rt5670_if2_adc_enum, RT5670_DIG_INF1_DATA,
  576. RT5670_IF2_ADC_SEL_SFT, rt5670_data_select);
  577. static const struct snd_kcontrol_new rt5670_snd_controls[] = {
  578. /* Headphone Output Volume */
  579. SOC_DOUBLE("HP Playback Switch", RT5670_HP_VOL,
  580. RT5670_L_MUTE_SFT, RT5670_R_MUTE_SFT, 1, 1),
  581. SOC_DOUBLE_TLV("HP Playback Volume", RT5670_HP_VOL,
  582. RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
  583. 39, 1, out_vol_tlv),
  584. /* OUTPUT Control */
  585. SOC_DOUBLE("OUT Channel Switch", RT5670_LOUT1,
  586. RT5670_VOL_L_SFT, RT5670_VOL_R_SFT, 1, 1),
  587. SOC_DOUBLE_TLV("OUT Playback Volume", RT5670_LOUT1,
  588. RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, 39, 1, out_vol_tlv),
  589. /* DAC Digital Volume */
  590. SOC_DOUBLE("DAC2 Playback Switch", RT5670_DAC_CTRL,
  591. RT5670_M_DAC_L2_VOL_SFT, RT5670_M_DAC_R2_VOL_SFT, 1, 1),
  592. SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5670_DAC1_DIG_VOL,
  593. RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
  594. 175, 0, dac_vol_tlv),
  595. SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5670_DAC2_DIG_VOL,
  596. RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
  597. 175, 0, dac_vol_tlv),
  598. /* IN1/IN2 Control */
  599. SOC_SINGLE_TLV("IN1 Boost Volume", RT5670_CJ_CTRL1,
  600. RT5670_BST_SFT1, 8, 0, bst_tlv),
  601. SOC_SINGLE_TLV("IN2 Boost Volume", RT5670_IN2,
  602. RT5670_BST_SFT1, 8, 0, bst_tlv),
  603. /* INL/INR Volume Control */
  604. SOC_DOUBLE_TLV("IN Capture Volume", RT5670_INL1_INR1_VOL,
  605. RT5670_INL_VOL_SFT, RT5670_INR_VOL_SFT,
  606. 31, 1, in_vol_tlv),
  607. /* ADC Digital Volume Control */
  608. SOC_DOUBLE("ADC Capture Switch", RT5670_STO1_ADC_DIG_VOL,
  609. RT5670_L_MUTE_SFT, RT5670_R_MUTE_SFT, 1, 1),
  610. SOC_DOUBLE_TLV("ADC Capture Volume", RT5670_STO1_ADC_DIG_VOL,
  611. RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
  612. 127, 0, adc_vol_tlv),
  613. SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5670_MONO_ADC_DIG_VOL,
  614. RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
  615. 127, 0, adc_vol_tlv),
  616. /* ADC Boost Volume Control */
  617. SOC_DOUBLE_TLV("STO1 ADC Boost Gain Volume", RT5670_ADC_BST_VOL1,
  618. RT5670_STO1_ADC_L_BST_SFT, RT5670_STO1_ADC_R_BST_SFT,
  619. 3, 0, adc_bst_tlv),
  620. SOC_DOUBLE_TLV("STO2 ADC Boost Gain Volume", RT5670_ADC_BST_VOL1,
  621. RT5670_STO2_ADC_L_BST_SFT, RT5670_STO2_ADC_R_BST_SFT,
  622. 3, 0, adc_bst_tlv),
  623. SOC_ENUM("ADC IF2 Data Switch", rt5670_if2_adc_enum),
  624. SOC_ENUM("DAC IF2 Data Switch", rt5670_if2_dac_enum),
  625. };
  626. /**
  627. * set_dmic_clk - Set parameter of dmic.
  628. *
  629. * @w: DAPM widget.
  630. * @kcontrol: The kcontrol of this widget.
  631. * @event: Event id.
  632. *
  633. * Choose dmic clock between 1MHz and 3MHz.
  634. * It is better for clock to approximate 3MHz.
  635. */
  636. static int set_dmic_clk(struct snd_soc_dapm_widget *w,
  637. struct snd_kcontrol *kcontrol, int event)
  638. {
  639. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  640. struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
  641. int idx, rate;
  642. rate = rt5670->sysclk / rl6231_get_pre_div(rt5670->regmap,
  643. RT5670_ADDA_CLK1, RT5670_I2S_PD1_SFT);
  644. idx = rl6231_calc_dmic_clk(rate);
  645. if (idx < 0)
  646. dev_err(codec->dev, "Failed to set DMIC clock\n");
  647. else
  648. snd_soc_update_bits(codec, RT5670_DMIC_CTRL1,
  649. RT5670_DMIC_CLK_MASK, idx << RT5670_DMIC_CLK_SFT);
  650. return idx;
  651. }
  652. static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
  653. struct snd_soc_dapm_widget *sink)
  654. {
  655. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
  656. struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
  657. if (rt5670->sysclk_src == RT5670_SCLK_S_PLL1)
  658. return 1;
  659. else
  660. return 0;
  661. }
  662. static int is_using_asrc(struct snd_soc_dapm_widget *source,
  663. struct snd_soc_dapm_widget *sink)
  664. {
  665. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
  666. unsigned int reg, shift, val;
  667. switch (source->shift) {
  668. case 0:
  669. reg = RT5670_ASRC_3;
  670. shift = 0;
  671. break;
  672. case 1:
  673. reg = RT5670_ASRC_3;
  674. shift = 4;
  675. break;
  676. case 2:
  677. reg = RT5670_ASRC_5;
  678. shift = 12;
  679. break;
  680. case 3:
  681. reg = RT5670_ASRC_2;
  682. shift = 0;
  683. break;
  684. case 8:
  685. reg = RT5670_ASRC_2;
  686. shift = 4;
  687. break;
  688. case 9:
  689. reg = RT5670_ASRC_2;
  690. shift = 8;
  691. break;
  692. case 10:
  693. reg = RT5670_ASRC_2;
  694. shift = 12;
  695. break;
  696. default:
  697. return 0;
  698. }
  699. val = (snd_soc_read(codec, reg) >> shift) & 0xf;
  700. switch (val) {
  701. case 1:
  702. case 2:
  703. case 3:
  704. case 4:
  705. return 1;
  706. default:
  707. return 0;
  708. }
  709. }
  710. static int can_use_asrc(struct snd_soc_dapm_widget *source,
  711. struct snd_soc_dapm_widget *sink)
  712. {
  713. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
  714. struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
  715. if (rt5670->sysclk > rt5670->lrck[RT5670_AIF1] * 384)
  716. return 1;
  717. return 0;
  718. }
  719. /**
  720. * rt5670_sel_asrc_clk_src - select ASRC clock source for a set of filters
  721. * @codec: SoC audio codec device.
  722. * @filter_mask: mask of filters.
  723. * @clk_src: clock source
  724. *
  725. * The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5670 can
  726. * only support standard 32fs or 64fs i2s format, ASRC should be enabled to
  727. * support special i2s clock format such as Intel's 100fs(100 * sampling rate).
  728. * ASRC function will track i2s clock and generate a corresponding system clock
  729. * for codec. This function provides an API to select the clock source for a
  730. * set of filters specified by the mask. And the codec driver will turn on ASRC
  731. * for these filters if ASRC is selected as their clock source.
  732. */
  733. int rt5670_sel_asrc_clk_src(struct snd_soc_codec *codec,
  734. unsigned int filter_mask, unsigned int clk_src)
  735. {
  736. unsigned int asrc2_mask = 0, asrc2_value = 0;
  737. unsigned int asrc3_mask = 0, asrc3_value = 0;
  738. if (clk_src > RT5670_CLK_SEL_SYS3)
  739. return -EINVAL;
  740. if (filter_mask & RT5670_DA_STEREO_FILTER) {
  741. asrc2_mask |= RT5670_DA_STO_CLK_SEL_MASK;
  742. asrc2_value = (asrc2_value & ~RT5670_DA_STO_CLK_SEL_MASK)
  743. | (clk_src << RT5670_DA_STO_CLK_SEL_SFT);
  744. }
  745. if (filter_mask & RT5670_DA_MONO_L_FILTER) {
  746. asrc2_mask |= RT5670_DA_MONOL_CLK_SEL_MASK;
  747. asrc2_value = (asrc2_value & ~RT5670_DA_MONOL_CLK_SEL_MASK)
  748. | (clk_src << RT5670_DA_MONOL_CLK_SEL_SFT);
  749. }
  750. if (filter_mask & RT5670_DA_MONO_R_FILTER) {
  751. asrc2_mask |= RT5670_DA_MONOR_CLK_SEL_MASK;
  752. asrc2_value = (asrc2_value & ~RT5670_DA_MONOR_CLK_SEL_MASK)
  753. | (clk_src << RT5670_DA_MONOR_CLK_SEL_SFT);
  754. }
  755. if (filter_mask & RT5670_AD_STEREO_FILTER) {
  756. asrc2_mask |= RT5670_AD_STO1_CLK_SEL_MASK;
  757. asrc2_value = (asrc2_value & ~RT5670_AD_STO1_CLK_SEL_MASK)
  758. | (clk_src << RT5670_AD_STO1_CLK_SEL_SFT);
  759. }
  760. if (filter_mask & RT5670_AD_MONO_L_FILTER) {
  761. asrc3_mask |= RT5670_AD_MONOL_CLK_SEL_MASK;
  762. asrc3_value = (asrc3_value & ~RT5670_AD_MONOL_CLK_SEL_MASK)
  763. | (clk_src << RT5670_AD_MONOL_CLK_SEL_SFT);
  764. }
  765. if (filter_mask & RT5670_AD_MONO_R_FILTER) {
  766. asrc3_mask |= RT5670_AD_MONOR_CLK_SEL_MASK;
  767. asrc3_value = (asrc3_value & ~RT5670_AD_MONOR_CLK_SEL_MASK)
  768. | (clk_src << RT5670_AD_MONOR_CLK_SEL_SFT);
  769. }
  770. if (filter_mask & RT5670_UP_RATE_FILTER) {
  771. asrc3_mask |= RT5670_UP_CLK_SEL_MASK;
  772. asrc3_value = (asrc3_value & ~RT5670_UP_CLK_SEL_MASK)
  773. | (clk_src << RT5670_UP_CLK_SEL_SFT);
  774. }
  775. if (filter_mask & RT5670_DOWN_RATE_FILTER) {
  776. asrc3_mask |= RT5670_DOWN_CLK_SEL_MASK;
  777. asrc3_value = (asrc3_value & ~RT5670_DOWN_CLK_SEL_MASK)
  778. | (clk_src << RT5670_DOWN_CLK_SEL_SFT);
  779. }
  780. if (asrc2_mask)
  781. snd_soc_update_bits(codec, RT5670_ASRC_2,
  782. asrc2_mask, asrc2_value);
  783. if (asrc3_mask)
  784. snd_soc_update_bits(codec, RT5670_ASRC_3,
  785. asrc3_mask, asrc3_value);
  786. return 0;
  787. }
  788. EXPORT_SYMBOL_GPL(rt5670_sel_asrc_clk_src);
  789. /* Digital Mixer */
  790. static const struct snd_kcontrol_new rt5670_sto1_adc_l_mix[] = {
  791. SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO1_ADC_MIXER,
  792. RT5670_M_ADC_L1_SFT, 1, 1),
  793. SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO1_ADC_MIXER,
  794. RT5670_M_ADC_L2_SFT, 1, 1),
  795. };
  796. static const struct snd_kcontrol_new rt5670_sto1_adc_r_mix[] = {
  797. SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO1_ADC_MIXER,
  798. RT5670_M_ADC_R1_SFT, 1, 1),
  799. SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO1_ADC_MIXER,
  800. RT5670_M_ADC_R2_SFT, 1, 1),
  801. };
  802. static const struct snd_kcontrol_new rt5670_sto2_adc_l_mix[] = {
  803. SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO2_ADC_MIXER,
  804. RT5670_M_ADC_L1_SFT, 1, 1),
  805. SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO2_ADC_MIXER,
  806. RT5670_M_ADC_L2_SFT, 1, 1),
  807. };
  808. static const struct snd_kcontrol_new rt5670_sto2_adc_r_mix[] = {
  809. SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO2_ADC_MIXER,
  810. RT5670_M_ADC_R1_SFT, 1, 1),
  811. SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO2_ADC_MIXER,
  812. RT5670_M_ADC_R2_SFT, 1, 1),
  813. };
  814. static const struct snd_kcontrol_new rt5670_mono_adc_l_mix[] = {
  815. SOC_DAPM_SINGLE("ADC1 Switch", RT5670_MONO_ADC_MIXER,
  816. RT5670_M_MONO_ADC_L1_SFT, 1, 1),
  817. SOC_DAPM_SINGLE("ADC2 Switch", RT5670_MONO_ADC_MIXER,
  818. RT5670_M_MONO_ADC_L2_SFT, 1, 1),
  819. };
  820. static const struct snd_kcontrol_new rt5670_mono_adc_r_mix[] = {
  821. SOC_DAPM_SINGLE("ADC1 Switch", RT5670_MONO_ADC_MIXER,
  822. RT5670_M_MONO_ADC_R1_SFT, 1, 1),
  823. SOC_DAPM_SINGLE("ADC2 Switch", RT5670_MONO_ADC_MIXER,
  824. RT5670_M_MONO_ADC_R2_SFT, 1, 1),
  825. };
  826. static const struct snd_kcontrol_new rt5670_dac_l_mix[] = {
  827. SOC_DAPM_SINGLE("Stereo ADC Switch", RT5670_AD_DA_MIXER,
  828. RT5670_M_ADCMIX_L_SFT, 1, 1),
  829. SOC_DAPM_SINGLE("DAC1 Switch", RT5670_AD_DA_MIXER,
  830. RT5670_M_DAC1_L_SFT, 1, 1),
  831. };
  832. static const struct snd_kcontrol_new rt5670_dac_r_mix[] = {
  833. SOC_DAPM_SINGLE("Stereo ADC Switch", RT5670_AD_DA_MIXER,
  834. RT5670_M_ADCMIX_R_SFT, 1, 1),
  835. SOC_DAPM_SINGLE("DAC1 Switch", RT5670_AD_DA_MIXER,
  836. RT5670_M_DAC1_R_SFT, 1, 1),
  837. };
  838. static const struct snd_kcontrol_new rt5670_sto_dac_l_mix[] = {
  839. SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_STO_DAC_MIXER,
  840. RT5670_M_DAC_L1_SFT, 1, 1),
  841. SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_STO_DAC_MIXER,
  842. RT5670_M_DAC_L2_SFT, 1, 1),
  843. SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_STO_DAC_MIXER,
  844. RT5670_M_DAC_R1_STO_L_SFT, 1, 1),
  845. };
  846. static const struct snd_kcontrol_new rt5670_sto_dac_r_mix[] = {
  847. SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_STO_DAC_MIXER,
  848. RT5670_M_DAC_R1_SFT, 1, 1),
  849. SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_STO_DAC_MIXER,
  850. RT5670_M_DAC_R2_SFT, 1, 1),
  851. SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_STO_DAC_MIXER,
  852. RT5670_M_DAC_L1_STO_R_SFT, 1, 1),
  853. };
  854. static const struct snd_kcontrol_new rt5670_mono_dac_l_mix[] = {
  855. SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_DD_MIXER,
  856. RT5670_M_DAC_L1_MONO_L_SFT, 1, 1),
  857. SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DD_MIXER,
  858. RT5670_M_DAC_L2_MONO_L_SFT, 1, 1),
  859. SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DD_MIXER,
  860. RT5670_M_DAC_R2_MONO_L_SFT, 1, 1),
  861. };
  862. static const struct snd_kcontrol_new rt5670_mono_dac_r_mix[] = {
  863. SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_DD_MIXER,
  864. RT5670_M_DAC_R1_MONO_R_SFT, 1, 1),
  865. SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DD_MIXER,
  866. RT5670_M_DAC_R2_MONO_R_SFT, 1, 1),
  867. SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DD_MIXER,
  868. RT5670_M_DAC_L2_MONO_R_SFT, 1, 1),
  869. };
  870. static const struct snd_kcontrol_new rt5670_dig_l_mix[] = {
  871. SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5670_DIG_MIXER,
  872. RT5670_M_STO_L_DAC_L_SFT, 1, 1),
  873. SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DIG_MIXER,
  874. RT5670_M_DAC_L2_DAC_L_SFT, 1, 1),
  875. SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DIG_MIXER,
  876. RT5670_M_DAC_R2_DAC_L_SFT, 1, 1),
  877. };
  878. static const struct snd_kcontrol_new rt5670_dig_r_mix[] = {
  879. SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5670_DIG_MIXER,
  880. RT5670_M_STO_R_DAC_R_SFT, 1, 1),
  881. SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DIG_MIXER,
  882. RT5670_M_DAC_R2_DAC_R_SFT, 1, 1),
  883. SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DIG_MIXER,
  884. RT5670_M_DAC_L2_DAC_R_SFT, 1, 1),
  885. };
  886. /* Analog Input Mixer */
  887. static const struct snd_kcontrol_new rt5670_rec_l_mix[] = {
  888. SOC_DAPM_SINGLE("INL Switch", RT5670_REC_L2_MIXER,
  889. RT5670_M_IN_L_RM_L_SFT, 1, 1),
  890. SOC_DAPM_SINGLE("BST2 Switch", RT5670_REC_L2_MIXER,
  891. RT5670_M_BST2_RM_L_SFT, 1, 1),
  892. SOC_DAPM_SINGLE("BST1 Switch", RT5670_REC_L2_MIXER,
  893. RT5670_M_BST1_RM_L_SFT, 1, 1),
  894. };
  895. static const struct snd_kcontrol_new rt5670_rec_r_mix[] = {
  896. SOC_DAPM_SINGLE("INR Switch", RT5670_REC_R2_MIXER,
  897. RT5670_M_IN_R_RM_R_SFT, 1, 1),
  898. SOC_DAPM_SINGLE("BST2 Switch", RT5670_REC_R2_MIXER,
  899. RT5670_M_BST2_RM_R_SFT, 1, 1),
  900. SOC_DAPM_SINGLE("BST1 Switch", RT5670_REC_R2_MIXER,
  901. RT5670_M_BST1_RM_R_SFT, 1, 1),
  902. };
  903. static const struct snd_kcontrol_new rt5670_out_l_mix[] = {
  904. SOC_DAPM_SINGLE("BST1 Switch", RT5670_OUT_L1_MIXER,
  905. RT5670_M_BST1_OM_L_SFT, 1, 1),
  906. SOC_DAPM_SINGLE("INL Switch", RT5670_OUT_L1_MIXER,
  907. RT5670_M_IN_L_OM_L_SFT, 1, 1),
  908. SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_OUT_L1_MIXER,
  909. RT5670_M_DAC_L2_OM_L_SFT, 1, 1),
  910. SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_OUT_L1_MIXER,
  911. RT5670_M_DAC_L1_OM_L_SFT, 1, 1),
  912. };
  913. static const struct snd_kcontrol_new rt5670_out_r_mix[] = {
  914. SOC_DAPM_SINGLE("BST2 Switch", RT5670_OUT_R1_MIXER,
  915. RT5670_M_BST2_OM_R_SFT, 1, 1),
  916. SOC_DAPM_SINGLE("INR Switch", RT5670_OUT_R1_MIXER,
  917. RT5670_M_IN_R_OM_R_SFT, 1, 1),
  918. SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_OUT_R1_MIXER,
  919. RT5670_M_DAC_R2_OM_R_SFT, 1, 1),
  920. SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_OUT_R1_MIXER,
  921. RT5670_M_DAC_R1_OM_R_SFT, 1, 1),
  922. };
  923. static const struct snd_kcontrol_new rt5670_hpo_mix[] = {
  924. SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER,
  925. RT5670_M_DAC1_HM_SFT, 1, 1),
  926. SOC_DAPM_SINGLE("HPVOL Switch", RT5670_HPO_MIXER,
  927. RT5670_M_HPVOL_HM_SFT, 1, 1),
  928. };
  929. static const struct snd_kcontrol_new rt5670_hpvoll_mix[] = {
  930. SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER,
  931. RT5670_M_DACL1_HML_SFT, 1, 1),
  932. SOC_DAPM_SINGLE("INL Switch", RT5670_HPO_MIXER,
  933. RT5670_M_INL1_HML_SFT, 1, 1),
  934. };
  935. static const struct snd_kcontrol_new rt5670_hpvolr_mix[] = {
  936. SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER,
  937. RT5670_M_DACR1_HMR_SFT, 1, 1),
  938. SOC_DAPM_SINGLE("INR Switch", RT5670_HPO_MIXER,
  939. RT5670_M_INR1_HMR_SFT, 1, 1),
  940. };
  941. static const struct snd_kcontrol_new rt5670_lout_mix[] = {
  942. SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_LOUT_MIXER,
  943. RT5670_M_DAC_L1_LM_SFT, 1, 1),
  944. SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_LOUT_MIXER,
  945. RT5670_M_DAC_R1_LM_SFT, 1, 1),
  946. SOC_DAPM_SINGLE("OUTMIX L Switch", RT5670_LOUT_MIXER,
  947. RT5670_M_OV_L_LM_SFT, 1, 1),
  948. SOC_DAPM_SINGLE("OUTMIX R Switch", RT5670_LOUT_MIXER,
  949. RT5670_M_OV_R_LM_SFT, 1, 1),
  950. };
  951. static const struct snd_kcontrol_new rt5670_hpl_mix[] = {
  952. SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_HPO_MIXER,
  953. RT5670_M_DACL1_HML_SFT, 1, 1),
  954. SOC_DAPM_SINGLE("INL1 Switch", RT5670_HPO_MIXER,
  955. RT5670_M_INL1_HML_SFT, 1, 1),
  956. };
  957. static const struct snd_kcontrol_new rt5670_hpr_mix[] = {
  958. SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_HPO_MIXER,
  959. RT5670_M_DACR1_HMR_SFT, 1, 1),
  960. SOC_DAPM_SINGLE("INR1 Switch", RT5670_HPO_MIXER,
  961. RT5670_M_INR1_HMR_SFT, 1, 1),
  962. };
  963. static const struct snd_kcontrol_new lout_l_enable_control =
  964. SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5670_LOUT1,
  965. RT5670_L_MUTE_SFT, 1, 1);
  966. static const struct snd_kcontrol_new lout_r_enable_control =
  967. SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5670_LOUT1,
  968. RT5670_R_MUTE_SFT, 1, 1);
  969. /* DAC1 L/R source */ /* MX-29 [9:8] [11:10] */
  970. static const char * const rt5670_dac1_src[] = {
  971. "IF1 DAC", "IF2 DAC"
  972. };
  973. static SOC_ENUM_SINGLE_DECL(rt5670_dac1l_enum, RT5670_AD_DA_MIXER,
  974. RT5670_DAC1_L_SEL_SFT, rt5670_dac1_src);
  975. static const struct snd_kcontrol_new rt5670_dac1l_mux =
  976. SOC_DAPM_ENUM("DAC1 L source", rt5670_dac1l_enum);
  977. static SOC_ENUM_SINGLE_DECL(rt5670_dac1r_enum, RT5670_AD_DA_MIXER,
  978. RT5670_DAC1_R_SEL_SFT, rt5670_dac1_src);
  979. static const struct snd_kcontrol_new rt5670_dac1r_mux =
  980. SOC_DAPM_ENUM("DAC1 R source", rt5670_dac1r_enum);
  981. /*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */
  982. /* TODO Use SOC_VALUE_ENUM_SINGLE_DECL */
  983. static const char * const rt5670_dac12_src[] = {
  984. "IF1 DAC", "IF2 DAC", "IF3 DAC", "TxDC DAC",
  985. "Bass", "VAD_ADC", "IF4 DAC"
  986. };
  987. static SOC_ENUM_SINGLE_DECL(rt5670_dac2l_enum, RT5670_DAC_CTRL,
  988. RT5670_DAC2_L_SEL_SFT, rt5670_dac12_src);
  989. static const struct snd_kcontrol_new rt5670_dac_l2_mux =
  990. SOC_DAPM_ENUM("DAC2 L source", rt5670_dac2l_enum);
  991. static const char * const rt5670_dacr2_src[] = {
  992. "IF1 DAC", "IF2 DAC", "IF3 DAC", "TxDC DAC", "TxDP ADC", "IF4 DAC"
  993. };
  994. static SOC_ENUM_SINGLE_DECL(rt5670_dac2r_enum, RT5670_DAC_CTRL,
  995. RT5670_DAC2_R_SEL_SFT, rt5670_dacr2_src);
  996. static const struct snd_kcontrol_new rt5670_dac_r2_mux =
  997. SOC_DAPM_ENUM("DAC2 R source", rt5670_dac2r_enum);
  998. /*RxDP source*/ /* MX-2D [15:13] */
  999. static const char * const rt5670_rxdp_src[] = {
  1000. "IF2 DAC", "IF1 DAC", "STO1 ADC Mixer", "STO2 ADC Mixer",
  1001. "Mono ADC Mixer L", "Mono ADC Mixer R", "DAC1"
  1002. };
  1003. static SOC_ENUM_SINGLE_DECL(rt5670_rxdp_enum, RT5670_DSP_PATH1,
  1004. RT5670_RXDP_SEL_SFT, rt5670_rxdp_src);
  1005. static const struct snd_kcontrol_new rt5670_rxdp_mux =
  1006. SOC_DAPM_ENUM("DAC2 L source", rt5670_rxdp_enum);
  1007. /* MX-2D [1] [0] */
  1008. static const char * const rt5670_dsp_bypass_src[] = {
  1009. "DSP", "Bypass"
  1010. };
  1011. static SOC_ENUM_SINGLE_DECL(rt5670_dsp_ul_enum, RT5670_DSP_PATH1,
  1012. RT5670_DSP_UL_SFT, rt5670_dsp_bypass_src);
  1013. static const struct snd_kcontrol_new rt5670_dsp_ul_mux =
  1014. SOC_DAPM_ENUM("DSP UL source", rt5670_dsp_ul_enum);
  1015. static SOC_ENUM_SINGLE_DECL(rt5670_dsp_dl_enum, RT5670_DSP_PATH1,
  1016. RT5670_DSP_DL_SFT, rt5670_dsp_bypass_src);
  1017. static const struct snd_kcontrol_new rt5670_dsp_dl_mux =
  1018. SOC_DAPM_ENUM("DSP DL source", rt5670_dsp_dl_enum);
  1019. /* Stereo2 ADC source */
  1020. /* MX-26 [15] */
  1021. static const char * const rt5670_stereo2_adc_lr_src[] = {
  1022. "L", "LR"
  1023. };
  1024. static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc_lr_enum, RT5670_STO2_ADC_MIXER,
  1025. RT5670_STO2_ADC_SRC_SFT, rt5670_stereo2_adc_lr_src);
  1026. static const struct snd_kcontrol_new rt5670_sto2_adc_lr_mux =
  1027. SOC_DAPM_ENUM("Stereo2 ADC LR source", rt5670_stereo2_adc_lr_enum);
  1028. /* Stereo1 ADC source */
  1029. /* MX-27 MX-26 [12] */
  1030. static const char * const rt5670_stereo_adc1_src[] = {
  1031. "DAC MIX", "ADC"
  1032. };
  1033. static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc1_enum, RT5670_STO1_ADC_MIXER,
  1034. RT5670_ADC_1_SRC_SFT, rt5670_stereo_adc1_src);
  1035. static const struct snd_kcontrol_new rt5670_sto_adc_l1_mux =
  1036. SOC_DAPM_ENUM("Stereo1 ADC L1 source", rt5670_stereo1_adc1_enum);
  1037. static const struct snd_kcontrol_new rt5670_sto_adc_r1_mux =
  1038. SOC_DAPM_ENUM("Stereo1 ADC R1 source", rt5670_stereo1_adc1_enum);
  1039. static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc1_enum, RT5670_STO2_ADC_MIXER,
  1040. RT5670_ADC_1_SRC_SFT, rt5670_stereo_adc1_src);
  1041. static const struct snd_kcontrol_new rt5670_sto2_adc_l1_mux =
  1042. SOC_DAPM_ENUM("Stereo2 ADC L1 source", rt5670_stereo2_adc1_enum);
  1043. static const struct snd_kcontrol_new rt5670_sto2_adc_r1_mux =
  1044. SOC_DAPM_ENUM("Stereo2 ADC R1 source", rt5670_stereo2_adc1_enum);
  1045. /* MX-27 MX-26 [11] */
  1046. static const char * const rt5670_stereo_adc2_src[] = {
  1047. "DAC MIX", "DMIC"
  1048. };
  1049. static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc2_enum, RT5670_STO1_ADC_MIXER,
  1050. RT5670_ADC_2_SRC_SFT, rt5670_stereo_adc2_src);
  1051. static const struct snd_kcontrol_new rt5670_sto_adc_l2_mux =
  1052. SOC_DAPM_ENUM("Stereo1 ADC L2 source", rt5670_stereo1_adc2_enum);
  1053. static const struct snd_kcontrol_new rt5670_sto_adc_r2_mux =
  1054. SOC_DAPM_ENUM("Stereo1 ADC R2 source", rt5670_stereo1_adc2_enum);
  1055. static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc2_enum, RT5670_STO2_ADC_MIXER,
  1056. RT5670_ADC_2_SRC_SFT, rt5670_stereo_adc2_src);
  1057. static const struct snd_kcontrol_new rt5670_sto2_adc_l2_mux =
  1058. SOC_DAPM_ENUM("Stereo2 ADC L2 source", rt5670_stereo2_adc2_enum);
  1059. static const struct snd_kcontrol_new rt5670_sto2_adc_r2_mux =
  1060. SOC_DAPM_ENUM("Stereo2 ADC R2 source", rt5670_stereo2_adc2_enum);
  1061. /* MX-27 MX26 [10] */
  1062. static const char * const rt5670_stereo_adc_src[] = {
  1063. "ADC1L ADC2R", "ADC3"
  1064. };
  1065. static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc_enum, RT5670_STO1_ADC_MIXER,
  1066. RT5670_ADC_SRC_SFT, rt5670_stereo_adc_src);
  1067. static const struct snd_kcontrol_new rt5670_sto_adc_mux =
  1068. SOC_DAPM_ENUM("Stereo1 ADC source", rt5670_stereo1_adc_enum);
  1069. static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc_enum, RT5670_STO2_ADC_MIXER,
  1070. RT5670_ADC_SRC_SFT, rt5670_stereo_adc_src);
  1071. static const struct snd_kcontrol_new rt5670_sto2_adc_mux =
  1072. SOC_DAPM_ENUM("Stereo2 ADC source", rt5670_stereo2_adc_enum);
  1073. /* MX-27 MX-26 [9:8] */
  1074. static const char * const rt5670_stereo_dmic_src[] = {
  1075. "DMIC1", "DMIC2", "DMIC3"
  1076. };
  1077. static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_dmic_enum, RT5670_STO1_ADC_MIXER,
  1078. RT5670_DMIC_SRC_SFT, rt5670_stereo_dmic_src);
  1079. static const struct snd_kcontrol_new rt5670_sto1_dmic_mux =
  1080. SOC_DAPM_ENUM("Stereo1 DMIC source", rt5670_stereo1_dmic_enum);
  1081. static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_dmic_enum, RT5670_STO2_ADC_MIXER,
  1082. RT5670_DMIC_SRC_SFT, rt5670_stereo_dmic_src);
  1083. static const struct snd_kcontrol_new rt5670_sto2_dmic_mux =
  1084. SOC_DAPM_ENUM("Stereo2 DMIC source", rt5670_stereo2_dmic_enum);
  1085. /* MX-27 [0] */
  1086. static const char * const rt5670_stereo_dmic3_src[] = {
  1087. "DMIC3", "PDM ADC"
  1088. };
  1089. static SOC_ENUM_SINGLE_DECL(rt5670_stereo_dmic3_enum, RT5670_STO1_ADC_MIXER,
  1090. RT5670_DMIC3_SRC_SFT, rt5670_stereo_dmic3_src);
  1091. static const struct snd_kcontrol_new rt5670_sto_dmic3_mux =
  1092. SOC_DAPM_ENUM("Stereo DMIC3 source", rt5670_stereo_dmic3_enum);
  1093. /* Mono ADC source */
  1094. /* MX-28 [12] */
  1095. static const char * const rt5670_mono_adc_l1_src[] = {
  1096. "Mono DAC MIXL", "ADC1"
  1097. };
  1098. static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_l1_enum, RT5670_MONO_ADC_MIXER,
  1099. RT5670_MONO_ADC_L1_SRC_SFT, rt5670_mono_adc_l1_src);
  1100. static const struct snd_kcontrol_new rt5670_mono_adc_l1_mux =
  1101. SOC_DAPM_ENUM("Mono ADC1 left source", rt5670_mono_adc_l1_enum);
  1102. /* MX-28 [11] */
  1103. static const char * const rt5670_mono_adc_l2_src[] = {
  1104. "Mono DAC MIXL", "DMIC"
  1105. };
  1106. static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_l2_enum, RT5670_MONO_ADC_MIXER,
  1107. RT5670_MONO_ADC_L2_SRC_SFT, rt5670_mono_adc_l2_src);
  1108. static const struct snd_kcontrol_new rt5670_mono_adc_l2_mux =
  1109. SOC_DAPM_ENUM("Mono ADC2 left source", rt5670_mono_adc_l2_enum);
  1110. /* MX-28 [9:8] */
  1111. static const char * const rt5670_mono_dmic_src[] = {
  1112. "DMIC1", "DMIC2", "DMIC3"
  1113. };
  1114. static SOC_ENUM_SINGLE_DECL(rt5670_mono_dmic_l_enum, RT5670_MONO_ADC_MIXER,
  1115. RT5670_MONO_DMIC_L_SRC_SFT, rt5670_mono_dmic_src);
  1116. static const struct snd_kcontrol_new rt5670_mono_dmic_l_mux =
  1117. SOC_DAPM_ENUM("Mono DMIC left source", rt5670_mono_dmic_l_enum);
  1118. /* MX-28 [1:0] */
  1119. static SOC_ENUM_SINGLE_DECL(rt5670_mono_dmic_r_enum, RT5670_MONO_ADC_MIXER,
  1120. RT5670_MONO_DMIC_R_SRC_SFT, rt5670_mono_dmic_src);
  1121. static const struct snd_kcontrol_new rt5670_mono_dmic_r_mux =
  1122. SOC_DAPM_ENUM("Mono DMIC Right source", rt5670_mono_dmic_r_enum);
  1123. /* MX-28 [4] */
  1124. static const char * const rt5670_mono_adc_r1_src[] = {
  1125. "Mono DAC MIXR", "ADC2"
  1126. };
  1127. static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_r1_enum, RT5670_MONO_ADC_MIXER,
  1128. RT5670_MONO_ADC_R1_SRC_SFT, rt5670_mono_adc_r1_src);
  1129. static const struct snd_kcontrol_new rt5670_mono_adc_r1_mux =
  1130. SOC_DAPM_ENUM("Mono ADC1 right source", rt5670_mono_adc_r1_enum);
  1131. /* MX-28 [3] */
  1132. static const char * const rt5670_mono_adc_r2_src[] = {
  1133. "Mono DAC MIXR", "DMIC"
  1134. };
  1135. static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_r2_enum, RT5670_MONO_ADC_MIXER,
  1136. RT5670_MONO_ADC_R2_SRC_SFT, rt5670_mono_adc_r2_src);
  1137. static const struct snd_kcontrol_new rt5670_mono_adc_r2_mux =
  1138. SOC_DAPM_ENUM("Mono ADC2 right source", rt5670_mono_adc_r2_enum);
  1139. /* MX-2D [3:2] */
  1140. static const char * const rt5670_txdp_slot_src[] = {
  1141. "Slot 0-1", "Slot 2-3", "Slot 4-5", "Slot 6-7"
  1142. };
  1143. static SOC_ENUM_SINGLE_DECL(rt5670_txdp_slot_enum, RT5670_DSP_PATH1,
  1144. RT5670_TXDP_SLOT_SEL_SFT, rt5670_txdp_slot_src);
  1145. static const struct snd_kcontrol_new rt5670_txdp_slot_mux =
  1146. SOC_DAPM_ENUM("TxDP Slot source", rt5670_txdp_slot_enum);
  1147. /* MX-2F [15] */
  1148. static const char * const rt5670_if1_adc2_in_src[] = {
  1149. "IF_ADC2", "VAD_ADC"
  1150. };
  1151. static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc2_in_enum, RT5670_DIG_INF1_DATA,
  1152. RT5670_IF1_ADC2_IN_SFT, rt5670_if1_adc2_in_src);
  1153. static const struct snd_kcontrol_new rt5670_if1_adc2_in_mux =
  1154. SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5670_if1_adc2_in_enum);
  1155. /* MX-2F [14:12] */
  1156. static const char * const rt5670_if2_adc_in_src[] = {
  1157. "IF_ADC1", "IF_ADC2", "IF_ADC3", "TxDC_DAC", "TxDP_ADC", "VAD_ADC"
  1158. };
  1159. static SOC_ENUM_SINGLE_DECL(rt5670_if2_adc_in_enum, RT5670_DIG_INF1_DATA,
  1160. RT5670_IF2_ADC_IN_SFT, rt5670_if2_adc_in_src);
  1161. static const struct snd_kcontrol_new rt5670_if2_adc_in_mux =
  1162. SOC_DAPM_ENUM("IF2 ADC IN source", rt5670_if2_adc_in_enum);
  1163. /* MX-30 [5:4] */
  1164. static const char * const rt5670_if4_adc_in_src[] = {
  1165. "IF_ADC1", "IF_ADC2", "IF_ADC3"
  1166. };
  1167. static SOC_ENUM_SINGLE_DECL(rt5670_if4_adc_in_enum, RT5670_DIG_INF2_DATA,
  1168. RT5670_IF4_ADC_IN_SFT, rt5670_if4_adc_in_src);
  1169. static const struct snd_kcontrol_new rt5670_if4_adc_in_mux =
  1170. SOC_DAPM_ENUM("IF4 ADC IN source", rt5670_if4_adc_in_enum);
  1171. /* MX-31 [15] [13] [11] [9] */
  1172. static const char * const rt5670_pdm_src[] = {
  1173. "Mono DAC", "Stereo DAC"
  1174. };
  1175. static SOC_ENUM_SINGLE_DECL(rt5670_pdm1_l_enum, RT5670_PDM_OUT_CTRL,
  1176. RT5670_PDM1_L_SFT, rt5670_pdm_src);
  1177. static const struct snd_kcontrol_new rt5670_pdm1_l_mux =
  1178. SOC_DAPM_ENUM("PDM1 L source", rt5670_pdm1_l_enum);
  1179. static SOC_ENUM_SINGLE_DECL(rt5670_pdm1_r_enum, RT5670_PDM_OUT_CTRL,
  1180. RT5670_PDM1_R_SFT, rt5670_pdm_src);
  1181. static const struct snd_kcontrol_new rt5670_pdm1_r_mux =
  1182. SOC_DAPM_ENUM("PDM1 R source", rt5670_pdm1_r_enum);
  1183. static SOC_ENUM_SINGLE_DECL(rt5670_pdm2_l_enum, RT5670_PDM_OUT_CTRL,
  1184. RT5670_PDM2_L_SFT, rt5670_pdm_src);
  1185. static const struct snd_kcontrol_new rt5670_pdm2_l_mux =
  1186. SOC_DAPM_ENUM("PDM2 L source", rt5670_pdm2_l_enum);
  1187. static SOC_ENUM_SINGLE_DECL(rt5670_pdm2_r_enum, RT5670_PDM_OUT_CTRL,
  1188. RT5670_PDM2_R_SFT, rt5670_pdm_src);
  1189. static const struct snd_kcontrol_new rt5670_pdm2_r_mux =
  1190. SOC_DAPM_ENUM("PDM2 R source", rt5670_pdm2_r_enum);
  1191. /* MX-FA [12] */
  1192. static const char * const rt5670_if1_adc1_in1_src[] = {
  1193. "IF_ADC1", "IF1_ADC3"
  1194. };
  1195. static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc1_in1_enum, RT5670_DIG_MISC,
  1196. RT5670_IF1_ADC1_IN1_SFT, rt5670_if1_adc1_in1_src);
  1197. static const struct snd_kcontrol_new rt5670_if1_adc1_in1_mux =
  1198. SOC_DAPM_ENUM("IF1 ADC1 IN1 source", rt5670_if1_adc1_in1_enum);
  1199. /* MX-FA [11] */
  1200. static const char * const rt5670_if1_adc1_in2_src[] = {
  1201. "IF1_ADC1_IN1", "IF1_ADC4"
  1202. };
  1203. static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc1_in2_enum, RT5670_DIG_MISC,
  1204. RT5670_IF1_ADC1_IN2_SFT, rt5670_if1_adc1_in2_src);
  1205. static const struct snd_kcontrol_new rt5670_if1_adc1_in2_mux =
  1206. SOC_DAPM_ENUM("IF1 ADC1 IN2 source", rt5670_if1_adc1_in2_enum);
  1207. /* MX-FA [10] */
  1208. static const char * const rt5670_if1_adc2_in1_src[] = {
  1209. "IF1_ADC2_IN", "IF1_ADC4"
  1210. };
  1211. static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc2_in1_enum, RT5670_DIG_MISC,
  1212. RT5670_IF1_ADC2_IN1_SFT, rt5670_if1_adc2_in1_src);
  1213. static const struct snd_kcontrol_new rt5670_if1_adc2_in1_mux =
  1214. SOC_DAPM_ENUM("IF1 ADC2 IN1 source", rt5670_if1_adc2_in1_enum);
  1215. /* MX-9D [9:8] */
  1216. static const char * const rt5670_vad_adc_src[] = {
  1217. "Sto1 ADC L", "Mono ADC L", "Mono ADC R", "Sto2 ADC L"
  1218. };
  1219. static SOC_ENUM_SINGLE_DECL(rt5670_vad_adc_enum, RT5670_VAD_CTRL4,
  1220. RT5670_VAD_SEL_SFT, rt5670_vad_adc_src);
  1221. static const struct snd_kcontrol_new rt5670_vad_adc_mux =
  1222. SOC_DAPM_ENUM("VAD ADC source", rt5670_vad_adc_enum);
  1223. static int rt5670_hp_power_event(struct snd_soc_dapm_widget *w,
  1224. struct snd_kcontrol *kcontrol, int event)
  1225. {
  1226. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  1227. struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
  1228. switch (event) {
  1229. case SND_SOC_DAPM_POST_PMU:
  1230. regmap_update_bits(rt5670->regmap, RT5670_CHARGE_PUMP,
  1231. RT5670_PM_HP_MASK, RT5670_PM_HP_HV);
  1232. regmap_update_bits(rt5670->regmap, RT5670_GEN_CTRL2,
  1233. 0x0400, 0x0400);
  1234. /* headphone amp power on */
  1235. regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1,
  1236. RT5670_PWR_HA | RT5670_PWR_FV1 |
  1237. RT5670_PWR_FV2, RT5670_PWR_HA |
  1238. RT5670_PWR_FV1 | RT5670_PWR_FV2);
  1239. /* depop parameters */
  1240. regmap_write(rt5670->regmap, RT5670_DEPOP_M2, 0x3100);
  1241. regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8009);
  1242. regmap_write(rt5670->regmap, RT5670_PR_BASE +
  1243. RT5670_HP_DCC_INT1, 0x9f00);
  1244. mdelay(20);
  1245. regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019);
  1246. break;
  1247. case SND_SOC_DAPM_PRE_PMD:
  1248. regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x0004);
  1249. msleep(30);
  1250. break;
  1251. default:
  1252. return 0;
  1253. }
  1254. return 0;
  1255. }
  1256. static int rt5670_hp_event(struct snd_soc_dapm_widget *w,
  1257. struct snd_kcontrol *kcontrol, int event)
  1258. {
  1259. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  1260. struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
  1261. switch (event) {
  1262. case SND_SOC_DAPM_POST_PMU:
  1263. /* headphone unmute sequence */
  1264. regmap_write(rt5670->regmap, RT5670_PR_BASE +
  1265. RT5670_MAMP_INT_REG2, 0xb400);
  1266. regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0772);
  1267. regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x805d);
  1268. regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x831d);
  1269. regmap_update_bits(rt5670->regmap, RT5670_GEN_CTRL2,
  1270. 0x0300, 0x0300);
  1271. regmap_update_bits(rt5670->regmap, RT5670_HP_VOL,
  1272. RT5670_L_MUTE | RT5670_R_MUTE, 0);
  1273. msleep(80);
  1274. regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019);
  1275. break;
  1276. case SND_SOC_DAPM_PRE_PMD:
  1277. /* headphone mute sequence */
  1278. regmap_write(rt5670->regmap, RT5670_PR_BASE +
  1279. RT5670_MAMP_INT_REG2, 0xb400);
  1280. regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0772);
  1281. regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x803d);
  1282. mdelay(10);
  1283. regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x831d);
  1284. mdelay(10);
  1285. regmap_update_bits(rt5670->regmap, RT5670_HP_VOL,
  1286. RT5670_L_MUTE | RT5670_R_MUTE,
  1287. RT5670_L_MUTE | RT5670_R_MUTE);
  1288. msleep(20);
  1289. regmap_update_bits(rt5670->regmap,
  1290. RT5670_GEN_CTRL2, 0x0300, 0x0);
  1291. regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019);
  1292. regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0707);
  1293. regmap_write(rt5670->regmap, RT5670_PR_BASE +
  1294. RT5670_MAMP_INT_REG2, 0xfc00);
  1295. break;
  1296. default:
  1297. return 0;
  1298. }
  1299. return 0;
  1300. }
  1301. static int rt5670_bst1_event(struct snd_soc_dapm_widget *w,
  1302. struct snd_kcontrol *kcontrol, int event)
  1303. {
  1304. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  1305. switch (event) {
  1306. case SND_SOC_DAPM_POST_PMU:
  1307. snd_soc_update_bits(codec, RT5670_PWR_ANLG2,
  1308. RT5670_PWR_BST1_P, RT5670_PWR_BST1_P);
  1309. break;
  1310. case SND_SOC_DAPM_PRE_PMD:
  1311. snd_soc_update_bits(codec, RT5670_PWR_ANLG2,
  1312. RT5670_PWR_BST1_P, 0);
  1313. break;
  1314. default:
  1315. return 0;
  1316. }
  1317. return 0;
  1318. }
  1319. static int rt5670_bst2_event(struct snd_soc_dapm_widget *w,
  1320. struct snd_kcontrol *kcontrol, int event)
  1321. {
  1322. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  1323. switch (event) {
  1324. case SND_SOC_DAPM_POST_PMU:
  1325. snd_soc_update_bits(codec, RT5670_PWR_ANLG2,
  1326. RT5670_PWR_BST2_P, RT5670_PWR_BST2_P);
  1327. break;
  1328. case SND_SOC_DAPM_PRE_PMD:
  1329. snd_soc_update_bits(codec, RT5670_PWR_ANLG2,
  1330. RT5670_PWR_BST2_P, 0);
  1331. break;
  1332. default:
  1333. return 0;
  1334. }
  1335. return 0;
  1336. }
  1337. static const struct snd_soc_dapm_widget rt5670_dapm_widgets[] = {
  1338. SND_SOC_DAPM_SUPPLY("PLL1", RT5670_PWR_ANLG2,
  1339. RT5670_PWR_PLL_BIT, 0, NULL, 0),
  1340. SND_SOC_DAPM_SUPPLY("I2S DSP", RT5670_PWR_DIG2,
  1341. RT5670_PWR_I2S_DSP_BIT, 0, NULL, 0),
  1342. SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5670_PWR_VOL,
  1343. RT5670_PWR_MIC_DET_BIT, 0, NULL, 0),
  1344. /* ASRC */
  1345. SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5670_ASRC_1,
  1346. 11, 0, NULL, 0),
  1347. SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5670_ASRC_1,
  1348. 12, 0, NULL, 0),
  1349. SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5670_ASRC_1,
  1350. 10, 0, NULL, 0),
  1351. SND_SOC_DAPM_SUPPLY_S("DAC MONO L ASRC", 1, RT5670_ASRC_1,
  1352. 9, 0, NULL, 0),
  1353. SND_SOC_DAPM_SUPPLY_S("DAC MONO R ASRC", 1, RT5670_ASRC_1,
  1354. 8, 0, NULL, 0),
  1355. SND_SOC_DAPM_SUPPLY_S("DMIC STO1 ASRC", 1, RT5670_ASRC_1,
  1356. 7, 0, NULL, 0),
  1357. SND_SOC_DAPM_SUPPLY_S("DMIC STO2 ASRC", 1, RT5670_ASRC_1,
  1358. 6, 0, NULL, 0),
  1359. SND_SOC_DAPM_SUPPLY_S("DMIC MONO L ASRC", 1, RT5670_ASRC_1,
  1360. 5, 0, NULL, 0),
  1361. SND_SOC_DAPM_SUPPLY_S("DMIC MONO R ASRC", 1, RT5670_ASRC_1,
  1362. 4, 0, NULL, 0),
  1363. SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5670_ASRC_1,
  1364. 3, 0, NULL, 0),
  1365. SND_SOC_DAPM_SUPPLY_S("ADC STO2 ASRC", 1, RT5670_ASRC_1,
  1366. 2, 0, NULL, 0),
  1367. SND_SOC_DAPM_SUPPLY_S("ADC MONO L ASRC", 1, RT5670_ASRC_1,
  1368. 1, 0, NULL, 0),
  1369. SND_SOC_DAPM_SUPPLY_S("ADC MONO R ASRC", 1, RT5670_ASRC_1,
  1370. 0, 0, NULL, 0),
  1371. /* Input Side */
  1372. /* micbias */
  1373. SND_SOC_DAPM_SUPPLY("MICBIAS1", RT5670_PWR_ANLG2,
  1374. RT5670_PWR_MB1_BIT, 0, NULL, 0),
  1375. /* Input Lines */
  1376. SND_SOC_DAPM_INPUT("DMIC L1"),
  1377. SND_SOC_DAPM_INPUT("DMIC R1"),
  1378. SND_SOC_DAPM_INPUT("DMIC L2"),
  1379. SND_SOC_DAPM_INPUT("DMIC R2"),
  1380. SND_SOC_DAPM_INPUT("DMIC L3"),
  1381. SND_SOC_DAPM_INPUT("DMIC R3"),
  1382. SND_SOC_DAPM_INPUT("IN1P"),
  1383. SND_SOC_DAPM_INPUT("IN1N"),
  1384. SND_SOC_DAPM_INPUT("IN2P"),
  1385. SND_SOC_DAPM_INPUT("IN2N"),
  1386. SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
  1387. SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
  1388. SND_SOC_DAPM_PGA("DMIC3", SND_SOC_NOPM, 0, 0, NULL, 0),
  1389. SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
  1390. set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
  1391. SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5670_DMIC_CTRL1,
  1392. RT5670_DMIC_1_EN_SFT, 0, NULL, 0),
  1393. SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5670_DMIC_CTRL1,
  1394. RT5670_DMIC_2_EN_SFT, 0, NULL, 0),
  1395. SND_SOC_DAPM_SUPPLY("DMIC3 Power", RT5670_DMIC_CTRL1,
  1396. RT5670_DMIC_3_EN_SFT, 0, NULL, 0),
  1397. /* Boost */
  1398. SND_SOC_DAPM_PGA_E("BST1", RT5670_PWR_ANLG2, RT5670_PWR_BST1_BIT,
  1399. 0, NULL, 0, rt5670_bst1_event,
  1400. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
  1401. SND_SOC_DAPM_PGA_E("BST2", RT5670_PWR_ANLG2, RT5670_PWR_BST2_BIT,
  1402. 0, NULL, 0, rt5670_bst2_event,
  1403. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
  1404. /* Input Volume */
  1405. SND_SOC_DAPM_PGA("INL VOL", RT5670_PWR_VOL,
  1406. RT5670_PWR_IN_L_BIT, 0, NULL, 0),
  1407. SND_SOC_DAPM_PGA("INR VOL", RT5670_PWR_VOL,
  1408. RT5670_PWR_IN_R_BIT, 0, NULL, 0),
  1409. /* REC Mixer */
  1410. SND_SOC_DAPM_MIXER("RECMIXL", RT5670_PWR_MIXER, RT5670_PWR_RM_L_BIT, 0,
  1411. rt5670_rec_l_mix, ARRAY_SIZE(rt5670_rec_l_mix)),
  1412. SND_SOC_DAPM_MIXER("RECMIXR", RT5670_PWR_MIXER, RT5670_PWR_RM_R_BIT, 0,
  1413. rt5670_rec_r_mix, ARRAY_SIZE(rt5670_rec_r_mix)),
  1414. /* ADCs */
  1415. SND_SOC_DAPM_ADC("ADC 1", NULL, SND_SOC_NOPM, 0, 0),
  1416. SND_SOC_DAPM_ADC("ADC 2", NULL, SND_SOC_NOPM, 0, 0),
  1417. SND_SOC_DAPM_PGA("ADC 1_2", SND_SOC_NOPM, 0, 0, NULL, 0),
  1418. SND_SOC_DAPM_SUPPLY("ADC 1 power", RT5670_PWR_DIG1,
  1419. RT5670_PWR_ADC_L_BIT, 0, NULL, 0),
  1420. SND_SOC_DAPM_SUPPLY("ADC 2 power", RT5670_PWR_DIG1,
  1421. RT5670_PWR_ADC_R_BIT, 0, NULL, 0),
  1422. SND_SOC_DAPM_SUPPLY("ADC clock", RT5670_PR_BASE +
  1423. RT5670_CHOP_DAC_ADC, 12, 0, NULL, 0),
  1424. /* ADC Mux */
  1425. SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0,
  1426. &rt5670_sto1_dmic_mux),
  1427. SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
  1428. &rt5670_sto_adc_l2_mux),
  1429. SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
  1430. &rt5670_sto_adc_r2_mux),
  1431. SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
  1432. &rt5670_sto_adc_l1_mux),
  1433. SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
  1434. &rt5670_sto_adc_r1_mux),
  1435. SND_SOC_DAPM_MUX("Stereo2 DMIC Mux", SND_SOC_NOPM, 0, 0,
  1436. &rt5670_sto2_dmic_mux),
  1437. SND_SOC_DAPM_MUX("Stereo2 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
  1438. &rt5670_sto2_adc_l2_mux),
  1439. SND_SOC_DAPM_MUX("Stereo2 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
  1440. &rt5670_sto2_adc_r2_mux),
  1441. SND_SOC_DAPM_MUX("Stereo2 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
  1442. &rt5670_sto2_adc_l1_mux),
  1443. SND_SOC_DAPM_MUX("Stereo2 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
  1444. &rt5670_sto2_adc_r1_mux),
  1445. SND_SOC_DAPM_MUX("Stereo2 ADC LR Mux", SND_SOC_NOPM, 0, 0,
  1446. &rt5670_sto2_adc_lr_mux),
  1447. SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0,
  1448. &rt5670_mono_dmic_l_mux),
  1449. SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0,
  1450. &rt5670_mono_dmic_r_mux),
  1451. SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
  1452. &rt5670_mono_adc_l2_mux),
  1453. SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
  1454. &rt5670_mono_adc_l1_mux),
  1455. SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
  1456. &rt5670_mono_adc_r1_mux),
  1457. SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
  1458. &rt5670_mono_adc_r2_mux),
  1459. /* ADC Mixer */
  1460. SND_SOC_DAPM_SUPPLY("ADC Stereo1 Filter", RT5670_PWR_DIG2,
  1461. RT5670_PWR_ADC_S1F_BIT, 0, NULL, 0),
  1462. SND_SOC_DAPM_SUPPLY("ADC Stereo2 Filter", RT5670_PWR_DIG2,
  1463. RT5670_PWR_ADC_S2F_BIT, 0, NULL, 0),
  1464. SND_SOC_DAPM_MIXER("Sto1 ADC MIXL", RT5670_STO1_ADC_DIG_VOL,
  1465. RT5670_L_MUTE_SFT, 1, rt5670_sto1_adc_l_mix,
  1466. ARRAY_SIZE(rt5670_sto1_adc_l_mix)),
  1467. SND_SOC_DAPM_MIXER("Sto1 ADC MIXR", RT5670_STO1_ADC_DIG_VOL,
  1468. RT5670_R_MUTE_SFT, 1, rt5670_sto1_adc_r_mix,
  1469. ARRAY_SIZE(rt5670_sto1_adc_r_mix)),
  1470. SND_SOC_DAPM_MIXER("Sto2 ADC MIXL", SND_SOC_NOPM, 0, 0,
  1471. rt5670_sto2_adc_l_mix,
  1472. ARRAY_SIZE(rt5670_sto2_adc_l_mix)),
  1473. SND_SOC_DAPM_MIXER("Sto2 ADC MIXR", SND_SOC_NOPM, 0, 0,
  1474. rt5670_sto2_adc_r_mix,
  1475. ARRAY_SIZE(rt5670_sto2_adc_r_mix)),
  1476. SND_SOC_DAPM_SUPPLY("ADC Mono Left Filter", RT5670_PWR_DIG2,
  1477. RT5670_PWR_ADC_MF_L_BIT, 0, NULL, 0),
  1478. SND_SOC_DAPM_MIXER("Mono ADC MIXL", RT5670_MONO_ADC_DIG_VOL,
  1479. RT5670_L_MUTE_SFT, 1, rt5670_mono_adc_l_mix,
  1480. ARRAY_SIZE(rt5670_mono_adc_l_mix)),
  1481. SND_SOC_DAPM_SUPPLY("ADC Mono Right Filter", RT5670_PWR_DIG2,
  1482. RT5670_PWR_ADC_MF_R_BIT, 0, NULL, 0),
  1483. SND_SOC_DAPM_MIXER("Mono ADC MIXR", RT5670_MONO_ADC_DIG_VOL,
  1484. RT5670_R_MUTE_SFT, 1, rt5670_mono_adc_r_mix,
  1485. ARRAY_SIZE(rt5670_mono_adc_r_mix)),
  1486. /* ADC PGA */
  1487. SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
  1488. SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
  1489. SND_SOC_DAPM_PGA("Stereo2 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
  1490. SND_SOC_DAPM_PGA("Stereo2 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
  1491. SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
  1492. SND_SOC_DAPM_PGA("Stereo1 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
  1493. SND_SOC_DAPM_PGA("Stereo2 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
  1494. SND_SOC_DAPM_PGA("Mono ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
  1495. SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
  1496. SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
  1497. SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
  1498. SND_SOC_DAPM_PGA("IF_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
  1499. SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
  1500. SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
  1501. SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
  1502. SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM, 0, 0, NULL, 0),
  1503. /* DSP */
  1504. SND_SOC_DAPM_PGA("TxDP_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
  1505. SND_SOC_DAPM_PGA("TxDP_ADC_L", SND_SOC_NOPM, 0, 0, NULL, 0),
  1506. SND_SOC_DAPM_PGA("TxDP_ADC_R", SND_SOC_NOPM, 0, 0, NULL, 0),
  1507. SND_SOC_DAPM_PGA("TxDC_DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
  1508. SND_SOC_DAPM_MUX("TDM Data Mux", SND_SOC_NOPM, 0, 0,
  1509. &rt5670_txdp_slot_mux),
  1510. SND_SOC_DAPM_MUX("DSP UL Mux", SND_SOC_NOPM, 0, 0,
  1511. &rt5670_dsp_ul_mux),
  1512. SND_SOC_DAPM_MUX("DSP DL Mux", SND_SOC_NOPM, 0, 0,
  1513. &rt5670_dsp_dl_mux),
  1514. SND_SOC_DAPM_MUX("RxDP Mux", SND_SOC_NOPM, 0, 0,
  1515. &rt5670_rxdp_mux),
  1516. /* IF2 Mux */
  1517. SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM, 0, 0,
  1518. &rt5670_if2_adc_in_mux),
  1519. /* Digital Interface */
  1520. SND_SOC_DAPM_SUPPLY("I2S1", RT5670_PWR_DIG1,
  1521. RT5670_PWR_I2S1_BIT, 0, NULL, 0),
  1522. SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
  1523. SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
  1524. SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0),
  1525. SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0),
  1526. SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0),
  1527. SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0),
  1528. SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
  1529. SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
  1530. SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
  1531. SND_SOC_DAPM_SUPPLY("I2S2", RT5670_PWR_DIG1,
  1532. RT5670_PWR_I2S2_BIT, 0, NULL, 0),
  1533. SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
  1534. SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
  1535. SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
  1536. SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
  1537. SND_SOC_DAPM_PGA("IF2 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
  1538. SND_SOC_DAPM_PGA("IF2 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
  1539. /* Digital Interface Select */
  1540. SND_SOC_DAPM_MUX("IF1 ADC1 IN1 Mux", SND_SOC_NOPM, 0, 0,
  1541. &rt5670_if1_adc1_in1_mux),
  1542. SND_SOC_DAPM_MUX("IF1 ADC1 IN2 Mux", SND_SOC_NOPM, 0, 0,
  1543. &rt5670_if1_adc1_in2_mux),
  1544. SND_SOC_DAPM_MUX("IF1 ADC2 IN Mux", SND_SOC_NOPM, 0, 0,
  1545. &rt5670_if1_adc2_in_mux),
  1546. SND_SOC_DAPM_MUX("IF1 ADC2 IN1 Mux", SND_SOC_NOPM, 0, 0,
  1547. &rt5670_if1_adc2_in1_mux),
  1548. SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM, 0, 0,
  1549. &rt5670_vad_adc_mux),
  1550. /* Audio Interface */
  1551. SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
  1552. SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
  1553. SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
  1554. SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0,
  1555. RT5670_GPIO_CTRL1, RT5670_I2S2_PIN_SFT, 1),
  1556. /* Audio DSP */
  1557. SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
  1558. /* Output Side */
  1559. /* DAC mixer before sound effect */
  1560. SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0,
  1561. rt5670_dac_l_mix, ARRAY_SIZE(rt5670_dac_l_mix)),
  1562. SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0,
  1563. rt5670_dac_r_mix, ARRAY_SIZE(rt5670_dac_r_mix)),
  1564. SND_SOC_DAPM_PGA("DAC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
  1565. /* DAC2 channel Mux */
  1566. SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0,
  1567. &rt5670_dac_l2_mux),
  1568. SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0,
  1569. &rt5670_dac_r2_mux),
  1570. SND_SOC_DAPM_PGA("DAC L2 Volume", RT5670_PWR_DIG1,
  1571. RT5670_PWR_DAC_L2_BIT, 0, NULL, 0),
  1572. SND_SOC_DAPM_PGA("DAC R2 Volume", RT5670_PWR_DIG1,
  1573. RT5670_PWR_DAC_R2_BIT, 0, NULL, 0),
  1574. SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM, 0, 0, &rt5670_dac1l_mux),
  1575. SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM, 0, 0, &rt5670_dac1r_mux),
  1576. /* DAC Mixer */
  1577. SND_SOC_DAPM_SUPPLY("DAC Stereo1 Filter", RT5670_PWR_DIG2,
  1578. RT5670_PWR_DAC_S1F_BIT, 0, NULL, 0),
  1579. SND_SOC_DAPM_SUPPLY("DAC Mono Left Filter", RT5670_PWR_DIG2,
  1580. RT5670_PWR_DAC_MF_L_BIT, 0, NULL, 0),
  1581. SND_SOC_DAPM_SUPPLY("DAC Mono Right Filter", RT5670_PWR_DIG2,
  1582. RT5670_PWR_DAC_MF_R_BIT, 0, NULL, 0),
  1583. SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
  1584. rt5670_sto_dac_l_mix,
  1585. ARRAY_SIZE(rt5670_sto_dac_l_mix)),
  1586. SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
  1587. rt5670_sto_dac_r_mix,
  1588. ARRAY_SIZE(rt5670_sto_dac_r_mix)),
  1589. SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
  1590. rt5670_mono_dac_l_mix,
  1591. ARRAY_SIZE(rt5670_mono_dac_l_mix)),
  1592. SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
  1593. rt5670_mono_dac_r_mix,
  1594. ARRAY_SIZE(rt5670_mono_dac_r_mix)),
  1595. SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
  1596. rt5670_dig_l_mix,
  1597. ARRAY_SIZE(rt5670_dig_l_mix)),
  1598. SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
  1599. rt5670_dig_r_mix,
  1600. ARRAY_SIZE(rt5670_dig_r_mix)),
  1601. /* DACs */
  1602. SND_SOC_DAPM_SUPPLY("DAC L1 Power", RT5670_PWR_DIG1,
  1603. RT5670_PWR_DAC_L1_BIT, 0, NULL, 0),
  1604. SND_SOC_DAPM_SUPPLY("DAC R1 Power", RT5670_PWR_DIG1,
  1605. RT5670_PWR_DAC_R1_BIT, 0, NULL, 0),
  1606. SND_SOC_DAPM_DAC("DAC L1", NULL, SND_SOC_NOPM, 0, 0),
  1607. SND_SOC_DAPM_DAC("DAC R1", NULL, SND_SOC_NOPM, 0, 0),
  1608. SND_SOC_DAPM_DAC("DAC L2", NULL, RT5670_PWR_DIG1,
  1609. RT5670_PWR_DAC_L2_BIT, 0),
  1610. SND_SOC_DAPM_DAC("DAC R2", NULL, RT5670_PWR_DIG1,
  1611. RT5670_PWR_DAC_R2_BIT, 0),
  1612. /* OUT Mixer */
  1613. SND_SOC_DAPM_MIXER("OUT MIXL", RT5670_PWR_MIXER, RT5670_PWR_OM_L_BIT,
  1614. 0, rt5670_out_l_mix, ARRAY_SIZE(rt5670_out_l_mix)),
  1615. SND_SOC_DAPM_MIXER("OUT MIXR", RT5670_PWR_MIXER, RT5670_PWR_OM_R_BIT,
  1616. 0, rt5670_out_r_mix, ARRAY_SIZE(rt5670_out_r_mix)),
  1617. /* Ouput Volume */
  1618. SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5670_PWR_VOL,
  1619. RT5670_PWR_HV_L_BIT, 0,
  1620. rt5670_hpvoll_mix, ARRAY_SIZE(rt5670_hpvoll_mix)),
  1621. SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5670_PWR_VOL,
  1622. RT5670_PWR_HV_R_BIT, 0,
  1623. rt5670_hpvolr_mix, ARRAY_SIZE(rt5670_hpvolr_mix)),
  1624. SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, 0, 0, NULL, 0),
  1625. SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, 0, 0, NULL, 0),
  1626. SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, 0, 0, NULL, 0),
  1627. /* HPO/LOUT/Mono Mixer */
  1628. SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0,
  1629. rt5670_hpo_mix, ARRAY_SIZE(rt5670_hpo_mix)),
  1630. SND_SOC_DAPM_MIXER("LOUT MIX", RT5670_PWR_ANLG1, RT5670_PWR_LM_BIT,
  1631. 0, rt5670_lout_mix, ARRAY_SIZE(rt5670_lout_mix)),
  1632. SND_SOC_DAPM_SUPPLY_S("Improve HP Amp Drv", 1, SND_SOC_NOPM, 0, 0,
  1633. rt5670_hp_power_event, SND_SOC_DAPM_POST_PMU |
  1634. SND_SOC_DAPM_PRE_PMD),
  1635. SND_SOC_DAPM_SUPPLY("HP L Amp", RT5670_PWR_ANLG1,
  1636. RT5670_PWR_HP_L_BIT, 0, NULL, 0),
  1637. SND_SOC_DAPM_SUPPLY("HP R Amp", RT5670_PWR_ANLG1,
  1638. RT5670_PWR_HP_R_BIT, 0, NULL, 0),
  1639. SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0,
  1640. rt5670_hp_event, SND_SOC_DAPM_PRE_PMD |
  1641. SND_SOC_DAPM_POST_PMU),
  1642. SND_SOC_DAPM_SWITCH("LOUT L Playback", SND_SOC_NOPM, 0, 0,
  1643. &lout_l_enable_control),
  1644. SND_SOC_DAPM_SWITCH("LOUT R Playback", SND_SOC_NOPM, 0, 0,
  1645. &lout_r_enable_control),
  1646. SND_SOC_DAPM_PGA("LOUT Amp", SND_SOC_NOPM, 0, 0, NULL, 0),
  1647. /* PDM */
  1648. SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5670_PWR_DIG2,
  1649. RT5670_PWR_PDM1_BIT, 0, NULL, 0),
  1650. SND_SOC_DAPM_MUX("PDM1 L Mux", RT5670_PDM_OUT_CTRL,
  1651. RT5670_M_PDM1_L_SFT, 1, &rt5670_pdm1_l_mux),
  1652. SND_SOC_DAPM_MUX("PDM1 R Mux", RT5670_PDM_OUT_CTRL,
  1653. RT5670_M_PDM1_R_SFT, 1, &rt5670_pdm1_r_mux),
  1654. /* Output Lines */
  1655. SND_SOC_DAPM_OUTPUT("HPOL"),
  1656. SND_SOC_DAPM_OUTPUT("HPOR"),
  1657. SND_SOC_DAPM_OUTPUT("LOUTL"),
  1658. SND_SOC_DAPM_OUTPUT("LOUTR"),
  1659. };
  1660. static const struct snd_soc_dapm_widget rt5670_specific_dapm_widgets[] = {
  1661. SND_SOC_DAPM_SUPPLY("PDM2 Power", RT5670_PWR_DIG2,
  1662. RT5670_PWR_PDM2_BIT, 0, NULL, 0),
  1663. SND_SOC_DAPM_MUX("PDM2 L Mux", RT5670_PDM_OUT_CTRL,
  1664. RT5670_M_PDM2_L_SFT, 1, &rt5670_pdm2_l_mux),
  1665. SND_SOC_DAPM_MUX("PDM2 R Mux", RT5670_PDM_OUT_CTRL,
  1666. RT5670_M_PDM2_R_SFT, 1, &rt5670_pdm2_r_mux),
  1667. SND_SOC_DAPM_OUTPUT("PDM1L"),
  1668. SND_SOC_DAPM_OUTPUT("PDM1R"),
  1669. SND_SOC_DAPM_OUTPUT("PDM2L"),
  1670. SND_SOC_DAPM_OUTPUT("PDM2R"),
  1671. };
  1672. static const struct snd_soc_dapm_widget rt5672_specific_dapm_widgets[] = {
  1673. SND_SOC_DAPM_PGA("SPO Amp", SND_SOC_NOPM, 0, 0, NULL, 0),
  1674. SND_SOC_DAPM_OUTPUT("SPOLP"),
  1675. SND_SOC_DAPM_OUTPUT("SPOLN"),
  1676. SND_SOC_DAPM_OUTPUT("SPORP"),
  1677. SND_SOC_DAPM_OUTPUT("SPORN"),
  1678. };
  1679. static const struct snd_soc_dapm_route rt5670_dapm_routes[] = {
  1680. { "ADC Stereo1 Filter", NULL, "ADC STO1 ASRC", is_using_asrc },
  1681. { "ADC Stereo2 Filter", NULL, "ADC STO2 ASRC", is_using_asrc },
  1682. { "ADC Mono Left Filter", NULL, "ADC MONO L ASRC", is_using_asrc },
  1683. { "ADC Mono Right Filter", NULL, "ADC MONO R ASRC", is_using_asrc },
  1684. { "DAC Mono Left Filter", NULL, "DAC MONO L ASRC", is_using_asrc },
  1685. { "DAC Mono Right Filter", NULL, "DAC MONO R ASRC", is_using_asrc },
  1686. { "DAC Stereo1 Filter", NULL, "DAC STO ASRC", is_using_asrc },
  1687. { "Stereo1 DMIC Mux", NULL, "DMIC STO1 ASRC", can_use_asrc },
  1688. { "Stereo2 DMIC Mux", NULL, "DMIC STO2 ASRC", can_use_asrc },
  1689. { "Mono DMIC L Mux", NULL, "DMIC MONO L ASRC", can_use_asrc },
  1690. { "Mono DMIC R Mux", NULL, "DMIC MONO R ASRC", can_use_asrc },
  1691. { "I2S1", NULL, "I2S1 ASRC", can_use_asrc},
  1692. { "I2S2", NULL, "I2S2 ASRC", can_use_asrc},
  1693. { "DMIC1", NULL, "DMIC L1" },
  1694. { "DMIC1", NULL, "DMIC R1" },
  1695. { "DMIC2", NULL, "DMIC L2" },
  1696. { "DMIC2", NULL, "DMIC R2" },
  1697. { "DMIC3", NULL, "DMIC L3" },
  1698. { "DMIC3", NULL, "DMIC R3" },
  1699. { "BST1", NULL, "IN1P" },
  1700. { "BST1", NULL, "IN1N" },
  1701. { "BST1", NULL, "Mic Det Power" },
  1702. { "BST2", NULL, "IN2P" },
  1703. { "BST2", NULL, "IN2N" },
  1704. { "INL VOL", NULL, "IN2P" },
  1705. { "INR VOL", NULL, "IN2N" },
  1706. { "RECMIXL", "INL Switch", "INL VOL" },
  1707. { "RECMIXL", "BST2 Switch", "BST2" },
  1708. { "RECMIXL", "BST1 Switch", "BST1" },
  1709. { "RECMIXR", "INR Switch", "INR VOL" },
  1710. { "RECMIXR", "BST2 Switch", "BST2" },
  1711. { "RECMIXR", "BST1 Switch", "BST1" },
  1712. { "ADC 1", NULL, "RECMIXL" },
  1713. { "ADC 1", NULL, "ADC 1 power" },
  1714. { "ADC 1", NULL, "ADC clock" },
  1715. { "ADC 2", NULL, "RECMIXR" },
  1716. { "ADC 2", NULL, "ADC 2 power" },
  1717. { "ADC 2", NULL, "ADC clock" },
  1718. { "DMIC L1", NULL, "DMIC CLK" },
  1719. { "DMIC L1", NULL, "DMIC1 Power" },
  1720. { "DMIC R1", NULL, "DMIC CLK" },
  1721. { "DMIC R1", NULL, "DMIC1 Power" },
  1722. { "DMIC L2", NULL, "DMIC CLK" },
  1723. { "DMIC L2", NULL, "DMIC2 Power" },
  1724. { "DMIC R2", NULL, "DMIC CLK" },
  1725. { "DMIC R2", NULL, "DMIC2 Power" },
  1726. { "DMIC L3", NULL, "DMIC CLK" },
  1727. { "DMIC L3", NULL, "DMIC3 Power" },
  1728. { "DMIC R3", NULL, "DMIC CLK" },
  1729. { "DMIC R3", NULL, "DMIC3 Power" },
  1730. { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" },
  1731. { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" },
  1732. { "Stereo1 DMIC Mux", "DMIC3", "DMIC3" },
  1733. { "Stereo2 DMIC Mux", "DMIC1", "DMIC1" },
  1734. { "Stereo2 DMIC Mux", "DMIC2", "DMIC2" },
  1735. { "Stereo2 DMIC Mux", "DMIC3", "DMIC3" },
  1736. { "Mono DMIC L Mux", "DMIC1", "DMIC L1" },
  1737. { "Mono DMIC L Mux", "DMIC2", "DMIC L2" },
  1738. { "Mono DMIC L Mux", "DMIC3", "DMIC L3" },
  1739. { "Mono DMIC R Mux", "DMIC1", "DMIC R1" },
  1740. { "Mono DMIC R Mux", "DMIC2", "DMIC R2" },
  1741. { "Mono DMIC R Mux", "DMIC3", "DMIC R3" },
  1742. { "ADC 1_2", NULL, "ADC 1" },
  1743. { "ADC 1_2", NULL, "ADC 2" },
  1744. { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" },
  1745. { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
  1746. { "Stereo1 ADC L1 Mux", "ADC", "ADC 1_2" },
  1747. { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
  1748. { "Stereo1 ADC R1 Mux", "ADC", "ADC 1_2" },
  1749. { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
  1750. { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" },
  1751. { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
  1752. { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
  1753. { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
  1754. { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
  1755. { "Mono ADC L1 Mux", "ADC1", "ADC 1" },
  1756. { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
  1757. { "Mono ADC R1 Mux", "ADC2", "ADC 2" },
  1758. { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
  1759. { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
  1760. { "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" },
  1761. { "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
  1762. { "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" },
  1763. { "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
  1764. { "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" },
  1765. { "Stereo1 ADC MIXL", NULL, "ADC Stereo1 Filter" },
  1766. { "ADC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll },
  1767. { "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" },
  1768. { "Stereo1 ADC MIXR", NULL, "ADC Stereo1 Filter" },
  1769. { "ADC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll },
  1770. { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
  1771. { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
  1772. { "Mono ADC MIXL", NULL, "ADC Mono Left Filter" },
  1773. { "ADC Mono Left Filter", NULL, "PLL1", is_sys_clk_from_pll },
  1774. { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
  1775. { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
  1776. { "Mono ADC MIXR", NULL, "ADC Mono Right Filter" },
  1777. { "ADC Mono Right Filter", NULL, "PLL1", is_sys_clk_from_pll },
  1778. { "Stereo2 ADC L2 Mux", "DMIC", "Stereo2 DMIC Mux" },
  1779. { "Stereo2 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
  1780. { "Stereo2 ADC L1 Mux", "ADC", "ADC 1_2" },
  1781. { "Stereo2 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
  1782. { "Stereo2 ADC R1 Mux", "ADC", "ADC 1_2" },
  1783. { "Stereo2 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
  1784. { "Stereo2 ADC R2 Mux", "DMIC", "Stereo2 DMIC Mux" },
  1785. { "Stereo2 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
  1786. { "Sto2 ADC MIXL", "ADC1 Switch", "Stereo2 ADC L1 Mux" },
  1787. { "Sto2 ADC MIXL", "ADC2 Switch", "Stereo2 ADC L2 Mux" },
  1788. { "Sto2 ADC MIXR", "ADC1 Switch", "Stereo2 ADC R1 Mux" },
  1789. { "Sto2 ADC MIXR", "ADC2 Switch", "Stereo2 ADC R2 Mux" },
  1790. { "Sto2 ADC LR MIX", NULL, "Sto2 ADC MIXL" },
  1791. { "Sto2 ADC LR MIX", NULL, "Sto2 ADC MIXR" },
  1792. { "Stereo2 ADC LR Mux", "L", "Sto2 ADC MIXL" },
  1793. { "Stereo2 ADC LR Mux", "LR", "Sto2 ADC LR MIX" },
  1794. { "Stereo2 ADC MIXL", NULL, "Stereo2 ADC LR Mux" },
  1795. { "Stereo2 ADC MIXL", NULL, "ADC Stereo2 Filter" },
  1796. { "ADC Stereo2 Filter", NULL, "PLL1", is_sys_clk_from_pll },
  1797. { "Stereo2 ADC MIXR", NULL, "Sto2 ADC MIXR" },
  1798. { "Stereo2 ADC MIXR", NULL, "ADC Stereo2 Filter" },
  1799. { "ADC Stereo2 Filter", NULL, "PLL1", is_sys_clk_from_pll },
  1800. { "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" },
  1801. { "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" },
  1802. { "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" },
  1803. { "VAD ADC Mux", "Sto2 ADC L", "Sto2 ADC MIXL" },
  1804. { "VAD_ADC", NULL, "VAD ADC Mux" },
  1805. { "IF_ADC1", NULL, "Stereo1 ADC MIXL" },
  1806. { "IF_ADC1", NULL, "Stereo1 ADC MIXR" },
  1807. { "IF_ADC2", NULL, "Mono ADC MIXL" },
  1808. { "IF_ADC2", NULL, "Mono ADC MIXR" },
  1809. { "IF_ADC3", NULL, "Stereo2 ADC MIXL" },
  1810. { "IF_ADC3", NULL, "Stereo2 ADC MIXR" },
  1811. { "IF1 ADC1 IN1 Mux", "IF_ADC1", "IF_ADC1" },
  1812. { "IF1 ADC1 IN1 Mux", "IF1_ADC3", "IF1_ADC3" },
  1813. { "IF1 ADC1 IN2 Mux", "IF1_ADC1_IN1", "IF1 ADC1 IN1 Mux" },
  1814. { "IF1 ADC1 IN2 Mux", "IF1_ADC4", "IF1_ADC4" },
  1815. { "IF1 ADC2 IN Mux", "IF_ADC2", "IF_ADC2" },
  1816. { "IF1 ADC2 IN Mux", "VAD_ADC", "VAD_ADC" },
  1817. { "IF1 ADC2 IN1 Mux", "IF1_ADC2_IN", "IF1 ADC2 IN Mux" },
  1818. { "IF1 ADC2 IN1 Mux", "IF1_ADC4", "IF1_ADC4" },
  1819. { "IF1_ADC1" , NULL, "IF1 ADC1 IN2 Mux" },
  1820. { "IF1_ADC2" , NULL, "IF1 ADC2 IN1 Mux" },
  1821. { "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXL" },
  1822. { "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXR" },
  1823. { "Stereo2 ADC MIX", NULL, "Sto2 ADC MIXL" },
  1824. { "Stereo2 ADC MIX", NULL, "Sto2 ADC MIXR" },
  1825. { "Mono ADC MIX", NULL, "Mono ADC MIXL" },
  1826. { "Mono ADC MIX", NULL, "Mono ADC MIXR" },
  1827. { "RxDP Mux", "IF2 DAC", "IF2 DAC" },
  1828. { "RxDP Mux", "IF1 DAC", "IF1 DAC2" },
  1829. { "RxDP Mux", "STO1 ADC Mixer", "Stereo1 ADC MIX" },
  1830. { "RxDP Mux", "STO2 ADC Mixer", "Stereo2 ADC MIX" },
  1831. { "RxDP Mux", "Mono ADC Mixer L", "Mono ADC MIXL" },
  1832. { "RxDP Mux", "Mono ADC Mixer R", "Mono ADC MIXR" },
  1833. { "RxDP Mux", "DAC1", "DAC MIX" },
  1834. { "TDM Data Mux", "Slot 0-1", "Stereo1 ADC MIX" },
  1835. { "TDM Data Mux", "Slot 2-3", "Mono ADC MIX" },
  1836. { "TDM Data Mux", "Slot 4-5", "Stereo2 ADC MIX" },
  1837. { "TDM Data Mux", "Slot 6-7", "IF2 DAC" },
  1838. { "DSP UL Mux", "Bypass", "TDM Data Mux" },
  1839. { "DSP UL Mux", NULL, "I2S DSP" },
  1840. { "DSP DL Mux", "Bypass", "RxDP Mux" },
  1841. { "DSP DL Mux", NULL, "I2S DSP" },
  1842. { "TxDP_ADC_L", NULL, "DSP UL Mux" },
  1843. { "TxDP_ADC_R", NULL, "DSP UL Mux" },
  1844. { "TxDC_DAC", NULL, "DSP DL Mux" },
  1845. { "TxDP_ADC", NULL, "TxDP_ADC_L" },
  1846. { "TxDP_ADC", NULL, "TxDP_ADC_R" },
  1847. { "IF1 ADC", NULL, "I2S1" },
  1848. { "IF1 ADC", NULL, "IF1_ADC1" },
  1849. { "IF1 ADC", NULL, "IF1_ADC2" },
  1850. { "IF1 ADC", NULL, "IF_ADC3" },
  1851. { "IF1 ADC", NULL, "TxDP_ADC" },
  1852. { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" },
  1853. { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" },
  1854. { "IF2 ADC Mux", "IF_ADC3", "IF_ADC3" },
  1855. { "IF2 ADC Mux", "TxDC_DAC", "TxDC_DAC" },
  1856. { "IF2 ADC Mux", "TxDP_ADC", "TxDP_ADC" },
  1857. { "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" },
  1858. { "IF2 ADC L", NULL, "IF2 ADC Mux" },
  1859. { "IF2 ADC R", NULL, "IF2 ADC Mux" },
  1860. { "IF2 ADC", NULL, "I2S2" },
  1861. { "IF2 ADC", NULL, "IF2 ADC L" },
  1862. { "IF2 ADC", NULL, "IF2 ADC R" },
  1863. { "AIF1TX", NULL, "IF1 ADC" },
  1864. { "AIF2TX", NULL, "IF2 ADC" },
  1865. { "IF1 DAC1", NULL, "AIF1RX" },
  1866. { "IF1 DAC2", NULL, "AIF1RX" },
  1867. { "IF2 DAC", NULL, "AIF2RX" },
  1868. { "IF1 DAC1", NULL, "I2S1" },
  1869. { "IF1 DAC2", NULL, "I2S1" },
  1870. { "IF2 DAC", NULL, "I2S2" },
  1871. { "IF1 DAC2 L", NULL, "IF1 DAC2" },
  1872. { "IF1 DAC2 R", NULL, "IF1 DAC2" },
  1873. { "IF1 DAC1 L", NULL, "IF1 DAC1" },
  1874. { "IF1 DAC1 R", NULL, "IF1 DAC1" },
  1875. { "IF2 DAC L", NULL, "IF2 DAC" },
  1876. { "IF2 DAC R", NULL, "IF2 DAC" },
  1877. { "DAC1 L Mux", "IF1 DAC", "IF1 DAC1 L" },
  1878. { "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" },
  1879. { "DAC1 R Mux", "IF1 DAC", "IF1 DAC1 R" },
  1880. { "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" },
  1881. { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" },
  1882. { "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" },
  1883. { "DAC1 MIXL", NULL, "DAC Stereo1 Filter" },
  1884. { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" },
  1885. { "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" },
  1886. { "DAC1 MIXR", NULL, "DAC Stereo1 Filter" },
  1887. { "DAC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll },
  1888. { "DAC Mono Left Filter", NULL, "PLL1", is_sys_clk_from_pll },
  1889. { "DAC Mono Right Filter", NULL, "PLL1", is_sys_clk_from_pll },
  1890. { "DAC MIX", NULL, "DAC1 MIXL" },
  1891. { "DAC MIX", NULL, "DAC1 MIXR" },
  1892. { "Audio DSP", NULL, "DAC1 MIXL" },
  1893. { "Audio DSP", NULL, "DAC1 MIXR" },
  1894. { "DAC L2 Mux", "IF1 DAC", "IF1 DAC2 L" },
  1895. { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" },
  1896. { "DAC L2 Mux", "TxDC DAC", "TxDC_DAC" },
  1897. { "DAC L2 Mux", "VAD_ADC", "VAD_ADC" },
  1898. { "DAC L2 Volume", NULL, "DAC L2 Mux" },
  1899. { "DAC L2 Volume", NULL, "DAC Mono Left Filter" },
  1900. { "DAC R2 Mux", "IF1 DAC", "IF1 DAC2 R" },
  1901. { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" },
  1902. { "DAC R2 Mux", "TxDC DAC", "TxDC_DAC" },
  1903. { "DAC R2 Mux", "TxDP ADC", "TxDP_ADC" },
  1904. { "DAC R2 Volume", NULL, "DAC R2 Mux" },
  1905. { "DAC R2 Volume", NULL, "DAC Mono Right Filter" },
  1906. { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
  1907. { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
  1908. { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
  1909. { "Stereo DAC MIXL", NULL, "DAC Stereo1 Filter" },
  1910. { "Stereo DAC MIXL", NULL, "DAC L1 Power" },
  1911. { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
  1912. { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
  1913. { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
  1914. { "Stereo DAC MIXR", NULL, "DAC Stereo1 Filter" },
  1915. { "Stereo DAC MIXR", NULL, "DAC R1 Power" },
  1916. { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
  1917. { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
  1918. { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
  1919. { "Mono DAC MIXL", NULL, "DAC Mono Left Filter" },
  1920. { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
  1921. { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
  1922. { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
  1923. { "Mono DAC MIXR", NULL, "DAC Mono Right Filter" },
  1924. { "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" },
  1925. { "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
  1926. { "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
  1927. { "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" },
  1928. { "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
  1929. { "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
  1930. { "DAC L1", NULL, "DAC L1 Power" },
  1931. { "DAC L1", NULL, "Stereo DAC MIXL" },
  1932. { "DAC R1", NULL, "DAC R1 Power" },
  1933. { "DAC R1", NULL, "Stereo DAC MIXR" },
  1934. { "DAC L2", NULL, "Mono DAC MIXL" },
  1935. { "DAC R2", NULL, "Mono DAC MIXR" },
  1936. { "OUT MIXL", "BST1 Switch", "BST1" },
  1937. { "OUT MIXL", "INL Switch", "INL VOL" },
  1938. { "OUT MIXL", "DAC L2 Switch", "DAC L2" },
  1939. { "OUT MIXL", "DAC L1 Switch", "DAC L1" },
  1940. { "OUT MIXR", "BST2 Switch", "BST2" },
  1941. { "OUT MIXR", "INR Switch", "INR VOL" },
  1942. { "OUT MIXR", "DAC R2 Switch", "DAC R2" },
  1943. { "OUT MIXR", "DAC R1 Switch", "DAC R1" },
  1944. { "HPOVOL MIXL", "DAC1 Switch", "DAC L1" },
  1945. { "HPOVOL MIXL", "INL Switch", "INL VOL" },
  1946. { "HPOVOL MIXR", "DAC1 Switch", "DAC R1" },
  1947. { "HPOVOL MIXR", "INR Switch", "INR VOL" },
  1948. { "DAC 2", NULL, "DAC L2" },
  1949. { "DAC 2", NULL, "DAC R2" },
  1950. { "DAC 1", NULL, "DAC L1" },
  1951. { "DAC 1", NULL, "DAC R1" },
  1952. { "HPOVOL", NULL, "HPOVOL MIXL" },
  1953. { "HPOVOL", NULL, "HPOVOL MIXR" },
  1954. { "HPO MIX", "DAC1 Switch", "DAC 1" },
  1955. { "HPO MIX", "HPVOL Switch", "HPOVOL" },
  1956. { "LOUT MIX", "DAC L1 Switch", "DAC L1" },
  1957. { "LOUT MIX", "DAC R1 Switch", "DAC R1" },
  1958. { "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" },
  1959. { "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" },
  1960. { "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
  1961. { "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" },
  1962. { "PDM1 L Mux", NULL, "PDM1 Power" },
  1963. { "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
  1964. { "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" },
  1965. { "PDM1 R Mux", NULL, "PDM1 Power" },
  1966. { "HP Amp", NULL, "HPO MIX" },
  1967. { "HP Amp", NULL, "Mic Det Power" },
  1968. { "HPOL", NULL, "HP Amp" },
  1969. { "HPOL", NULL, "HP L Amp" },
  1970. { "HPOL", NULL, "Improve HP Amp Drv" },
  1971. { "HPOR", NULL, "HP Amp" },
  1972. { "HPOR", NULL, "HP R Amp" },
  1973. { "HPOR", NULL, "Improve HP Amp Drv" },
  1974. { "LOUT Amp", NULL, "LOUT MIX" },
  1975. { "LOUT L Playback", "Switch", "LOUT Amp" },
  1976. { "LOUT R Playback", "Switch", "LOUT Amp" },
  1977. { "LOUTL", NULL, "LOUT L Playback" },
  1978. { "LOUTR", NULL, "LOUT R Playback" },
  1979. { "LOUTL", NULL, "Improve HP Amp Drv" },
  1980. { "LOUTR", NULL, "Improve HP Amp Drv" },
  1981. };
  1982. static const struct snd_soc_dapm_route rt5670_specific_dapm_routes[] = {
  1983. { "PDM2 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
  1984. { "PDM2 L Mux", "Mono DAC", "Mono DAC MIXL" },
  1985. { "PDM2 L Mux", NULL, "PDM2 Power" },
  1986. { "PDM2 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
  1987. { "PDM2 R Mux", "Mono DAC", "Mono DAC MIXR" },
  1988. { "PDM2 R Mux", NULL, "PDM2 Power" },
  1989. { "PDM1L", NULL, "PDM1 L Mux" },
  1990. { "PDM1R", NULL, "PDM1 R Mux" },
  1991. { "PDM2L", NULL, "PDM2 L Mux" },
  1992. { "PDM2R", NULL, "PDM2 R Mux" },
  1993. };
  1994. static const struct snd_soc_dapm_route rt5672_specific_dapm_routes[] = {
  1995. { "SPO Amp", NULL, "PDM1 L Mux" },
  1996. { "SPO Amp", NULL, "PDM1 R Mux" },
  1997. { "SPOLP", NULL, "SPO Amp" },
  1998. { "SPOLN", NULL, "SPO Amp" },
  1999. { "SPORP", NULL, "SPO Amp" },
  2000. { "SPORN", NULL, "SPO Amp" },
  2001. };
  2002. static int rt5670_hw_params(struct snd_pcm_substream *substream,
  2003. struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
  2004. {
  2005. struct snd_soc_codec *codec = dai->codec;
  2006. struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
  2007. unsigned int val_len = 0, val_clk, mask_clk;
  2008. int pre_div, bclk_ms, frame_size;
  2009. rt5670->lrck[dai->id] = params_rate(params);
  2010. pre_div = rl6231_get_clk_info(rt5670->sysclk, rt5670->lrck[dai->id]);
  2011. if (pre_div < 0) {
  2012. dev_err(codec->dev, "Unsupported clock setting %d for DAI %d\n",
  2013. rt5670->lrck[dai->id], dai->id);
  2014. return -EINVAL;
  2015. }
  2016. frame_size = snd_soc_params_to_frame_size(params);
  2017. if (frame_size < 0) {
  2018. dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
  2019. return -EINVAL;
  2020. }
  2021. bclk_ms = frame_size > 32;
  2022. rt5670->bclk[dai->id] = rt5670->lrck[dai->id] * (32 << bclk_ms);
  2023. dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
  2024. rt5670->bclk[dai->id], rt5670->lrck[dai->id]);
  2025. dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
  2026. bclk_ms, pre_div, dai->id);
  2027. switch (params_width(params)) {
  2028. case 16:
  2029. break;
  2030. case 20:
  2031. val_len |= RT5670_I2S_DL_20;
  2032. break;
  2033. case 24:
  2034. val_len |= RT5670_I2S_DL_24;
  2035. break;
  2036. case 8:
  2037. val_len |= RT5670_I2S_DL_8;
  2038. break;
  2039. default:
  2040. return -EINVAL;
  2041. }
  2042. switch (dai->id) {
  2043. case RT5670_AIF1:
  2044. mask_clk = RT5670_I2S_BCLK_MS1_MASK | RT5670_I2S_PD1_MASK;
  2045. val_clk = bclk_ms << RT5670_I2S_BCLK_MS1_SFT |
  2046. pre_div << RT5670_I2S_PD1_SFT;
  2047. snd_soc_update_bits(codec, RT5670_I2S1_SDP,
  2048. RT5670_I2S_DL_MASK, val_len);
  2049. snd_soc_update_bits(codec, RT5670_ADDA_CLK1, mask_clk, val_clk);
  2050. break;
  2051. case RT5670_AIF2:
  2052. mask_clk = RT5670_I2S_BCLK_MS2_MASK | RT5670_I2S_PD2_MASK;
  2053. val_clk = bclk_ms << RT5670_I2S_BCLK_MS2_SFT |
  2054. pre_div << RT5670_I2S_PD2_SFT;
  2055. snd_soc_update_bits(codec, RT5670_I2S2_SDP,
  2056. RT5670_I2S_DL_MASK, val_len);
  2057. snd_soc_update_bits(codec, RT5670_ADDA_CLK1, mask_clk, val_clk);
  2058. break;
  2059. default:
  2060. dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
  2061. return -EINVAL;
  2062. }
  2063. return 0;
  2064. }
  2065. static int rt5670_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
  2066. {
  2067. struct snd_soc_codec *codec = dai->codec;
  2068. struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
  2069. unsigned int reg_val = 0;
  2070. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  2071. case SND_SOC_DAIFMT_CBM_CFM:
  2072. rt5670->master[dai->id] = 1;
  2073. break;
  2074. case SND_SOC_DAIFMT_CBS_CFS:
  2075. reg_val |= RT5670_I2S_MS_S;
  2076. rt5670->master[dai->id] = 0;
  2077. break;
  2078. default:
  2079. return -EINVAL;
  2080. }
  2081. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  2082. case SND_SOC_DAIFMT_NB_NF:
  2083. break;
  2084. case SND_SOC_DAIFMT_IB_NF:
  2085. reg_val |= RT5670_I2S_BP_INV;
  2086. break;
  2087. default:
  2088. return -EINVAL;
  2089. }
  2090. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  2091. case SND_SOC_DAIFMT_I2S:
  2092. break;
  2093. case SND_SOC_DAIFMT_LEFT_J:
  2094. reg_val |= RT5670_I2S_DF_LEFT;
  2095. break;
  2096. case SND_SOC_DAIFMT_DSP_A:
  2097. reg_val |= RT5670_I2S_DF_PCM_A;
  2098. break;
  2099. case SND_SOC_DAIFMT_DSP_B:
  2100. reg_val |= RT5670_I2S_DF_PCM_B;
  2101. break;
  2102. default:
  2103. return -EINVAL;
  2104. }
  2105. switch (dai->id) {
  2106. case RT5670_AIF1:
  2107. snd_soc_update_bits(codec, RT5670_I2S1_SDP,
  2108. RT5670_I2S_MS_MASK | RT5670_I2S_BP_MASK |
  2109. RT5670_I2S_DF_MASK, reg_val);
  2110. break;
  2111. case RT5670_AIF2:
  2112. snd_soc_update_bits(codec, RT5670_I2S2_SDP,
  2113. RT5670_I2S_MS_MASK | RT5670_I2S_BP_MASK |
  2114. RT5670_I2S_DF_MASK, reg_val);
  2115. break;
  2116. default:
  2117. dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
  2118. return -EINVAL;
  2119. }
  2120. return 0;
  2121. }
  2122. static int rt5670_set_dai_sysclk(struct snd_soc_dai *dai,
  2123. int clk_id, unsigned int freq, int dir)
  2124. {
  2125. struct snd_soc_codec *codec = dai->codec;
  2126. struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
  2127. unsigned int reg_val = 0;
  2128. switch (clk_id) {
  2129. case RT5670_SCLK_S_MCLK:
  2130. reg_val |= RT5670_SCLK_SRC_MCLK;
  2131. break;
  2132. case RT5670_SCLK_S_PLL1:
  2133. reg_val |= RT5670_SCLK_SRC_PLL1;
  2134. break;
  2135. case RT5670_SCLK_S_RCCLK:
  2136. reg_val |= RT5670_SCLK_SRC_RCCLK;
  2137. break;
  2138. default:
  2139. dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
  2140. return -EINVAL;
  2141. }
  2142. snd_soc_update_bits(codec, RT5670_GLB_CLK,
  2143. RT5670_SCLK_SRC_MASK, reg_val);
  2144. rt5670->sysclk = freq;
  2145. if (clk_id != RT5670_SCLK_S_RCCLK)
  2146. rt5670->sysclk_src = clk_id;
  2147. dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
  2148. return 0;
  2149. }
  2150. static int rt5670_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
  2151. unsigned int freq_in, unsigned int freq_out)
  2152. {
  2153. struct snd_soc_codec *codec = dai->codec;
  2154. struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
  2155. struct rl6231_pll_code pll_code;
  2156. int ret;
  2157. if (source == rt5670->pll_src && freq_in == rt5670->pll_in &&
  2158. freq_out == rt5670->pll_out)
  2159. return 0;
  2160. if (!freq_in || !freq_out) {
  2161. dev_dbg(codec->dev, "PLL disabled\n");
  2162. rt5670->pll_in = 0;
  2163. rt5670->pll_out = 0;
  2164. snd_soc_update_bits(codec, RT5670_GLB_CLK,
  2165. RT5670_SCLK_SRC_MASK, RT5670_SCLK_SRC_MCLK);
  2166. return 0;
  2167. }
  2168. switch (source) {
  2169. case RT5670_PLL1_S_MCLK:
  2170. snd_soc_update_bits(codec, RT5670_GLB_CLK,
  2171. RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_MCLK);
  2172. break;
  2173. case RT5670_PLL1_S_BCLK1:
  2174. case RT5670_PLL1_S_BCLK2:
  2175. case RT5670_PLL1_S_BCLK3:
  2176. case RT5670_PLL1_S_BCLK4:
  2177. switch (dai->id) {
  2178. case RT5670_AIF1:
  2179. snd_soc_update_bits(codec, RT5670_GLB_CLK,
  2180. RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_BCLK1);
  2181. break;
  2182. case RT5670_AIF2:
  2183. snd_soc_update_bits(codec, RT5670_GLB_CLK,
  2184. RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_BCLK2);
  2185. break;
  2186. default:
  2187. dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
  2188. return -EINVAL;
  2189. }
  2190. break;
  2191. default:
  2192. dev_err(codec->dev, "Unknown PLL source %d\n", source);
  2193. return -EINVAL;
  2194. }
  2195. ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
  2196. if (ret < 0) {
  2197. dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
  2198. return ret;
  2199. }
  2200. dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n",
  2201. pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
  2202. pll_code.n_code, pll_code.k_code);
  2203. snd_soc_write(codec, RT5670_PLL_CTRL1,
  2204. pll_code.n_code << RT5670_PLL_N_SFT | pll_code.k_code);
  2205. snd_soc_write(codec, RT5670_PLL_CTRL2,
  2206. (pll_code.m_bp ? 0 : pll_code.m_code) << RT5670_PLL_M_SFT |
  2207. pll_code.m_bp << RT5670_PLL_M_BP_SFT);
  2208. rt5670->pll_in = freq_in;
  2209. rt5670->pll_out = freq_out;
  2210. rt5670->pll_src = source;
  2211. return 0;
  2212. }
  2213. static int rt5670_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
  2214. unsigned int rx_mask, int slots, int slot_width)
  2215. {
  2216. struct snd_soc_codec *codec = dai->codec;
  2217. unsigned int val = 0;
  2218. if (rx_mask || tx_mask)
  2219. val |= (1 << 14);
  2220. switch (slots) {
  2221. case 4:
  2222. val |= (1 << 12);
  2223. break;
  2224. case 6:
  2225. val |= (2 << 12);
  2226. break;
  2227. case 8:
  2228. val |= (3 << 12);
  2229. break;
  2230. case 2:
  2231. break;
  2232. default:
  2233. return -EINVAL;
  2234. }
  2235. switch (slot_width) {
  2236. case 20:
  2237. val |= (1 << 10);
  2238. break;
  2239. case 24:
  2240. val |= (2 << 10);
  2241. break;
  2242. case 32:
  2243. val |= (3 << 10);
  2244. break;
  2245. case 16:
  2246. break;
  2247. default:
  2248. return -EINVAL;
  2249. }
  2250. snd_soc_update_bits(codec, RT5670_TDM_CTRL_1, 0x7c00, val);
  2251. return 0;
  2252. }
  2253. static int rt5670_set_bias_level(struct snd_soc_codec *codec,
  2254. enum snd_soc_bias_level level)
  2255. {
  2256. struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
  2257. switch (level) {
  2258. case SND_SOC_BIAS_PREPARE:
  2259. if (SND_SOC_BIAS_STANDBY == snd_soc_codec_get_bias_level(codec)) {
  2260. snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
  2261. RT5670_PWR_VREF1 | RT5670_PWR_MB |
  2262. RT5670_PWR_BG | RT5670_PWR_VREF2,
  2263. RT5670_PWR_VREF1 | RT5670_PWR_MB |
  2264. RT5670_PWR_BG | RT5670_PWR_VREF2);
  2265. mdelay(10);
  2266. snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
  2267. RT5670_PWR_FV1 | RT5670_PWR_FV2,
  2268. RT5670_PWR_FV1 | RT5670_PWR_FV2);
  2269. snd_soc_update_bits(codec, RT5670_CHARGE_PUMP,
  2270. RT5670_OSW_L_MASK | RT5670_OSW_R_MASK,
  2271. RT5670_OSW_L_DIS | RT5670_OSW_R_DIS);
  2272. snd_soc_update_bits(codec, RT5670_DIG_MISC, 0x1, 0x1);
  2273. snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
  2274. RT5670_LDO_SEL_MASK, 0x3);
  2275. }
  2276. break;
  2277. case SND_SOC_BIAS_STANDBY:
  2278. snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
  2279. RT5670_PWR_VREF1 | RT5670_PWR_VREF2 |
  2280. RT5670_PWR_FV1 | RT5670_PWR_FV2, 0);
  2281. snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
  2282. RT5670_LDO_SEL_MASK, 0x1);
  2283. break;
  2284. case SND_SOC_BIAS_OFF:
  2285. if (rt5670->pdata.jd_mode)
  2286. snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
  2287. RT5670_PWR_VREF1 | RT5670_PWR_MB |
  2288. RT5670_PWR_BG | RT5670_PWR_VREF2 |
  2289. RT5670_PWR_FV1 | RT5670_PWR_FV2,
  2290. RT5670_PWR_MB | RT5670_PWR_BG);
  2291. else
  2292. snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
  2293. RT5670_PWR_VREF1 | RT5670_PWR_MB |
  2294. RT5670_PWR_BG | RT5670_PWR_VREF2 |
  2295. RT5670_PWR_FV1 | RT5670_PWR_FV2, 0);
  2296. snd_soc_update_bits(codec, RT5670_DIG_MISC, 0x1, 0x0);
  2297. break;
  2298. default:
  2299. break;
  2300. }
  2301. return 0;
  2302. }
  2303. static int rt5670_probe(struct snd_soc_codec *codec)
  2304. {
  2305. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  2306. struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
  2307. switch (snd_soc_read(codec, RT5670_RESET) & RT5670_ID_MASK) {
  2308. case RT5670_ID_5670:
  2309. case RT5670_ID_5671:
  2310. snd_soc_dapm_new_controls(dapm,
  2311. rt5670_specific_dapm_widgets,
  2312. ARRAY_SIZE(rt5670_specific_dapm_widgets));
  2313. snd_soc_dapm_add_routes(dapm,
  2314. rt5670_specific_dapm_routes,
  2315. ARRAY_SIZE(rt5670_specific_dapm_routes));
  2316. break;
  2317. case RT5670_ID_5672:
  2318. snd_soc_dapm_new_controls(dapm,
  2319. rt5672_specific_dapm_widgets,
  2320. ARRAY_SIZE(rt5672_specific_dapm_widgets));
  2321. snd_soc_dapm_add_routes(dapm,
  2322. rt5672_specific_dapm_routes,
  2323. ARRAY_SIZE(rt5672_specific_dapm_routes));
  2324. break;
  2325. default:
  2326. dev_err(codec->dev,
  2327. "The driver is for RT5670 RT5671 or RT5672 only\n");
  2328. return -ENODEV;
  2329. }
  2330. rt5670->codec = codec;
  2331. return 0;
  2332. }
  2333. static int rt5670_remove(struct snd_soc_codec *codec)
  2334. {
  2335. struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
  2336. regmap_write(rt5670->regmap, RT5670_RESET, 0);
  2337. snd_soc_jack_free_gpios(rt5670->jack, 1, &rt5670->hp_gpio);
  2338. return 0;
  2339. }
  2340. #ifdef CONFIG_PM
  2341. static int rt5670_suspend(struct snd_soc_codec *codec)
  2342. {
  2343. struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
  2344. regcache_cache_only(rt5670->regmap, true);
  2345. regcache_mark_dirty(rt5670->regmap);
  2346. return 0;
  2347. }
  2348. static int rt5670_resume(struct snd_soc_codec *codec)
  2349. {
  2350. struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
  2351. regcache_cache_only(rt5670->regmap, false);
  2352. regcache_sync(rt5670->regmap);
  2353. return 0;
  2354. }
  2355. #else
  2356. #define rt5670_suspend NULL
  2357. #define rt5670_resume NULL
  2358. #endif
  2359. #define RT5670_STEREO_RATES SNDRV_PCM_RATE_8000_96000
  2360. #define RT5670_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
  2361. SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
  2362. static const struct snd_soc_dai_ops rt5670_aif_dai_ops = {
  2363. .hw_params = rt5670_hw_params,
  2364. .set_fmt = rt5670_set_dai_fmt,
  2365. .set_sysclk = rt5670_set_dai_sysclk,
  2366. .set_tdm_slot = rt5670_set_tdm_slot,
  2367. .set_pll = rt5670_set_dai_pll,
  2368. };
  2369. static struct snd_soc_dai_driver rt5670_dai[] = {
  2370. {
  2371. .name = "rt5670-aif1",
  2372. .id = RT5670_AIF1,
  2373. .playback = {
  2374. .stream_name = "AIF1 Playback",
  2375. .channels_min = 1,
  2376. .channels_max = 2,
  2377. .rates = RT5670_STEREO_RATES,
  2378. .formats = RT5670_FORMATS,
  2379. },
  2380. .capture = {
  2381. .stream_name = "AIF1 Capture",
  2382. .channels_min = 1,
  2383. .channels_max = 2,
  2384. .rates = RT5670_STEREO_RATES,
  2385. .formats = RT5670_FORMATS,
  2386. },
  2387. .ops = &rt5670_aif_dai_ops,
  2388. },
  2389. {
  2390. .name = "rt5670-aif2",
  2391. .id = RT5670_AIF2,
  2392. .playback = {
  2393. .stream_name = "AIF2 Playback",
  2394. .channels_min = 1,
  2395. .channels_max = 2,
  2396. .rates = RT5670_STEREO_RATES,
  2397. .formats = RT5670_FORMATS,
  2398. },
  2399. .capture = {
  2400. .stream_name = "AIF2 Capture",
  2401. .channels_min = 1,
  2402. .channels_max = 2,
  2403. .rates = RT5670_STEREO_RATES,
  2404. .formats = RT5670_FORMATS,
  2405. },
  2406. .ops = &rt5670_aif_dai_ops,
  2407. },
  2408. };
  2409. static struct snd_soc_codec_driver soc_codec_dev_rt5670 = {
  2410. .probe = rt5670_probe,
  2411. .remove = rt5670_remove,
  2412. .suspend = rt5670_suspend,
  2413. .resume = rt5670_resume,
  2414. .set_bias_level = rt5670_set_bias_level,
  2415. .idle_bias_off = true,
  2416. .component_driver = {
  2417. .controls = rt5670_snd_controls,
  2418. .num_controls = ARRAY_SIZE(rt5670_snd_controls),
  2419. .dapm_widgets = rt5670_dapm_widgets,
  2420. .num_dapm_widgets = ARRAY_SIZE(rt5670_dapm_widgets),
  2421. .dapm_routes = rt5670_dapm_routes,
  2422. .num_dapm_routes = ARRAY_SIZE(rt5670_dapm_routes),
  2423. },
  2424. };
  2425. static const struct regmap_config rt5670_regmap = {
  2426. .reg_bits = 8,
  2427. .val_bits = 16,
  2428. .use_single_rw = true,
  2429. .max_register = RT5670_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5670_ranges) *
  2430. RT5670_PR_SPACING),
  2431. .volatile_reg = rt5670_volatile_register,
  2432. .readable_reg = rt5670_readable_register,
  2433. .cache_type = REGCACHE_RBTREE,
  2434. .reg_defaults = rt5670_reg,
  2435. .num_reg_defaults = ARRAY_SIZE(rt5670_reg),
  2436. .ranges = rt5670_ranges,
  2437. .num_ranges = ARRAY_SIZE(rt5670_ranges),
  2438. };
  2439. static const struct i2c_device_id rt5670_i2c_id[] = {
  2440. { "rt5670", 0 },
  2441. { "rt5671", 0 },
  2442. { "rt5672", 0 },
  2443. { }
  2444. };
  2445. MODULE_DEVICE_TABLE(i2c, rt5670_i2c_id);
  2446. #ifdef CONFIG_ACPI
  2447. static const struct acpi_device_id rt5670_acpi_match[] = {
  2448. { "10EC5670", 0},
  2449. { "10EC5672", 0},
  2450. { "10EC5640", 0}, /* quirk */
  2451. { },
  2452. };
  2453. MODULE_DEVICE_TABLE(acpi, rt5670_acpi_match);
  2454. #endif
  2455. static const struct dmi_system_id dmi_platform_intel_braswell[] = {
  2456. {
  2457. .ident = "Intel Braswell",
  2458. .matches = {
  2459. DMI_MATCH(DMI_SYS_VENDOR, "Intel Corporation"),
  2460. DMI_MATCH(DMI_BOARD_NAME, "Braswell CRB"),
  2461. },
  2462. },
  2463. {}
  2464. };
  2465. static int rt5670_i2c_probe(struct i2c_client *i2c,
  2466. const struct i2c_device_id *id)
  2467. {
  2468. struct rt5670_platform_data *pdata = dev_get_platdata(&i2c->dev);
  2469. struct rt5670_priv *rt5670;
  2470. int ret;
  2471. unsigned int val;
  2472. rt5670 = devm_kzalloc(&i2c->dev,
  2473. sizeof(struct rt5670_priv),
  2474. GFP_KERNEL);
  2475. if (NULL == rt5670)
  2476. return -ENOMEM;
  2477. i2c_set_clientdata(i2c, rt5670);
  2478. if (pdata)
  2479. rt5670->pdata = *pdata;
  2480. if (dmi_check_system(dmi_platform_intel_braswell)) {
  2481. rt5670->pdata.dmic_en = true;
  2482. rt5670->pdata.dmic1_data_pin = RT5670_DMIC_DATA_IN2P;
  2483. rt5670->pdata.dev_gpio = true;
  2484. rt5670->pdata.jd_mode = 1;
  2485. }
  2486. rt5670->regmap = devm_regmap_init_i2c(i2c, &rt5670_regmap);
  2487. if (IS_ERR(rt5670->regmap)) {
  2488. ret = PTR_ERR(rt5670->regmap);
  2489. dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
  2490. ret);
  2491. return ret;
  2492. }
  2493. regmap_read(rt5670->regmap, RT5670_VENDOR_ID2, &val);
  2494. if (val != RT5670_DEVICE_ID) {
  2495. dev_err(&i2c->dev,
  2496. "Device with ID register %#x is not rt5670/72\n", val);
  2497. return -ENODEV;
  2498. }
  2499. regmap_write(rt5670->regmap, RT5670_RESET, 0);
  2500. regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1,
  2501. RT5670_PWR_HP_L | RT5670_PWR_HP_R |
  2502. RT5670_PWR_VREF2, RT5670_PWR_VREF2);
  2503. msleep(100);
  2504. regmap_write(rt5670->regmap, RT5670_RESET, 0);
  2505. regmap_read(rt5670->regmap, RT5670_VENDOR_ID, &val);
  2506. if (val >= 4)
  2507. regmap_write(rt5670->regmap, RT5670_GPIO_CTRL3, 0x0980);
  2508. else
  2509. regmap_write(rt5670->regmap, RT5670_GPIO_CTRL3, 0x0d00);
  2510. ret = regmap_register_patch(rt5670->regmap, init_list,
  2511. ARRAY_SIZE(init_list));
  2512. if (ret != 0)
  2513. dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
  2514. if (rt5670->pdata.in2_diff)
  2515. regmap_update_bits(rt5670->regmap, RT5670_IN2,
  2516. RT5670_IN_DF2, RT5670_IN_DF2);
  2517. if (rt5670->pdata.dev_gpio) {
  2518. /* for push button */
  2519. regmap_write(rt5670->regmap, RT5670_IL_CMD, 0x0000);
  2520. regmap_write(rt5670->regmap, RT5670_IL_CMD2, 0x0010);
  2521. regmap_write(rt5670->regmap, RT5670_IL_CMD3, 0x0014);
  2522. /* for irq */
  2523. regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
  2524. RT5670_GP1_PIN_MASK, RT5670_GP1_PIN_IRQ);
  2525. regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL2,
  2526. RT5670_GP1_PF_MASK, RT5670_GP1_PF_OUT);
  2527. regmap_update_bits(rt5670->regmap, RT5670_DIG_MISC, 0x8, 0x8);
  2528. }
  2529. if (rt5670->pdata.jd_mode) {
  2530. regmap_update_bits(rt5670->regmap, RT5670_GLB_CLK,
  2531. RT5670_SCLK_SRC_MASK, RT5670_SCLK_SRC_RCCLK);
  2532. rt5670->sysclk = 0;
  2533. rt5670->sysclk_src = RT5670_SCLK_S_RCCLK;
  2534. regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1,
  2535. RT5670_PWR_MB, RT5670_PWR_MB);
  2536. regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG2,
  2537. RT5670_PWR_JD1, RT5670_PWR_JD1);
  2538. regmap_update_bits(rt5670->regmap, RT5670_IRQ_CTRL1,
  2539. RT5670_JD1_1_EN_MASK, RT5670_JD1_1_EN);
  2540. regmap_update_bits(rt5670->regmap, RT5670_JD_CTRL3,
  2541. RT5670_JD_TRI_CBJ_SEL_MASK |
  2542. RT5670_JD_TRI_HPO_SEL_MASK,
  2543. RT5670_JD_CBJ_JD1_1 | RT5670_JD_HPO_JD1_1);
  2544. switch (rt5670->pdata.jd_mode) {
  2545. case 1:
  2546. regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1,
  2547. RT5670_JD1_MODE_MASK,
  2548. RT5670_JD1_MODE_0);
  2549. break;
  2550. case 2:
  2551. regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1,
  2552. RT5670_JD1_MODE_MASK,
  2553. RT5670_JD1_MODE_1);
  2554. break;
  2555. case 3:
  2556. regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1,
  2557. RT5670_JD1_MODE_MASK,
  2558. RT5670_JD1_MODE_2);
  2559. break;
  2560. default:
  2561. break;
  2562. }
  2563. }
  2564. if (rt5670->pdata.dmic_en) {
  2565. regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
  2566. RT5670_GP2_PIN_MASK,
  2567. RT5670_GP2_PIN_DMIC1_SCL);
  2568. switch (rt5670->pdata.dmic1_data_pin) {
  2569. case RT5670_DMIC_DATA_IN2P:
  2570. regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
  2571. RT5670_DMIC_1_DP_MASK,
  2572. RT5670_DMIC_1_DP_IN2P);
  2573. break;
  2574. case RT5670_DMIC_DATA_GPIO6:
  2575. regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
  2576. RT5670_DMIC_1_DP_MASK,
  2577. RT5670_DMIC_1_DP_GPIO6);
  2578. regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
  2579. RT5670_GP6_PIN_MASK,
  2580. RT5670_GP6_PIN_DMIC1_SDA);
  2581. break;
  2582. case RT5670_DMIC_DATA_GPIO7:
  2583. regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
  2584. RT5670_DMIC_1_DP_MASK,
  2585. RT5670_DMIC_1_DP_GPIO7);
  2586. regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
  2587. RT5670_GP7_PIN_MASK,
  2588. RT5670_GP7_PIN_DMIC1_SDA);
  2589. break;
  2590. default:
  2591. break;
  2592. }
  2593. switch (rt5670->pdata.dmic2_data_pin) {
  2594. case RT5670_DMIC_DATA_IN3N:
  2595. regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
  2596. RT5670_DMIC_2_DP_MASK,
  2597. RT5670_DMIC_2_DP_IN3N);
  2598. break;
  2599. case RT5670_DMIC_DATA_GPIO8:
  2600. regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
  2601. RT5670_DMIC_2_DP_MASK,
  2602. RT5670_DMIC_2_DP_GPIO8);
  2603. regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
  2604. RT5670_GP8_PIN_MASK,
  2605. RT5670_GP8_PIN_DMIC2_SDA);
  2606. break;
  2607. default:
  2608. break;
  2609. }
  2610. switch (rt5670->pdata.dmic3_data_pin) {
  2611. case RT5670_DMIC_DATA_GPIO5:
  2612. regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL2,
  2613. RT5670_DMIC_3_DP_MASK,
  2614. RT5670_DMIC_3_DP_GPIO5);
  2615. regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
  2616. RT5670_GP5_PIN_MASK,
  2617. RT5670_GP5_PIN_DMIC3_SDA);
  2618. break;
  2619. case RT5670_DMIC_DATA_GPIO9:
  2620. case RT5670_DMIC_DATA_GPIO10:
  2621. dev_err(&i2c->dev,
  2622. "Always use GPIO5 as DMIC3 data pin\n");
  2623. break;
  2624. default:
  2625. break;
  2626. }
  2627. }
  2628. pm_runtime_enable(&i2c->dev);
  2629. pm_request_idle(&i2c->dev);
  2630. ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5670,
  2631. rt5670_dai, ARRAY_SIZE(rt5670_dai));
  2632. if (ret < 0)
  2633. goto err;
  2634. pm_runtime_put(&i2c->dev);
  2635. return 0;
  2636. err:
  2637. pm_runtime_disable(&i2c->dev);
  2638. return ret;
  2639. }
  2640. static int rt5670_i2c_remove(struct i2c_client *i2c)
  2641. {
  2642. pm_runtime_disable(&i2c->dev);
  2643. snd_soc_unregister_codec(&i2c->dev);
  2644. return 0;
  2645. }
  2646. static struct i2c_driver rt5670_i2c_driver = {
  2647. .driver = {
  2648. .name = "rt5670",
  2649. .acpi_match_table = ACPI_PTR(rt5670_acpi_match),
  2650. },
  2651. .probe = rt5670_i2c_probe,
  2652. .remove = rt5670_i2c_remove,
  2653. .id_table = rt5670_i2c_id,
  2654. };
  2655. module_i2c_driver(rt5670_i2c_driver);
  2656. MODULE_DESCRIPTION("ASoC RT5670 driver");
  2657. MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
  2658. MODULE_LICENSE("GPL v2");