max98926.c 16 KB

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  1. /*
  2. * max98926.c -- ALSA SoC MAX98926 driver
  3. * Copyright 2013-15 Maxim Integrated Products
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. #include <linux/delay.h>
  9. #include <linux/i2c.h>
  10. #include <linux/module.h>
  11. #include <linux/regmap.h>
  12. #include <linux/slab.h>
  13. #include <linux/cdev.h>
  14. #include <sound/pcm.h>
  15. #include <sound/pcm_params.h>
  16. #include <sound/soc.h>
  17. #include <sound/tlv.h>
  18. #include "max98926.h"
  19. static const char * const max98926_boost_voltage_txt[] = {
  20. "8.5V", "8.25V", "8.0V", "7.75V", "7.5V", "7.25V", "7.0V", "6.75V",
  21. "6.5V", "6.5V", "6.5V", "6.5V", "6.5V", "6.5V", "6.5V", "6.5V"
  22. };
  23. static const char * const max98926_boost_current_txt[] = {
  24. "0.6", "0.8", "1.0", "1.2", "1.4", "1.6", "1.8", "2.0",
  25. "2.2", "2.4", "2.6", "2.8", "3.2", "3.6", "4.0", "4.4"
  26. };
  27. static const char *const max98926_dai_txt[] = {
  28. "Left", "Right", "LeftRight", "LeftRightDiv2",
  29. };
  30. static const char *const max98926_pdm_ch_text[] = {
  31. "Current", "Voltage",
  32. };
  33. static const char *const max98926_hpf_cutoff_txt[] = {
  34. "Disable", "DC Block", "100Hz",
  35. "200Hz", "400Hz", "800Hz",
  36. };
  37. static const struct reg_default max98926_reg[] = {
  38. { 0x0B, 0x00 }, /* IRQ Enable0 */
  39. { 0x0C, 0x00 }, /* IRQ Enable1 */
  40. { 0x0D, 0x00 }, /* IRQ Enable2 */
  41. { 0x0E, 0x00 }, /* IRQ Clear0 */
  42. { 0x0F, 0x00 }, /* IRQ Clear1 */
  43. { 0x10, 0x00 }, /* IRQ Clear2 */
  44. { 0x11, 0xC0 }, /* Map0 */
  45. { 0x12, 0x00 }, /* Map1 */
  46. { 0x13, 0x00 }, /* Map2 */
  47. { 0x14, 0xF0 }, /* Map3 */
  48. { 0x15, 0x00 }, /* Map4 */
  49. { 0x16, 0xAB }, /* Map5 */
  50. { 0x17, 0x89 }, /* Map6 */
  51. { 0x18, 0x00 }, /* Map7 */
  52. { 0x19, 0x00 }, /* Map8 */
  53. { 0x1A, 0x04 }, /* DAI Clock Mode 1 */
  54. { 0x1B, 0x00 }, /* DAI Clock Mode 2 */
  55. { 0x1C, 0x00 }, /* DAI Clock Divider Denominator MSBs */
  56. { 0x1D, 0x00 }, /* DAI Clock Divider Denominator LSBs */
  57. { 0x1E, 0xF0 }, /* DAI Clock Divider Numerator MSBs */
  58. { 0x1F, 0x00 }, /* DAI Clock Divider Numerator LSBs */
  59. { 0x20, 0x50 }, /* Format */
  60. { 0x21, 0x00 }, /* TDM Slot Select */
  61. { 0x22, 0x00 }, /* DOUT Configuration VMON */
  62. { 0x23, 0x00 }, /* DOUT Configuration IMON */
  63. { 0x24, 0x00 }, /* DOUT Configuration VBAT */
  64. { 0x25, 0x00 }, /* DOUT Configuration VBST */
  65. { 0x26, 0x00 }, /* DOUT Configuration FLAG */
  66. { 0x27, 0xFF }, /* DOUT HiZ Configuration 1 */
  67. { 0x28, 0xFF }, /* DOUT HiZ Configuration 2 */
  68. { 0x29, 0xFF }, /* DOUT HiZ Configuration 3 */
  69. { 0x2A, 0xFF }, /* DOUT HiZ Configuration 4 */
  70. { 0x2B, 0x02 }, /* DOUT Drive Strength */
  71. { 0x2C, 0x90 }, /* Filters */
  72. { 0x2D, 0x00 }, /* Gain */
  73. { 0x2E, 0x02 }, /* Gain Ramping */
  74. { 0x2F, 0x00 }, /* Speaker Amplifier */
  75. { 0x30, 0x0A }, /* Threshold */
  76. { 0x31, 0x00 }, /* ALC Attack */
  77. { 0x32, 0x80 }, /* ALC Atten and Release */
  78. { 0x33, 0x00 }, /* ALC Infinite Hold Release */
  79. { 0x34, 0x92 }, /* ALC Configuration */
  80. { 0x35, 0x01 }, /* Boost Converter */
  81. { 0x36, 0x00 }, /* Block Enable */
  82. { 0x37, 0x00 }, /* Configuration */
  83. { 0x38, 0x00 }, /* Global Enable */
  84. { 0x3A, 0x00 }, /* Boost Limiter */
  85. };
  86. static const struct soc_enum max98926_voltage_enum[] = {
  87. SOC_ENUM_SINGLE(MAX98926_DAI_CLK_DIV_N_LSBS, 0,
  88. ARRAY_SIZE(max98926_pdm_ch_text),
  89. max98926_pdm_ch_text),
  90. };
  91. static const struct snd_kcontrol_new max98926_voltage_control =
  92. SOC_DAPM_ENUM("Route", max98926_voltage_enum);
  93. static const struct soc_enum max98926_current_enum[] = {
  94. SOC_ENUM_SINGLE(MAX98926_DAI_CLK_DIV_N_LSBS,
  95. MAX98926_PDM_SOURCE_1_SHIFT,
  96. ARRAY_SIZE(max98926_pdm_ch_text),
  97. max98926_pdm_ch_text),
  98. };
  99. static const struct snd_kcontrol_new max98926_current_control =
  100. SOC_DAPM_ENUM("Route", max98926_current_enum);
  101. static const struct snd_kcontrol_new max98926_mixer_controls[] = {
  102. SOC_DAPM_SINGLE("PCM Single Switch", MAX98926_SPK_AMP,
  103. MAX98926_INSELECT_MODE_SHIFT, 0, 0),
  104. SOC_DAPM_SINGLE("PDM Single Switch", MAX98926_SPK_AMP,
  105. MAX98926_INSELECT_MODE_SHIFT, 1, 0),
  106. };
  107. static const struct snd_kcontrol_new max98926_dai_controls[] = {
  108. SOC_DAPM_SINGLE("Left", MAX98926_GAIN,
  109. MAX98926_DAC_IN_SEL_SHIFT, 0, 0),
  110. SOC_DAPM_SINGLE("Right", MAX98926_GAIN,
  111. MAX98926_DAC_IN_SEL_SHIFT, 1, 0),
  112. SOC_DAPM_SINGLE("LeftRight", MAX98926_GAIN,
  113. MAX98926_DAC_IN_SEL_SHIFT, 2, 0),
  114. SOC_DAPM_SINGLE("(Left+Right)/2 Switch", MAX98926_GAIN,
  115. MAX98926_DAC_IN_SEL_SHIFT, 3, 0),
  116. };
  117. static const struct snd_soc_dapm_widget max98926_dapm_widgets[] = {
  118. SND_SOC_DAPM_AIF_IN("DAI_OUT", "HiFi Playback", 0,
  119. SND_SOC_NOPM, 0, 0),
  120. SND_SOC_DAPM_DAC("Amp Enable", NULL, MAX98926_BLOCK_ENABLE,
  121. MAX98926_SPK_EN_SHIFT, 0),
  122. SND_SOC_DAPM_SUPPLY("Global Enable", MAX98926_GLOBAL_ENABLE,
  123. MAX98926_EN_SHIFT, 0, NULL, 0),
  124. SND_SOC_DAPM_SUPPLY("VI Enable", MAX98926_BLOCK_ENABLE,
  125. MAX98926_ADC_IMON_EN_WIDTH |
  126. MAX98926_ADC_VMON_EN_SHIFT,
  127. 0, NULL, 0),
  128. SND_SOC_DAPM_PGA("BST Enable", MAX98926_BLOCK_ENABLE,
  129. MAX98926_BST_EN_SHIFT, 0, NULL, 0),
  130. SND_SOC_DAPM_OUTPUT("BE_OUT"),
  131. SND_SOC_DAPM_MIXER("PCM Sel", MAX98926_SPK_AMP,
  132. MAX98926_INSELECT_MODE_SHIFT, 0,
  133. &max98926_mixer_controls[0],
  134. ARRAY_SIZE(max98926_mixer_controls)),
  135. SND_SOC_DAPM_MIXER("DAI Sel",
  136. MAX98926_GAIN, MAX98926_DAC_IN_SEL_SHIFT, 0,
  137. &max98926_dai_controls[0],
  138. ARRAY_SIZE(max98926_dai_controls)),
  139. SND_SOC_DAPM_MUX("PDM CH1 Source",
  140. MAX98926_DAI_CLK_DIV_N_LSBS,
  141. MAX98926_PDM_CURRENT_SHIFT,
  142. 0, &max98926_current_control),
  143. SND_SOC_DAPM_MUX("PDM CH0 Source",
  144. MAX98926_DAI_CLK_DIV_N_LSBS,
  145. MAX98926_PDM_VOLTAGE_SHIFT,
  146. 0, &max98926_voltage_control),
  147. };
  148. static const struct snd_soc_dapm_route max98926_audio_map[] = {
  149. {"VI Enable", NULL, "DAI_OUT"},
  150. {"DAI Sel", "Left", "VI Enable"},
  151. {"DAI Sel", "Right", "VI Enable"},
  152. {"DAI Sel", "LeftRight", "VI Enable"},
  153. {"DAI Sel", "LeftRightDiv2", "VI Enable"},
  154. {"PCM Sel", "PCM", "DAI Sel"},
  155. {"PDM CH1 Source", "Current", "DAI_OUT"},
  156. {"PDM CH1 Source", "Voltage", "DAI_OUT"},
  157. {"PDM CH0 Source", "Current", "DAI_OUT"},
  158. {"PDM CH0 Source", "Voltage", "DAI_OUT"},
  159. {"PCM Sel", "Analog", "PDM CH1 Source"},
  160. {"PCM Sel", "Analog", "PDM CH0 Source"},
  161. {"Amp Enable", NULL, "PCM Sel"},
  162. {"BST Enable", NULL, "Amp Enable"},
  163. {"BE_OUT", NULL, "BST Enable"},
  164. };
  165. static bool max98926_volatile_register(struct device *dev, unsigned int reg)
  166. {
  167. switch (reg) {
  168. case MAX98926_VBAT_DATA:
  169. case MAX98926_VBST_DATA:
  170. case MAX98926_LIVE_STATUS0:
  171. case MAX98926_LIVE_STATUS1:
  172. case MAX98926_LIVE_STATUS2:
  173. case MAX98926_STATE0:
  174. case MAX98926_STATE1:
  175. case MAX98926_STATE2:
  176. case MAX98926_FLAG0:
  177. case MAX98926_FLAG1:
  178. case MAX98926_FLAG2:
  179. case MAX98926_VERSION:
  180. return true;
  181. default:
  182. return false;
  183. }
  184. }
  185. static bool max98926_readable_register(struct device *dev, unsigned int reg)
  186. {
  187. switch (reg) {
  188. case MAX98926_IRQ_CLEAR0:
  189. case MAX98926_IRQ_CLEAR1:
  190. case MAX98926_IRQ_CLEAR2:
  191. case MAX98926_ALC_HOLD_RLS:
  192. return false;
  193. default:
  194. return true;
  195. }
  196. };
  197. DECLARE_TLV_DB_SCALE(max98926_spk_tlv, -600, 100, 0);
  198. DECLARE_TLV_DB_RANGE(max98926_current_tlv,
  199. 0, 11, TLV_DB_SCALE_ITEM(20, 20, 0),
  200. 12, 15, TLV_DB_SCALE_ITEM(320, 40, 0),
  201. );
  202. static SOC_ENUM_SINGLE_DECL(max98926_dac_hpf_cutoff,
  203. MAX98926_FILTERS, MAX98926_DAC_HPF_SHIFT,
  204. max98926_hpf_cutoff_txt);
  205. static SOC_ENUM_SINGLE_DECL(max98926_boost_voltage,
  206. MAX98926_CONFIGURATION, MAX98926_BST_VOUT_SHIFT,
  207. max98926_boost_voltage_txt);
  208. static const struct snd_kcontrol_new max98926_snd_controls[] = {
  209. SOC_SINGLE_TLV("Speaker Volume", MAX98926_GAIN,
  210. MAX98926_SPK_GAIN_SHIFT,
  211. (1<<MAX98926_SPK_GAIN_WIDTH)-1, 0,
  212. max98926_spk_tlv),
  213. SOC_SINGLE("Ramp Switch", MAX98926_GAIN_RAMPING,
  214. MAX98926_SPK_RMP_EN_SHIFT, 1, 0),
  215. SOC_SINGLE("ZCD Switch", MAX98926_GAIN_RAMPING,
  216. MAX98926_SPK_ZCD_EN_SHIFT, 1, 0),
  217. SOC_SINGLE("ALC Switch", MAX98926_THRESHOLD,
  218. MAX98926_ALC_EN_SHIFT, 1, 0),
  219. SOC_SINGLE("ALC Threshold", MAX98926_THRESHOLD,
  220. MAX98926_ALC_TH_SHIFT,
  221. (1<<MAX98926_ALC_TH_WIDTH)-1, 0),
  222. SOC_ENUM("Boost Output Voltage", max98926_boost_voltage),
  223. SOC_SINGLE_TLV("Boost Current Limit", MAX98926_BOOST_LIMITER,
  224. MAX98926_BST_ILIM_SHIFT,
  225. (1<<MAX98926_BST_ILIM_SHIFT)-1, 0,
  226. max98926_current_tlv),
  227. SOC_ENUM("DAC HPF Cutoff", max98926_dac_hpf_cutoff),
  228. SOC_DOUBLE("PDM Channel One", MAX98926_DAI_CLK_DIV_N_LSBS,
  229. MAX98926_PDM_CHANNEL_1_SHIFT,
  230. MAX98926_PDM_CHANNEL_1_HIZ, 1, 0),
  231. SOC_DOUBLE("PDM Channel Zero", MAX98926_DAI_CLK_DIV_N_LSBS,
  232. MAX98926_PDM_CHANNEL_0_SHIFT,
  233. MAX98926_PDM_CHANNEL_0_HIZ, 1, 0),
  234. };
  235. static const struct {
  236. int rate;
  237. int sr;
  238. } rate_table[] = {
  239. {
  240. .rate = 8000,
  241. .sr = 0,
  242. },
  243. {
  244. .rate = 11025,
  245. .sr = 1,
  246. },
  247. {
  248. .rate = 12000,
  249. .sr = 2,
  250. },
  251. {
  252. .rate = 16000,
  253. .sr = 3,
  254. },
  255. {
  256. .rate = 22050,
  257. .sr = 4,
  258. },
  259. {
  260. .rate = 24000,
  261. .sr = 5,
  262. },
  263. {
  264. .rate = 32000,
  265. .sr = 6,
  266. },
  267. {
  268. .rate = 44100,
  269. .sr = 7,
  270. },
  271. {
  272. .rate = 48000,
  273. .sr = 8,
  274. },
  275. };
  276. static void max98926_set_sense_data(struct max98926_priv *max98926)
  277. {
  278. regmap_update_bits(max98926->regmap,
  279. MAX98926_DOUT_CFG_VMON,
  280. MAX98926_DAI_VMON_EN_MASK,
  281. MAX98926_DAI_VMON_EN_MASK);
  282. regmap_update_bits(max98926->regmap,
  283. MAX98926_DOUT_CFG_IMON,
  284. MAX98926_DAI_IMON_EN_MASK,
  285. MAX98926_DAI_IMON_EN_MASK);
  286. if (!max98926->interleave_mode) {
  287. /* set VMON slots */
  288. regmap_update_bits(max98926->regmap,
  289. MAX98926_DOUT_CFG_VMON,
  290. MAX98926_DAI_VMON_SLOT_MASK,
  291. max98926->v_slot);
  292. /* set IMON slots */
  293. regmap_update_bits(max98926->regmap,
  294. MAX98926_DOUT_CFG_IMON,
  295. MAX98926_DAI_IMON_SLOT_MASK,
  296. max98926->i_slot);
  297. } else {
  298. /* enable interleave mode */
  299. regmap_update_bits(max98926->regmap,
  300. MAX98926_FORMAT,
  301. MAX98926_DAI_INTERLEAVE_MASK,
  302. MAX98926_DAI_INTERLEAVE_MASK);
  303. /* set interleave slots */
  304. regmap_update_bits(max98926->regmap,
  305. MAX98926_DOUT_CFG_VBAT,
  306. MAX98926_DAI_INTERLEAVE_SLOT_MASK,
  307. max98926->v_slot);
  308. }
  309. }
  310. static int max98926_dai_set_fmt(struct snd_soc_dai *codec_dai,
  311. unsigned int fmt)
  312. {
  313. struct snd_soc_codec *codec = codec_dai->codec;
  314. struct max98926_priv *max98926 = snd_soc_codec_get_drvdata(codec);
  315. unsigned int invert = 0;
  316. dev_dbg(codec->dev, "%s: fmt 0x%08X\n", __func__, fmt);
  317. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  318. case SND_SOC_DAIFMT_CBS_CFS:
  319. max98926_set_sense_data(max98926);
  320. break;
  321. default:
  322. dev_err(codec->dev, "DAI clock mode unsupported\n");
  323. return -EINVAL;
  324. }
  325. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  326. case SND_SOC_DAIFMT_NB_NF:
  327. break;
  328. case SND_SOC_DAIFMT_NB_IF:
  329. invert = MAX98926_DAI_WCI_MASK;
  330. break;
  331. case SND_SOC_DAIFMT_IB_NF:
  332. invert = MAX98926_DAI_BCI_MASK;
  333. break;
  334. case SND_SOC_DAIFMT_IB_IF:
  335. invert = MAX98926_DAI_BCI_MASK | MAX98926_DAI_WCI_MASK;
  336. break;
  337. default:
  338. dev_err(codec->dev, "DAI invert mode unsupported\n");
  339. return -EINVAL;
  340. }
  341. regmap_write(max98926->regmap,
  342. MAX98926_FORMAT, MAX98926_DAI_DLY_MASK);
  343. regmap_update_bits(max98926->regmap, MAX98926_FORMAT,
  344. MAX98926_DAI_BCI_MASK, invert);
  345. return 0;
  346. }
  347. static int max98926_dai_hw_params(struct snd_pcm_substream *substream,
  348. struct snd_pcm_hw_params *params,
  349. struct snd_soc_dai *dai)
  350. {
  351. int dai_sr = -EINVAL;
  352. int rate = params_rate(params), i;
  353. struct snd_soc_codec *codec = dai->codec;
  354. struct max98926_priv *max98926 = snd_soc_codec_get_drvdata(codec);
  355. int blr_clk_ratio;
  356. switch (params_format(params)) {
  357. case SNDRV_PCM_FORMAT_S16_LE:
  358. regmap_update_bits(max98926->regmap,
  359. MAX98926_FORMAT,
  360. MAX98926_DAI_CHANSZ_MASK,
  361. MAX98926_DAI_CHANSZ_16);
  362. max98926->ch_size = 16;
  363. break;
  364. case SNDRV_PCM_FORMAT_S24_LE:
  365. regmap_update_bits(max98926->regmap,
  366. MAX98926_FORMAT,
  367. MAX98926_DAI_CHANSZ_MASK,
  368. MAX98926_DAI_CHANSZ_24);
  369. max98926->ch_size = 24;
  370. break;
  371. case SNDRV_PCM_FORMAT_S32_LE:
  372. regmap_update_bits(max98926->regmap,
  373. MAX98926_FORMAT,
  374. MAX98926_DAI_CHANSZ_MASK,
  375. MAX98926_DAI_CHANSZ_32);
  376. max98926->ch_size = 32;
  377. break;
  378. default:
  379. dev_dbg(codec->dev, "format unsupported %d\n",
  380. params_format(params));
  381. return -EINVAL;
  382. }
  383. /* BCLK/LRCLK ratio calculation */
  384. blr_clk_ratio = params_channels(params) * max98926->ch_size;
  385. switch (blr_clk_ratio) {
  386. case 32:
  387. regmap_update_bits(max98926->regmap,
  388. MAX98926_DAI_CLK_MODE2,
  389. MAX98926_DAI_BSEL_MASK,
  390. MAX98926_DAI_BSEL_32);
  391. break;
  392. case 48:
  393. regmap_update_bits(max98926->regmap,
  394. MAX98926_DAI_CLK_MODE2,
  395. MAX98926_DAI_BSEL_MASK,
  396. MAX98926_DAI_BSEL_48);
  397. break;
  398. case 64:
  399. regmap_update_bits(max98926->regmap,
  400. MAX98926_DAI_CLK_MODE2,
  401. MAX98926_DAI_BSEL_MASK,
  402. MAX98926_DAI_BSEL_64);
  403. break;
  404. default:
  405. return -EINVAL;
  406. }
  407. /* find the closest rate */
  408. for (i = 0; i < ARRAY_SIZE(rate_table); i++) {
  409. if (rate_table[i].rate >= rate) {
  410. dai_sr = rate_table[i].sr;
  411. break;
  412. }
  413. }
  414. if (dai_sr < 0)
  415. return -EINVAL;
  416. /* set DAI_SR to correct LRCLK frequency */
  417. regmap_update_bits(max98926->regmap,
  418. MAX98926_DAI_CLK_MODE2,
  419. MAX98926_DAI_SR_MASK, dai_sr << MAX98926_DAI_SR_SHIFT);
  420. return 0;
  421. }
  422. #define MAX98926_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
  423. SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
  424. static struct snd_soc_dai_ops max98926_dai_ops = {
  425. .set_fmt = max98926_dai_set_fmt,
  426. .hw_params = max98926_dai_hw_params,
  427. };
  428. static struct snd_soc_dai_driver max98926_dai[] = {
  429. {
  430. .name = "max98926-aif1",
  431. .playback = {
  432. .stream_name = "HiFi Playback",
  433. .channels_min = 1,
  434. .channels_max = 2,
  435. .rates = SNDRV_PCM_RATE_8000_48000,
  436. .formats = MAX98926_FORMATS,
  437. },
  438. .capture = {
  439. .stream_name = "HiFi Capture",
  440. .channels_min = 1,
  441. .channels_max = 2,
  442. .rates = SNDRV_PCM_RATE_8000_48000,
  443. .formats = MAX98926_FORMATS,
  444. },
  445. .ops = &max98926_dai_ops,
  446. }
  447. };
  448. static int max98926_probe(struct snd_soc_codec *codec)
  449. {
  450. struct max98926_priv *max98926 = snd_soc_codec_get_drvdata(codec);
  451. max98926->codec = codec;
  452. codec->control_data = max98926->regmap;
  453. /* Hi-Z all the slots */
  454. regmap_write(max98926->regmap, MAX98926_DOUT_HIZ_CFG4, 0xF0);
  455. return 0;
  456. }
  457. static struct snd_soc_codec_driver soc_codec_dev_max98926 = {
  458. .probe = max98926_probe,
  459. .component_driver = {
  460. .controls = max98926_snd_controls,
  461. .num_controls = ARRAY_SIZE(max98926_snd_controls),
  462. .dapm_routes = max98926_audio_map,
  463. .num_dapm_routes = ARRAY_SIZE(max98926_audio_map),
  464. .dapm_widgets = max98926_dapm_widgets,
  465. .num_dapm_widgets = ARRAY_SIZE(max98926_dapm_widgets),
  466. },
  467. };
  468. static const struct regmap_config max98926_regmap = {
  469. .reg_bits = 8,
  470. .val_bits = 8,
  471. .max_register = MAX98926_VERSION,
  472. .reg_defaults = max98926_reg,
  473. .num_reg_defaults = ARRAY_SIZE(max98926_reg),
  474. .volatile_reg = max98926_volatile_register,
  475. .readable_reg = max98926_readable_register,
  476. .cache_type = REGCACHE_RBTREE,
  477. };
  478. static int max98926_i2c_probe(struct i2c_client *i2c,
  479. const struct i2c_device_id *id)
  480. {
  481. int ret, reg;
  482. u32 value;
  483. struct max98926_priv *max98926;
  484. max98926 = devm_kzalloc(&i2c->dev,
  485. sizeof(*max98926), GFP_KERNEL);
  486. if (!max98926)
  487. return -ENOMEM;
  488. i2c_set_clientdata(i2c, max98926);
  489. max98926->regmap = devm_regmap_init_i2c(i2c, &max98926_regmap);
  490. if (IS_ERR(max98926->regmap)) {
  491. ret = PTR_ERR(max98926->regmap);
  492. dev_err(&i2c->dev,
  493. "Failed to allocate regmap: %d\n", ret);
  494. goto err_out;
  495. }
  496. if (of_property_read_bool(i2c->dev.of_node, "interleave-mode"))
  497. max98926->interleave_mode = true;
  498. if (!of_property_read_u32(i2c->dev.of_node, "vmon-slot-no", &value)) {
  499. if (value > MAX98926_DAI_VMON_SLOT_1E_1F) {
  500. dev_err(&i2c->dev, "vmon slot number is wrong:\n");
  501. return -EINVAL;
  502. }
  503. max98926->v_slot = value;
  504. }
  505. if (!of_property_read_u32(i2c->dev.of_node, "imon-slot-no", &value)) {
  506. if (value > MAX98926_DAI_IMON_SLOT_1E_1F) {
  507. dev_err(&i2c->dev, "imon slot number is wrong:\n");
  508. return -EINVAL;
  509. }
  510. max98926->i_slot = value;
  511. }
  512. ret = regmap_read(max98926->regmap,
  513. MAX98926_VERSION, &reg);
  514. if (ret < 0) {
  515. dev_err(&i2c->dev, "Failed to read: %x\n", reg);
  516. return ret;
  517. }
  518. ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_max98926,
  519. max98926_dai, ARRAY_SIZE(max98926_dai));
  520. if (ret < 0)
  521. dev_err(&i2c->dev,
  522. "Failed to register codec: %d\n", ret);
  523. dev_info(&i2c->dev, "device version: %x\n", reg);
  524. err_out:
  525. return ret;
  526. }
  527. static int max98926_i2c_remove(struct i2c_client *client)
  528. {
  529. snd_soc_unregister_codec(&client->dev);
  530. return 0;
  531. }
  532. static const struct i2c_device_id max98926_i2c_id[] = {
  533. { "max98926", 0 },
  534. { }
  535. };
  536. MODULE_DEVICE_TABLE(i2c, max98926_i2c_id);
  537. static const struct of_device_id max98926_of_match[] = {
  538. { .compatible = "maxim,max98926", },
  539. { }
  540. };
  541. MODULE_DEVICE_TABLE(of, max98926_of_match);
  542. static struct i2c_driver max98926_i2c_driver = {
  543. .driver = {
  544. .name = "max98926",
  545. .of_match_table = of_match_ptr(max98926_of_match),
  546. .pm = NULL,
  547. },
  548. .probe = max98926_i2c_probe,
  549. .remove = max98926_i2c_remove,
  550. .id_table = max98926_i2c_id,
  551. };
  552. module_i2c_driver(max98926_i2c_driver)
  553. MODULE_DESCRIPTION("ALSA SoC MAX98926 driver");
  554. MODULE_AUTHOR("Anish kumar <anish.kumar@maximintegrated.com>");
  555. MODULE_LICENSE("GPL");