jz4740.c 10 KB

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  1. /*
  2. * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. *
  8. * You should have received a copy of the GNU General Public License along
  9. * with this program; if not, write to the Free Software Foundation, Inc.,
  10. * 675 Mass Ave, Cambridge, MA 02139, USA.
  11. *
  12. */
  13. #include <linux/kernel.h>
  14. #include <linux/module.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/slab.h>
  17. #include <linux/io.h>
  18. #include <linux/regmap.h>
  19. #include <linux/delay.h>
  20. #include <sound/core.h>
  21. #include <sound/pcm.h>
  22. #include <sound/pcm_params.h>
  23. #include <sound/initval.h>
  24. #include <sound/soc.h>
  25. #include <sound/tlv.h>
  26. #define JZ4740_REG_CODEC_1 0x0
  27. #define JZ4740_REG_CODEC_2 0x4
  28. #define JZ4740_CODEC_1_LINE_ENABLE BIT(29)
  29. #define JZ4740_CODEC_1_MIC_ENABLE BIT(28)
  30. #define JZ4740_CODEC_1_SW1_ENABLE BIT(27)
  31. #define JZ4740_CODEC_1_ADC_ENABLE BIT(26)
  32. #define JZ4740_CODEC_1_SW2_ENABLE BIT(25)
  33. #define JZ4740_CODEC_1_DAC_ENABLE BIT(24)
  34. #define JZ4740_CODEC_1_VREF_DISABLE BIT(20)
  35. #define JZ4740_CODEC_1_VREF_AMP_DISABLE BIT(19)
  36. #define JZ4740_CODEC_1_VREF_PULLDOWN BIT(18)
  37. #define JZ4740_CODEC_1_VREF_LOW_CURRENT BIT(17)
  38. #define JZ4740_CODEC_1_VREF_HIGH_CURRENT BIT(16)
  39. #define JZ4740_CODEC_1_HEADPHONE_DISABLE BIT(14)
  40. #define JZ4740_CODEC_1_HEADPHONE_AMP_CHANGE_ANY BIT(13)
  41. #define JZ4740_CODEC_1_HEADPHONE_CHARGE BIT(12)
  42. #define JZ4740_CODEC_1_HEADPHONE_PULLDOWN (BIT(11) | BIT(10))
  43. #define JZ4740_CODEC_1_HEADPHONE_POWERDOWN_M BIT(9)
  44. #define JZ4740_CODEC_1_HEADPHONE_POWERDOWN BIT(8)
  45. #define JZ4740_CODEC_1_SUSPEND BIT(1)
  46. #define JZ4740_CODEC_1_RESET BIT(0)
  47. #define JZ4740_CODEC_1_LINE_ENABLE_OFFSET 29
  48. #define JZ4740_CODEC_1_MIC_ENABLE_OFFSET 28
  49. #define JZ4740_CODEC_1_SW1_ENABLE_OFFSET 27
  50. #define JZ4740_CODEC_1_ADC_ENABLE_OFFSET 26
  51. #define JZ4740_CODEC_1_SW2_ENABLE_OFFSET 25
  52. #define JZ4740_CODEC_1_DAC_ENABLE_OFFSET 24
  53. #define JZ4740_CODEC_1_HEADPHONE_DISABLE_OFFSET 14
  54. #define JZ4740_CODEC_1_HEADPHONE_POWERDOWN_OFFSET 8
  55. #define JZ4740_CODEC_2_INPUT_VOLUME_MASK 0x1f0000
  56. #define JZ4740_CODEC_2_SAMPLE_RATE_MASK 0x000f00
  57. #define JZ4740_CODEC_2_MIC_BOOST_GAIN_MASK 0x000030
  58. #define JZ4740_CODEC_2_HEADPHONE_VOLUME_MASK 0x000003
  59. #define JZ4740_CODEC_2_INPUT_VOLUME_OFFSET 16
  60. #define JZ4740_CODEC_2_SAMPLE_RATE_OFFSET 8
  61. #define JZ4740_CODEC_2_MIC_BOOST_GAIN_OFFSET 4
  62. #define JZ4740_CODEC_2_HEADPHONE_VOLUME_OFFSET 0
  63. static const struct reg_default jz4740_codec_reg_defaults[] = {
  64. { JZ4740_REG_CODEC_1, 0x021b2302 },
  65. { JZ4740_REG_CODEC_2, 0x00170803 },
  66. };
  67. struct jz4740_codec {
  68. struct regmap *regmap;
  69. };
  70. static const DECLARE_TLV_DB_RANGE(jz4740_mic_tlv,
  71. 0, 2, TLV_DB_SCALE_ITEM(0, 600, 0),
  72. 3, 3, TLV_DB_SCALE_ITEM(2000, 0, 0)
  73. );
  74. static const DECLARE_TLV_DB_SCALE(jz4740_out_tlv, 0, 200, 0);
  75. static const DECLARE_TLV_DB_SCALE(jz4740_in_tlv, -3450, 150, 0);
  76. static const struct snd_kcontrol_new jz4740_codec_controls[] = {
  77. SOC_SINGLE_TLV("Master Playback Volume", JZ4740_REG_CODEC_2,
  78. JZ4740_CODEC_2_HEADPHONE_VOLUME_OFFSET, 3, 0,
  79. jz4740_out_tlv),
  80. SOC_SINGLE_TLV("Master Capture Volume", JZ4740_REG_CODEC_2,
  81. JZ4740_CODEC_2_INPUT_VOLUME_OFFSET, 31, 0,
  82. jz4740_in_tlv),
  83. SOC_SINGLE("Master Playback Switch", JZ4740_REG_CODEC_1,
  84. JZ4740_CODEC_1_HEADPHONE_DISABLE_OFFSET, 1, 1),
  85. SOC_SINGLE_TLV("Mic Capture Volume", JZ4740_REG_CODEC_2,
  86. JZ4740_CODEC_2_MIC_BOOST_GAIN_OFFSET, 3, 0,
  87. jz4740_mic_tlv),
  88. };
  89. static const struct snd_kcontrol_new jz4740_codec_output_controls[] = {
  90. SOC_DAPM_SINGLE("Bypass Switch", JZ4740_REG_CODEC_1,
  91. JZ4740_CODEC_1_SW1_ENABLE_OFFSET, 1, 0),
  92. SOC_DAPM_SINGLE("DAC Switch", JZ4740_REG_CODEC_1,
  93. JZ4740_CODEC_1_SW2_ENABLE_OFFSET, 1, 0),
  94. };
  95. static const struct snd_kcontrol_new jz4740_codec_input_controls[] = {
  96. SOC_DAPM_SINGLE("Line Capture Switch", JZ4740_REG_CODEC_1,
  97. JZ4740_CODEC_1_LINE_ENABLE_OFFSET, 1, 0),
  98. SOC_DAPM_SINGLE("Mic Capture Switch", JZ4740_REG_CODEC_1,
  99. JZ4740_CODEC_1_MIC_ENABLE_OFFSET, 1, 0),
  100. };
  101. static const struct snd_soc_dapm_widget jz4740_codec_dapm_widgets[] = {
  102. SND_SOC_DAPM_ADC("ADC", "Capture", JZ4740_REG_CODEC_1,
  103. JZ4740_CODEC_1_ADC_ENABLE_OFFSET, 0),
  104. SND_SOC_DAPM_DAC("DAC", "Playback", JZ4740_REG_CODEC_1,
  105. JZ4740_CODEC_1_DAC_ENABLE_OFFSET, 0),
  106. SND_SOC_DAPM_MIXER("Output Mixer", JZ4740_REG_CODEC_1,
  107. JZ4740_CODEC_1_HEADPHONE_POWERDOWN_OFFSET, 1,
  108. jz4740_codec_output_controls,
  109. ARRAY_SIZE(jz4740_codec_output_controls)),
  110. SND_SOC_DAPM_MIXER_NAMED_CTL("Input Mixer", SND_SOC_NOPM, 0, 0,
  111. jz4740_codec_input_controls,
  112. ARRAY_SIZE(jz4740_codec_input_controls)),
  113. SND_SOC_DAPM_MIXER("Line Input", SND_SOC_NOPM, 0, 0, NULL, 0),
  114. SND_SOC_DAPM_OUTPUT("LOUT"),
  115. SND_SOC_DAPM_OUTPUT("ROUT"),
  116. SND_SOC_DAPM_INPUT("MIC"),
  117. SND_SOC_DAPM_INPUT("LIN"),
  118. SND_SOC_DAPM_INPUT("RIN"),
  119. };
  120. static const struct snd_soc_dapm_route jz4740_codec_dapm_routes[] = {
  121. {"Line Input", NULL, "LIN"},
  122. {"Line Input", NULL, "RIN"},
  123. {"Input Mixer", "Line Capture Switch", "Line Input"},
  124. {"Input Mixer", "Mic Capture Switch", "MIC"},
  125. {"ADC", NULL, "Input Mixer"},
  126. {"Output Mixer", "Bypass Switch", "Input Mixer"},
  127. {"Output Mixer", "DAC Switch", "DAC"},
  128. {"LOUT", NULL, "Output Mixer"},
  129. {"ROUT", NULL, "Output Mixer"},
  130. };
  131. static int jz4740_codec_hw_params(struct snd_pcm_substream *substream,
  132. struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
  133. {
  134. struct jz4740_codec *jz4740_codec = snd_soc_codec_get_drvdata(dai->codec);
  135. uint32_t val;
  136. switch (params_rate(params)) {
  137. case 8000:
  138. val = 0;
  139. break;
  140. case 11025:
  141. val = 1;
  142. break;
  143. case 12000:
  144. val = 2;
  145. break;
  146. case 16000:
  147. val = 3;
  148. break;
  149. case 22050:
  150. val = 4;
  151. break;
  152. case 24000:
  153. val = 5;
  154. break;
  155. case 32000:
  156. val = 6;
  157. break;
  158. case 44100:
  159. val = 7;
  160. break;
  161. case 48000:
  162. val = 8;
  163. break;
  164. default:
  165. return -EINVAL;
  166. }
  167. val <<= JZ4740_CODEC_2_SAMPLE_RATE_OFFSET;
  168. regmap_update_bits(jz4740_codec->regmap, JZ4740_REG_CODEC_2,
  169. JZ4740_CODEC_2_SAMPLE_RATE_MASK, val);
  170. return 0;
  171. }
  172. static const struct snd_soc_dai_ops jz4740_codec_dai_ops = {
  173. .hw_params = jz4740_codec_hw_params,
  174. };
  175. static struct snd_soc_dai_driver jz4740_codec_dai = {
  176. .name = "jz4740-hifi",
  177. .playback = {
  178. .stream_name = "Playback",
  179. .channels_min = 2,
  180. .channels_max = 2,
  181. .rates = SNDRV_PCM_RATE_8000_48000,
  182. .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8,
  183. },
  184. .capture = {
  185. .stream_name = "Capture",
  186. .channels_min = 2,
  187. .channels_max = 2,
  188. .rates = SNDRV_PCM_RATE_8000_48000,
  189. .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8,
  190. },
  191. .ops = &jz4740_codec_dai_ops,
  192. .symmetric_rates = 1,
  193. };
  194. static void jz4740_codec_wakeup(struct regmap *regmap)
  195. {
  196. regmap_update_bits(regmap, JZ4740_REG_CODEC_1,
  197. JZ4740_CODEC_1_RESET, JZ4740_CODEC_1_RESET);
  198. udelay(2);
  199. regmap_update_bits(regmap, JZ4740_REG_CODEC_1,
  200. JZ4740_CODEC_1_SUSPEND | JZ4740_CODEC_1_RESET, 0);
  201. regcache_sync(regmap);
  202. }
  203. static int jz4740_codec_set_bias_level(struct snd_soc_codec *codec,
  204. enum snd_soc_bias_level level)
  205. {
  206. struct jz4740_codec *jz4740_codec = snd_soc_codec_get_drvdata(codec);
  207. struct regmap *regmap = jz4740_codec->regmap;
  208. unsigned int mask;
  209. unsigned int value;
  210. switch (level) {
  211. case SND_SOC_BIAS_ON:
  212. break;
  213. case SND_SOC_BIAS_PREPARE:
  214. mask = JZ4740_CODEC_1_VREF_DISABLE |
  215. JZ4740_CODEC_1_VREF_AMP_DISABLE |
  216. JZ4740_CODEC_1_HEADPHONE_POWERDOWN_M;
  217. value = 0;
  218. regmap_update_bits(regmap, JZ4740_REG_CODEC_1, mask, value);
  219. break;
  220. case SND_SOC_BIAS_STANDBY:
  221. /* The only way to clear the suspend flag is to reset the codec */
  222. if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF)
  223. jz4740_codec_wakeup(regmap);
  224. mask = JZ4740_CODEC_1_VREF_DISABLE |
  225. JZ4740_CODEC_1_VREF_AMP_DISABLE |
  226. JZ4740_CODEC_1_HEADPHONE_POWERDOWN_M;
  227. value = JZ4740_CODEC_1_VREF_DISABLE |
  228. JZ4740_CODEC_1_VREF_AMP_DISABLE |
  229. JZ4740_CODEC_1_HEADPHONE_POWERDOWN_M;
  230. regmap_update_bits(regmap, JZ4740_REG_CODEC_1, mask, value);
  231. break;
  232. case SND_SOC_BIAS_OFF:
  233. mask = JZ4740_CODEC_1_SUSPEND;
  234. value = JZ4740_CODEC_1_SUSPEND;
  235. regmap_update_bits(regmap, JZ4740_REG_CODEC_1, mask, value);
  236. regcache_mark_dirty(regmap);
  237. break;
  238. default:
  239. break;
  240. }
  241. return 0;
  242. }
  243. static int jz4740_codec_dev_probe(struct snd_soc_codec *codec)
  244. {
  245. struct jz4740_codec *jz4740_codec = snd_soc_codec_get_drvdata(codec);
  246. regmap_update_bits(jz4740_codec->regmap, JZ4740_REG_CODEC_1,
  247. JZ4740_CODEC_1_SW2_ENABLE, JZ4740_CODEC_1_SW2_ENABLE);
  248. return 0;
  249. }
  250. static struct snd_soc_codec_driver soc_codec_dev_jz4740_codec = {
  251. .probe = jz4740_codec_dev_probe,
  252. .set_bias_level = jz4740_codec_set_bias_level,
  253. .suspend_bias_off = true,
  254. .component_driver = {
  255. .controls = jz4740_codec_controls,
  256. .num_controls = ARRAY_SIZE(jz4740_codec_controls),
  257. .dapm_widgets = jz4740_codec_dapm_widgets,
  258. .num_dapm_widgets = ARRAY_SIZE(jz4740_codec_dapm_widgets),
  259. .dapm_routes = jz4740_codec_dapm_routes,
  260. .num_dapm_routes = ARRAY_SIZE(jz4740_codec_dapm_routes),
  261. },
  262. };
  263. static const struct regmap_config jz4740_codec_regmap_config = {
  264. .reg_bits = 32,
  265. .reg_stride = 4,
  266. .val_bits = 32,
  267. .max_register = JZ4740_REG_CODEC_2,
  268. .reg_defaults = jz4740_codec_reg_defaults,
  269. .num_reg_defaults = ARRAY_SIZE(jz4740_codec_reg_defaults),
  270. .cache_type = REGCACHE_RBTREE,
  271. };
  272. static int jz4740_codec_probe(struct platform_device *pdev)
  273. {
  274. int ret;
  275. struct jz4740_codec *jz4740_codec;
  276. struct resource *mem;
  277. void __iomem *base;
  278. jz4740_codec = devm_kzalloc(&pdev->dev, sizeof(*jz4740_codec),
  279. GFP_KERNEL);
  280. if (!jz4740_codec)
  281. return -ENOMEM;
  282. mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  283. base = devm_ioremap_resource(&pdev->dev, mem);
  284. if (IS_ERR(base))
  285. return PTR_ERR(base);
  286. jz4740_codec->regmap = devm_regmap_init_mmio(&pdev->dev, base,
  287. &jz4740_codec_regmap_config);
  288. if (IS_ERR(jz4740_codec->regmap))
  289. return PTR_ERR(jz4740_codec->regmap);
  290. platform_set_drvdata(pdev, jz4740_codec);
  291. ret = snd_soc_register_codec(&pdev->dev,
  292. &soc_codec_dev_jz4740_codec, &jz4740_codec_dai, 1);
  293. if (ret)
  294. dev_err(&pdev->dev, "Failed to register codec\n");
  295. return ret;
  296. }
  297. static int jz4740_codec_remove(struct platform_device *pdev)
  298. {
  299. snd_soc_unregister_codec(&pdev->dev);
  300. return 0;
  301. }
  302. static struct platform_driver jz4740_codec_driver = {
  303. .probe = jz4740_codec_probe,
  304. .remove = jz4740_codec_remove,
  305. .driver = {
  306. .name = "jz4740-codec",
  307. },
  308. };
  309. module_platform_driver(jz4740_codec_driver);
  310. MODULE_DESCRIPTION("JZ4740 SoC internal codec driver");
  311. MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
  312. MODULE_LICENSE("GPL v2");
  313. MODULE_ALIAS("platform:jz4740-codec");