da732x_reg.h 23 KB

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  1. /*
  2. * da732x_reg.h --- Dialog DA732X ALSA SoC Audio Registers Header File
  3. *
  4. * Copyright (C) 2012 Dialog Semiconductor GmbH
  5. *
  6. * Author: Michal Hajduk <Michal.Hajduk@diasemi.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #ifndef __DA732X_REG_H_
  13. #define __DA732X_REG_H_
  14. /* DA732X registers */
  15. #define DA732X_REG_STATUS_EXT 0x00
  16. #define DA732X_REG_STATUS 0x01
  17. #define DA732X_REG_REF1 0x02
  18. #define DA732X_REG_BIAS_EN 0x03
  19. #define DA732X_REG_BIAS1 0x04
  20. #define DA732X_REG_BIAS2 0x05
  21. #define DA732X_REG_BIAS3 0x06
  22. #define DA732X_REG_BIAS4 0x07
  23. #define DA732X_REG_MICBIAS2 0x0F
  24. #define DA732X_REG_MICBIAS1 0x10
  25. #define DA732X_REG_MICDET 0x11
  26. #define DA732X_REG_MIC1_PRE 0x12
  27. #define DA732X_REG_MIC1 0x13
  28. #define DA732X_REG_MIC2_PRE 0x14
  29. #define DA732X_REG_MIC2 0x15
  30. #define DA732X_REG_AUX1L 0x16
  31. #define DA732X_REG_AUX1R 0x17
  32. #define DA732X_REG_MIC3_PRE 0x18
  33. #define DA732X_REG_MIC3 0x19
  34. #define DA732X_REG_INP_PINBIAS 0x1A
  35. #define DA732X_REG_INP_ZC_EN 0x1B
  36. #define DA732X_REG_INP_MUX 0x1D
  37. #define DA732X_REG_HP_DET 0x20
  38. #define DA732X_REG_HPL_DAC_OFFSET 0x21
  39. #define DA732X_REG_HPL_DAC_OFF_CNTL 0x22
  40. #define DA732X_REG_HPL_OUT_OFFSET 0x23
  41. #define DA732X_REG_HPL 0x24
  42. #define DA732X_REG_HPL_VOL 0x25
  43. #define DA732X_REG_HPR_DAC_OFFSET 0x26
  44. #define DA732X_REG_HPR_DAC_OFF_CNTL 0x27
  45. #define DA732X_REG_HPR_OUT_OFFSET 0x28
  46. #define DA732X_REG_HPR 0x29
  47. #define DA732X_REG_HPR_VOL 0x2A
  48. #define DA732X_REG_LIN2 0x2B
  49. #define DA732X_REG_LIN3 0x2C
  50. #define DA732X_REG_LIN4 0x2D
  51. #define DA732X_REG_OUT_ZC_EN 0x2E
  52. #define DA732X_REG_HP_LIN1_GNDSEL 0x37
  53. #define DA732X_REG_CP_HP1 0x3A
  54. #define DA732X_REG_CP_HP2 0x3B
  55. #define DA732X_REG_CP_CTRL1 0x40
  56. #define DA732X_REG_CP_CTRL2 0x41
  57. #define DA732X_REG_CP_CTRL3 0x42
  58. #define DA732X_REG_CP_LEVEL_MASK 0x43
  59. #define DA732X_REG_CP_DET 0x44
  60. #define DA732X_REG_CP_STATUS 0x45
  61. #define DA732X_REG_CP_THRESH1 0x46
  62. #define DA732X_REG_CP_THRESH2 0x47
  63. #define DA732X_REG_CP_THRESH3 0x48
  64. #define DA732X_REG_CP_THRESH4 0x49
  65. #define DA732X_REG_CP_THRESH5 0x4A
  66. #define DA732X_REG_CP_THRESH6 0x4B
  67. #define DA732X_REG_CP_THRESH7 0x4C
  68. #define DA732X_REG_CP_THRESH8 0x4D
  69. #define DA732X_REG_PLL_DIV_LO 0x50
  70. #define DA732X_REG_PLL_DIV_MID 0x51
  71. #define DA732X_REG_PLL_DIV_HI 0x52
  72. #define DA732X_REG_PLL_CTRL 0x53
  73. #define DA732X_REG_CLK_CTRL 0x54
  74. #define DA732X_REG_CLK_DSP 0x5A
  75. #define DA732X_REG_CLK_EN1 0x5B
  76. #define DA732X_REG_CLK_EN2 0x5C
  77. #define DA732X_REG_CLK_EN3 0x5D
  78. #define DA732X_REG_CLK_EN4 0x5E
  79. #define DA732X_REG_CLK_EN5 0x5F
  80. #define DA732X_REG_AIF_MCLK 0x60
  81. #define DA732X_REG_AIFA1 0x61
  82. #define DA732X_REG_AIFA2 0x62
  83. #define DA732X_REG_AIFA3 0x63
  84. #define DA732X_REG_AIFB1 0x64
  85. #define DA732X_REG_AIFB2 0x65
  86. #define DA732X_REG_AIFB3 0x66
  87. #define DA732X_REG_PC_CTRL 0x6A
  88. #define DA732X_REG_DATA_ROUTE 0x70
  89. #define DA732X_REG_DSP_CTRL 0x71
  90. #define DA732X_REG_CIF_CTRL2 0x74
  91. #define DA732X_REG_HANDSHAKE 0x75
  92. #define DA732X_REG_MBOX0 0x76
  93. #define DA732X_REG_MBOX1 0x77
  94. #define DA732X_REG_MBOX2 0x78
  95. #define DA732X_REG_MBOX_STATUS 0x79
  96. #define DA732X_REG_SPARE1_OUT 0x7D
  97. #define DA732X_REG_SPARE2_OUT 0x7E
  98. #define DA732X_REG_SPARE1_IN 0x7F
  99. #define DA732X_REG_ID 0x81
  100. #define DA732X_REG_ADC1_PD 0x90
  101. #define DA732X_REG_ADC1_HPF 0x93
  102. #define DA732X_REG_ADC1_SEL 0x94
  103. #define DA732X_REG_ADC1_EQ12 0x95
  104. #define DA732X_REG_ADC1_EQ34 0x96
  105. #define DA732X_REG_ADC1_EQ5 0x97
  106. #define DA732X_REG_ADC2_PD 0x98
  107. #define DA732X_REG_ADC2_HPF 0x9B
  108. #define DA732X_REG_ADC2_SEL 0x9C
  109. #define DA732X_REG_ADC2_EQ12 0x9D
  110. #define DA732X_REG_ADC2_EQ34 0x9E
  111. #define DA732X_REG_ADC2_EQ5 0x9F
  112. #define DA732X_REG_DAC1_HPF 0xA0
  113. #define DA732X_REG_DAC1_L_VOL 0xA1
  114. #define DA732X_REG_DAC1_R_VOL 0xA2
  115. #define DA732X_REG_DAC1_SEL 0xA3
  116. #define DA732X_REG_DAC1_SOFTMUTE 0xA4
  117. #define DA732X_REG_DAC1_EQ12 0xA5
  118. #define DA732X_REG_DAC1_EQ34 0xA6
  119. #define DA732X_REG_DAC1_EQ5 0xA7
  120. #define DA732X_REG_DAC2_HPF 0xB0
  121. #define DA732X_REG_DAC2_L_VOL 0xB1
  122. #define DA732X_REG_DAC2_R_VOL 0xB2
  123. #define DA732X_REG_DAC2_SEL 0xB3
  124. #define DA732X_REG_DAC2_SOFTMUTE 0xB4
  125. #define DA732X_REG_DAC2_EQ12 0xB5
  126. #define DA732X_REG_DAC2_EQ34 0xB6
  127. #define DA732X_REG_DAC2_EQ5 0xB7
  128. #define DA732X_REG_DAC3_HPF 0xC0
  129. #define DA732X_REG_DAC3_VOL 0xC1
  130. #define DA732X_REG_DAC3_SEL 0xC3
  131. #define DA732X_REG_DAC3_SOFTMUTE 0xC4
  132. #define DA732X_REG_DAC3_EQ12 0xC5
  133. #define DA732X_REG_DAC3_EQ34 0xC6
  134. #define DA732X_REG_DAC3_EQ5 0xC7
  135. #define DA732X_REG_BIQ_BYP 0xD2
  136. #define DA732X_REG_DMA_CMD 0xD3
  137. #define DA732X_REG_DMA_ADDR0 0xD4
  138. #define DA732X_REG_DMA_ADDR1 0xD5
  139. #define DA732X_REG_DMA_DATA0 0xD6
  140. #define DA732X_REG_DMA_DATA1 0xD7
  141. #define DA732X_REG_DMA_DATA2 0xD8
  142. #define DA732X_REG_DMA_DATA3 0xD9
  143. #define DA732X_REG_DMA_STATUS 0xDA
  144. #define DA732X_REG_BROWNOUT 0xDF
  145. #define DA732X_REG_UNLOCK 0xE0
  146. #define DA732X_MAX_REG DA732X_REG_UNLOCK
  147. /*
  148. * Bits
  149. */
  150. /* DA732X_REG_STATUS_EXT (addr=0x00) */
  151. #define DA732X_STATUS_EXT_DSP (1 << 4)
  152. #define DA732X_STATUS_EXT_CLEAR (0 << 0)
  153. /* DA732X_REG_STATUS (addr=0x01) */
  154. #define DA732X_STATUS_PLL_LOCK (1 << 0)
  155. #define DA732X_STATUS_PLL_MCLK_DET (1 << 1)
  156. #define DA732X_STATUS_HPDET_OUT (1 << 2)
  157. #define DA732X_STATUS_INP_MIXDET_1 (1 << 3)
  158. #define DA732X_STATUS_INP_MIXDET_2 (1 << 4)
  159. #define DA732X_STATUS_BO_STATUS (1 << 5)
  160. /* DA732X_REG_REF1 (addr=0x02) */
  161. #define DA732X_VMID_FASTCHG (1 << 1)
  162. #define DA732X_VMID_FASTDISCHG (1 << 2)
  163. #define DA732X_REFBUFX2_EN (1 << 6)
  164. #define DA732X_REFBUFX2_DIS (0 << 6)
  165. /* DA732X_REG_BIAS_EN (addr=0x03) */
  166. #define DA732X_BIAS_BOOST_MASK (3 << 0)
  167. #define DA732X_BIAS_BOOST_100PC (0 << 0)
  168. #define DA732X_BIAS_BOOST_133PC (1 << 0)
  169. #define DA732X_BIAS_BOOST_88PC (2 << 0)
  170. #define DA732X_BIAS_BOOST_50PC (3 << 0)
  171. #define DA732X_BIAS_EN (1 << 7)
  172. #define DA732X_BIAS_DIS (0 << 7)
  173. /* DA732X_REG_BIAS1 (addr=0x04) */
  174. #define DA732X_BIAS1_HP_DAC_BIAS_MASK (3 << 0)
  175. #define DA732X_BIAS1_HP_DAC_BIAS_100PC (0 << 0)
  176. #define DA732X_BIAS1_HP_DAC_BIAS_150PC (1 << 0)
  177. #define DA732X_BIAS1_HP_DAC_BIAS_50PC (2 << 0)
  178. #define DA732X_BIAS1_HP_DAC_BIAS_75PC (3 << 0)
  179. #define DA732X_BIAS1_HP_OUT_BIAS_MASK (7 << 4)
  180. #define DA732X_BIAS1_HP_OUT_BIAS_100PC (0 << 4)
  181. #define DA732X_BIAS1_HP_OUT_BIAS_125PC (1 << 4)
  182. #define DA732X_BIAS1_HP_OUT_BIAS_150PC (2 << 4)
  183. #define DA732X_BIAS1_HP_OUT_BIAS_175PC (3 << 4)
  184. #define DA732X_BIAS1_HP_OUT_BIAS_200PC (4 << 4)
  185. #define DA732X_BIAS1_HP_OUT_BIAS_250PC (5 << 4)
  186. #define DA732X_BIAS1_HP_OUT_BIAS_300PC (6 << 4)
  187. #define DA732X_BIAS1_HP_OUT_BIAS_350PC (7 << 4)
  188. /* DA732X_REG_BIAS2 (addr=0x05) */
  189. #define DA732X_BIAS2_LINE2_DAC_BIAS_MASK (3 << 0)
  190. #define DA732X_BIAS2_LINE2_DAC_BIAS_100PC (0 << 0)
  191. #define DA732X_BIAS2_LINE2_DAC_BIAS_150PC (1 << 0)
  192. #define DA732X_BIAS2_LINE2_DAC_BIAS_50PC (2 << 0)
  193. #define DA732X_BIAS2_LINE2_DAC_BIAS_75PC (3 << 0)
  194. #define DA732X_BIAS2_LINE2_OUT_BIAS_MASK (7 << 4)
  195. #define DA732X_BIAS2_LINE2_OUT_BIAS_100PC (0 << 4)
  196. #define DA732X_BIAS2_LINE2_OUT_BIAS_125PC (1 << 4)
  197. #define DA732X_BIAS2_LINE2_OUT_BIAS_150PC (2 << 4)
  198. #define DA732X_BIAS2_LINE2_OUT_BIAS_175PC (3 << 4)
  199. #define DA732X_BIAS2_LINE2_OUT_BIAS_200PC (4 << 4)
  200. #define DA732X_BIAS2_LINE2_OUT_BIAS_250PC (5 << 4)
  201. #define DA732X_BIAS2_LINE2_OUT_BIAS_300PC (6 << 4)
  202. #define DA732X_BIAS2_LINE2_OUT_BIAS_350PC (7 << 4)
  203. /* DA732X_REG_BIAS3 (addr=0x06) */
  204. #define DA732X_BIAS3_LINE3_DAC_BIAS_MASK (3 << 0)
  205. #define DA732X_BIAS3_LINE3_DAC_BIAS_100PC (0 << 0)
  206. #define DA732X_BIAS3_LINE3_DAC_BIAS_150PC (1 << 0)
  207. #define DA732X_BIAS3_LINE3_DAC_BIAS_50PC (2 << 0)
  208. #define DA732X_BIAS3_LINE3_DAC_BIAS_75PC (3 << 0)
  209. #define DA732X_BIAS3_LINE3_OUT_BIAS_MASK (7 << 4)
  210. #define DA732X_BIAS3_LINE3_OUT_BIAS_100PC (0 << 4)
  211. #define DA732X_BIAS3_LINE3_OUT_BIAS_125PC (1 << 4)
  212. #define DA732X_BIAS3_LINE3_OUT_BIAS_150PC (2 << 4)
  213. #define DA732X_BIAS3_LINE3_OUT_BIAS_175PC (3 << 4)
  214. #define DA732X_BIAS3_LINE3_OUT_BIAS_200PC (4 << 4)
  215. #define DA732X_BIAS3_LINE3_OUT_BIAS_250PC (5 << 4)
  216. #define DA732X_BIAS3_LINE3_OUT_BIAS_300PC (6 << 4)
  217. #define DA732X_BIAS3_LINE3_OUT_BIAS_350PC (7 << 4)
  218. /* DA732X_REG_BIAS4 (addr=0x07) */
  219. #define DA732X_BIAS4_LINE4_DAC_BIAS_MASK (3 << 0)
  220. #define DA732X_BIAS4_LINE4_DAC_BIAS_100PC (0 << 0)
  221. #define DA732X_BIAS4_LINE4_DAC_BIAS_150PC (1 << 0)
  222. #define DA732X_BIAS4_LINE4_DAC_BIAS_50PC (2 << 0)
  223. #define DA732X_BIAS4_LINE4_DAC_BIAS_75PC (3 << 0)
  224. #define DA732X_BIAS4_LINE4_OUT_BIAS_MASK (7 << 4)
  225. #define DA732X_BIAS4_LINE4_OUT_BIAS_100PC (0 << 4)
  226. #define DA732X_BIAS4_LINE4_OUT_BIAS_125PC (1 << 4)
  227. #define DA732X_BIAS4_LINE4_OUT_BIAS_150PC (2 << 4)
  228. #define DA732X_BIAS4_LINE4_OUT_BIAS_175PC (3 << 4)
  229. #define DA732X_BIAS4_LINE4_OUT_BIAS_200PC (4 << 4)
  230. #define DA732X_BIAS4_LINE4_OUT_BIAS_250PC (5 << 4)
  231. #define DA732X_BIAS4_LINE4_OUT_BIAS_300PC (6 << 4)
  232. #define DA732X_BIAS4_LINE4_OUT_BIAS_350PC (7 << 4)
  233. /* DA732X_REG_SIF_VDD_SEL (addr=0x08) */
  234. #define DA732X_SIF_VDD_SEL_AIFA_VDD2 (1 << 0)
  235. #define DA732X_SIF_VDD_SEL_AIFB_VDD2 (1 << 1)
  236. #define DA732X_SIF_VDD_SEL_CIFA_VDD2 (1 << 4)
  237. /* DA732X_REG_MICBIAS2/1 (addr=0x0F/0x10) */
  238. #define DA732X_MICBIAS_VOLTAGE_MASK (0x0F << 0)
  239. #define DA732X_MICBIAS_VOLTAGE_2V (0x00 << 0)
  240. #define DA732X_MICBIAS_VOLTAGE_2V05 (0x01 << 0)
  241. #define DA732X_MICBIAS_VOLTAGE_2V1 (0x02 << 0)
  242. #define DA732X_MICBIAS_VOLTAGE_2V15 (0x03 << 0)
  243. #define DA732X_MICBIAS_VOLTAGE_2V2 (0x04 << 0)
  244. #define DA732X_MICBIAS_VOLTAGE_2V25 (0x05 << 0)
  245. #define DA732X_MICBIAS_VOLTAGE_2V3 (0x06 << 0)
  246. #define DA732X_MICBIAS_VOLTAGE_2V35 (0x07 << 0)
  247. #define DA732X_MICBIAS_VOLTAGE_2V4 (0x08 << 0)
  248. #define DA732X_MICBIAS_VOLTAGE_2V45 (0x09 << 0)
  249. #define DA732X_MICBIAS_VOLTAGE_2V5 (0x0A << 0)
  250. #define DA732X_MICBIAS_EN (1 << 7)
  251. #define DA732X_MICBIAS_EN_SHIFT 7
  252. #define DA732X_MICBIAS_VOLTAGE_SHIFT 0
  253. #define DA732X_MICBIAS_VOLTAGE_MAX 0x0B
  254. /* DA732X_REG_MICDET (addr=0x11) */
  255. #define DA732X_MICDET_INP_MICRES (1 << 0)
  256. #define DA732X_MICDET_INP_MICHOOK (1 << 1)
  257. #define DA732X_MICDET_INP_DEBOUNCE_PRD_8MS (0 << 0)
  258. #define DA732X_MICDET_INP_DEBOUNCE_PRD_16MS (1 << 0)
  259. #define DA732X_MICDET_INP_DEBOUNCE_PRD_32MS (2 << 0)
  260. #define DA732X_MICDET_INP_DEBOUNCE_PRD_64MS (3 << 0)
  261. #define DA732X_MICDET_INP_MICDET_EN (1 << 7)
  262. /* DA732X_REG_MIC1/2/3_PRE (addr=0x11/0x14/0x18) */
  263. #define DA732X_MICBOOST_MASK 0x7
  264. #define DA732X_MICBOOST_SHIFT 0
  265. #define DA732X_MICBOOST_MIN 0x1
  266. #define DA732X_MICBOOST_MAX DA732X_MICBOOST_MASK
  267. /* DA732X_REG_MIC1/2/3 (addr=0x13/0x15/0x19) */
  268. #define DA732X_MIC_VOL_SHIFT 0
  269. #define DA732X_MIC_VOL_VAL_MASK 0x1F
  270. #define DA732X_MIC_MUTE_SHIFT 6
  271. #define DA732X_MIC_EN_SHIFT 7
  272. #define DA732X_MIC_VOL_VAL_MIN 0x7
  273. #define DA732X_MIC_VOL_VAL_MAX DA732X_MIC_VOL_VAL_MASK
  274. /* DA732X_REG_AUX1L/R (addr=0x16/0x17) */
  275. #define DA732X_AUX_VOL_SHIFT 0
  276. #define DA732X_AUX_VOL_MASK 0x7
  277. #define DA732X_AUX_MUTE_SHIFT 6
  278. #define DA732X_AUX_EN_SHIFT 7
  279. #define DA732X_AUX_VOL_VAL_MAX DA732X_AUX_VOL_MASK
  280. /* DA732X_REG_INP_PINBIAS (addr=0x1A) */
  281. #define DA732X_INP_MICL_PINBIAS_EN (1 << 0)
  282. #define DA732X_INP_MICR_PINBIAS_EN (1 << 1)
  283. #define DA732X_INP_AUX1L_PINBIAS_EN (1 << 2)
  284. #define DA732X_INP_AUX1R_PINBIAS_EN (1 << 3)
  285. #define DA732X_INP_AUX2_PINBIAS_EN (1 << 4)
  286. /* DA732X_REG_INP_ZC_EN (addr=0x1B) */
  287. #define DA732X_MIC1_PRE_ZC_EN (1 << 0)
  288. #define DA732X_MIC1_ZC_EN (1 << 1)
  289. #define DA732X_MIC2_PRE_ZC_EN (1 << 2)
  290. #define DA732X_MIC2_ZC_EN (1 << 3)
  291. #define DA732X_AUXL_ZC_EN (1 << 4)
  292. #define DA732X_AUXR_ZC_EN (1 << 5)
  293. #define DA732X_MIC3_PRE_ZC_EN (1 << 6)
  294. #define DA732X_MIC3_ZC_EN (1 << 7)
  295. /* DA732X_REG_INP_MUX (addr=0x1D) */
  296. #define DA732X_INP_ADC1L_MUX_SEL_AUX1L (0 << 0)
  297. #define DA732X_INP_ADC1L_MUX_SEL_MIC1 (1 << 0)
  298. #define DA732X_INP_ADC1R_MUX_SEL_MASK (3 << 2)
  299. #define DA732X_INP_ADC1R_MUX_SEL_AUX1R (0 << 2)
  300. #define DA732X_INP_ADC1R_MUX_SEL_MIC2 (1 << 2)
  301. #define DA732X_INP_ADC1R_MUX_SEL_MIC3 (2 << 2)
  302. #define DA732X_INP_ADC2L_MUX_SEL_AUX1L (0 << 4)
  303. #define DA732X_INP_ADC2L_MUX_SEL_MICL (1 << 4)
  304. #define DA732X_INP_ADC2R_MUX_SEL_MASK (3 << 6)
  305. #define DA732X_INP_ADC2R_MUX_SEL_AUX1R (0 << 6)
  306. #define DA732X_INP_ADC2R_MUX_SEL_MICR (1 << 6)
  307. #define DA732X_INP_ADC2R_MUX_SEL_AUX2 (2 << 6)
  308. #define DA732X_ADC1L_MUX_SEL_SHIFT 0
  309. #define DA732X_ADC1R_MUX_SEL_SHIFT 2
  310. #define DA732X_ADC2L_MUX_SEL_SHIFT 4
  311. #define DA732X_ADC2R_MUX_SEL_SHIFT 6
  312. /* DA732X_REG_HP_DET (addr=0x20) */
  313. #define DA732X_HP_DET_AZ (1 << 0)
  314. #define DA732X_HP_DET_SEL1 (1 << 1)
  315. #define DA732X_HP_DET_IS_MASK (3 << 2)
  316. #define DA732X_HP_DET_IS_0_5UA (0 << 2)
  317. #define DA732X_HP_DET_IS_1UA (1 << 2)
  318. #define DA732X_HP_DET_IS_2UA (2 << 2)
  319. #define DA732X_HP_DET_IS_4UA (3 << 2)
  320. #define DA732X_HP_DET_RS_MASK (3 << 4)
  321. #define DA732X_HP_DET_RS_INFINITE (0 << 4)
  322. #define DA732X_HP_DET_RS_100KOHM (1 << 4)
  323. #define DA732X_HP_DET_RS_10KOHM (2 << 4)
  324. #define DA732X_HP_DET_RS_1KOHM (3 << 4)
  325. #define DA732X_HP_DET_EN (1 << 7)
  326. /* DA732X_REG_HPL_DAC_OFFSET (addr=0x21/0x26) */
  327. #define DA732X_HP_DAC_OFFSET_TRIM_MASK (0x3F << 0)
  328. #define DA732X_HP_DAC_OFFSET_DAC_SIGN (1 << 6)
  329. /* DA732X_REG_HPL_DAC_OFF_CNTL (addr=0x22/0x27) */
  330. #define DA732X_HP_DAC_OFF_CNTL_CONT_MASK (7 << 0)
  331. #define DA732X_HP_DAC_OFF_CNTL_COMPO (1 << 3)
  332. #define DA732X_HP_DAC_OFF_CALIBRATION (1 << 0)
  333. #define DA732X_HP_DAC_OFF_SCALE_STEPS (1 << 1)
  334. #define DA732X_HP_DAC_OFF_MASK 0x7F
  335. #define DA732X_HP_DAC_COMPO_SHIFT 3
  336. /* DA732X_REG_HPL_OUT_OFFSET (addr=0x23/0x28) */
  337. #define DA732X_HP_OUT_OFFSET_MASK (0xFF << 0)
  338. #define DA732X_HP_DAC_OFFSET_TRIM_VAL 0x7F
  339. /* DA732X_REG_HPL/R (addr=0x24/0x29) */
  340. #define DA732X_HP_OUT_SIGN (1 << 0)
  341. #define DA732X_HP_OUT_COMP (1 << 1)
  342. #define DA732X_HP_OUT_RESERVED (1 << 2)
  343. #define DA732X_HP_OUT_COMPO (1 << 3)
  344. #define DA732X_HP_OUT_DAC_EN (1 << 4)
  345. #define DA732X_HP_OUT_HIZ_EN (1 << 5)
  346. #define DA732X_HP_OUT_HIZ_DIS (0 << 5)
  347. #define DA732X_HP_OUT_MUTE (1 << 6)
  348. #define DA732X_HP_OUT_EN (1 << 7)
  349. #define DA732X_HP_OUT_COMPO_SHIFT 3
  350. #define DA732X_HP_OUT_DAC_EN_SHIFT 4
  351. #define DA732X_HP_HIZ_SHIFT 5
  352. #define DA732X_HP_MUTE_SHIFT 6
  353. #define DA732X_HP_OUT_EN_SHIFT 7
  354. #define DA732X_OUT_HIZ_EN (1 << 5)
  355. #define DA732X_OUT_HIZ_DIS (0 << 5)
  356. /* DA732X_REG_HPL/R_VOL (addr=0x25/0x2A) */
  357. #define DA732X_HP_VOL_VAL_MASK 0xF
  358. #define DA732X_HP_VOL_SHIFT 0
  359. #define DA732X_HP_VOL_VAL_MAX DA732X_HP_VOL_VAL_MASK
  360. /* DA732X_REG_LIN2/3/4 (addr=0x2B/0x2C/0x2D) */
  361. #define DA732X_LOUT_VOL_SHIFT 0
  362. #define DA732X_LOUT_VOL_MASK 0x0F
  363. #define DA732X_LOUT_DAC_OFF (0 << 4)
  364. #define DA732X_LOUT_DAC_EN (1 << 4)
  365. #define DA732X_LOUT_HIZ_N_DIS (0 << 5)
  366. #define DA732X_LOUT_HIZ_N_EN (1 << 5)
  367. #define DA732X_LOUT_UNMUTED (0 << 6)
  368. #define DA732X_LOUT_MUTED (1 << 6)
  369. #define DA732X_LOUT_EN (0 << 7)
  370. #define DA732X_LOUT_DIS (1 << 7)
  371. #define DA732X_LOUT_DAC_EN_SHIFT 4
  372. #define DA732X_LOUT_MUTE_SHIFT 6
  373. #define DA732X_LIN_OUT_EN_SHIFT 7
  374. #define DA732X_LOUT_VOL_VAL_MAX DA732X_LOUT_VOL_MASK
  375. /* DA732X_REG_OUT_ZC_EN (addr=0x2E) */
  376. #define DA732X_HPL_ZC_EN_SHIFT 0
  377. #define DA732X_HPR_ZC_EN_SHIFT 1
  378. #define DA732X_HPL_ZC_EN (1 << 0)
  379. #define DA732X_HPL_ZC_DIS (0 << 0)
  380. #define DA732X_HPR_ZC_EN (1 << 1)
  381. #define DA732X_HPR_ZC_DIS (0 << 1)
  382. #define DA732X_LIN2_ZC_EN (1 << 2)
  383. #define DA732X_LIN2_ZC_DIS (0 << 2)
  384. #define DA732X_LIN3_ZC_EN (1 << 3)
  385. #define DA732X_LIN3_ZC_DIS (0 << 3)
  386. #define DA732X_LIN4_ZC_EN (1 << 4)
  387. #define DA732X_LIN4_ZC_DIS (0 << 4)
  388. /* DA732X_REG_HP_LIN1_GNDSEL (addr=0x37) */
  389. #define DA732X_HP_OUT_GNDSEL (1 << 0)
  390. /* DA732X_REG_CP_HP2 (addr=0x3a) */
  391. #define DA732X_HP_CP_PULSESKIP (1 << 0)
  392. #define DA732X_HP_CP_REG (1 << 1)
  393. #define DA732X_HP_CP_EN (1 << 3)
  394. #define DA732X_HP_CP_DIS (0 << 3)
  395. /* DA732X_REG_CP_CTRL1 (addr=0x40) */
  396. #define DA732X_CP_MODE_MASK (7 << 1)
  397. #define DA732X_CP_CTRL_STANDBY (0 << 1)
  398. #define DA732X_CP_CTRL_CPVDD6 (2 << 1)
  399. #define DA732X_CP_CTRL_CPVDD5 (3 << 1)
  400. #define DA732X_CP_CTRL_CPVDD4 (4 << 1)
  401. #define DA732X_CP_CTRL_CPVDD3 (5 << 1)
  402. #define DA732X_CP_CTRL_CPVDD2 (6 << 1)
  403. #define DA732X_CP_CTRL_CPVDD1 (7 << 1)
  404. #define DA723X_CP_DIS (0 << 7)
  405. #define DA732X_CP_EN (1 << 7)
  406. /* DA732X_REG_CP_CTRL2 (addr=0x41) */
  407. #define DA732X_CP_BOOST (1 << 0)
  408. #define DA732X_CP_MANAGE_MAGNITUDE (2 << 2)
  409. /* DA732X_REG_CP_CTRL3 (addr=0x42) */
  410. #define DA732X_CP_1MHZ (0 << 0)
  411. #define DA732X_CP_500KHZ (1 << 0)
  412. #define DA732X_CP_250KHZ (2 << 0)
  413. #define DA732X_CP_125KHZ (3 << 0)
  414. #define DA732X_CP_63KHZ (4 << 0)
  415. #define DA732X_CP_0KHZ (5 << 0)
  416. /* DA732X_REG_PLL_CTRL (addr=0x53) */
  417. #define DA732X_PLL_INDIV_MASK (3 << 0)
  418. #define DA732X_PLL_SRM_EN (1 << 2)
  419. #define DA732X_PLL_EN (1 << 7)
  420. #define DA732X_PLL_BYPASS (0 << 0)
  421. /* DA732X_REG_CLK_CTRL (addr=0x54) */
  422. #define DA732X_SR1_MASK (0xF)
  423. #define DA732X_SR2_MASK (0xF0)
  424. /* DA732X_REG_CLK_DSP (addr=0x5A) */
  425. #define DA732X_DSP_FREQ_MASK (7 << 0)
  426. #define DA732X_DSP_FREQ_12MHZ (0 << 0)
  427. #define DA732X_DSP_FREQ_24MHZ (1 << 0)
  428. #define DA732X_DSP_FREQ_36MHZ (2 << 0)
  429. #define DA732X_DSP_FREQ_48MHZ (3 << 0)
  430. #define DA732X_DSP_FREQ_60MHZ (4 << 0)
  431. #define DA732X_DSP_FREQ_72MHZ (5 << 0)
  432. #define DA732X_DSP_FREQ_84MHZ (6 << 0)
  433. #define DA732X_DSP_FREQ_96MHZ (7 << 0)
  434. /* DA732X_REG_CLK_EN1 (addr=0x5B) */
  435. #define DA732X_DSP_CLK_EN (1 << 0)
  436. #define DA732X_SYS3_CLK_EN (1 << 1)
  437. #define DA732X_DSP12_CLK_EN (1 << 2)
  438. #define DA732X_PC_CLK_EN (1 << 3)
  439. #define DA732X_MCLK_SQR_EN (1 << 7)
  440. /* DA732X_REG_CLK_EN2 (addr=0x5C) */
  441. #define DA732X_UART_CLK_EN (1 << 1)
  442. #define DA732X_CP_CLK_EN (1 << 2)
  443. #define DA732X_CP_CLK_DIS (0 << 2)
  444. /* DA732X_REG_CLK_EN3 (addr=0x5D) */
  445. #define DA732X_ADCA_BB_CLK_EN (1 << 0)
  446. #define DA732X_ADCC_BB_CLK_EN (1 << 4)
  447. /* DA732X_REG_CLK_EN4 (addr=0x5E) */
  448. #define DA732X_DACA_BB_CLK_EN (1 << 0)
  449. #define DA732X_DACC_BB_CLK_EN (1 << 4)
  450. #define DA732X_DACA_BB_CLK_SHIFT 0
  451. #define DA732X_DACC_BB_CLK_SHIFT 4
  452. /* DA732X_REG_CLK_EN5 (addr=0x5F) */
  453. #define DA732X_DACE_BB_CLK_EN (1 << 0)
  454. #define DA732X_DACE_BB_CLK_SHIFT 0
  455. /* DA732X_REG_AIF_MCLK (addr=0x60) */
  456. #define DA732X_AIFM_FRAME_64 (1 << 2)
  457. #define DA732X_AIFM_SRC_SEL_AIFA (1 << 6)
  458. #define DA732X_CLK_GENERATION_AIF_A (1 << 4)
  459. #define DA732X_NO_CLK_GENERATION 0x0
  460. /* DA732X_REG_AIFA1 (addr=0x61) */
  461. #define DA732X_AIF_WORD_MASK (0x3 << 0)
  462. #define DA732X_AIF_WORD_16 (0 << 0)
  463. #define DA732X_AIF_WORD_20 (1 << 0)
  464. #define DA732X_AIF_WORD_24 (2 << 0)
  465. #define DA732X_AIF_WORD_32 (3 << 0)
  466. #define DA732X_AIF_TDM_MONO_SHIFT (1 << 6)
  467. #define DA732X_AIF1_CLK_MASK (1 << 7)
  468. #define DA732X_AIF_SLAVE (0 << 7)
  469. #define DA732X_AIF_CLK_FROM_SRC (1 << 7)
  470. /* DA732X_REG_AIFA3 (addr=0x63) */
  471. #define DA732X_AIF_MODE_SHIFT 0
  472. #define DA732X_AIF_MODE_MASK 0x3
  473. #define DA732X_AIF_I2S_MODE (0 << 0)
  474. #define DA732X_AIF_LEFT_J_MODE (1 << 0)
  475. #define DA732X_AIF_RIGHT_J_MODE (2 << 0)
  476. #define DA732X_AIF_DSP_MODE (3 << 0)
  477. #define DA732X_AIF_WCLK_INV (1 << 4)
  478. #define DA732X_AIF_BCLK_INV (1 << 5)
  479. #define DA732X_AIF_EN (1 << 7)
  480. #define DA732X_AIF_EN_SHIFT 7
  481. /* DA732X_REG_PC_CTRL (addr=0x6a) */
  482. #define DA732X_PC_PULSE_AIFA (0 << 0)
  483. #define DA732X_PC_PULSE_AIFB (1 << 0)
  484. #define DA732X_PC_RESYNC_AUT (1 << 6)
  485. #define DA732X_PC_RESYNC_NOT_AUT (0 << 6)
  486. #define DA732X_PC_SAME (1 << 7)
  487. /* DA732X_REG_DATA_ROUTE (addr=0x70) */
  488. #define DA732X_ADC1_TO_AIFA (0 << 0)
  489. #define DA732X_DSP_TO_AIFA (1 << 0)
  490. #define DA732X_ADC2_TO_AIFB (0 << 1)
  491. #define DA732X_DSP_TO_AIFB (1 << 1)
  492. #define DA732X_AIFA_TO_DAC1L (0 << 2)
  493. #define DA732X_DSP_TO_DAC1L (1 << 2)
  494. #define DA732X_AIFA_TO_DAC1R (0 << 3)
  495. #define DA732X_DSP_TO_DAC1R (1 << 3)
  496. #define DA732X_AIFB_TO_DAC2L (0 << 4)
  497. #define DA732X_DSP_TO_DAC2L (1 << 4)
  498. #define DA732X_AIFB_TO_DAC2R (0 << 5)
  499. #define DA732X_DSP_TO_DAC2R (1 << 5)
  500. #define DA732X_AIFB_TO_DAC3 (0 << 6)
  501. #define DA732X_DSP_TO_DAC3 (1 << 6)
  502. #define DA732X_BYPASS_DSP (0 << 0)
  503. #define DA732X_ALL_TO_DSP (0x7F << 0)
  504. /* DA732X_REG_DSP_CTRL (addr=0x71) */
  505. #define DA732X_DIGITAL_EN (1 << 0)
  506. #define DA732X_DIGITAL_RESET (0 << 0)
  507. #define DA732X_DSP_CORE_EN (1 << 1)
  508. #define DA732X_DSP_CORE_RESET (0 << 1)
  509. /* DA732X_REG_SPARE1_OUT (addr=0x7D)*/
  510. #define DA732X_HP_DRIVER_EN (1 << 0)
  511. #define DA732X_HP_GATE_LOW (1 << 2)
  512. #define DA732X_HP_LOOP_GAIN_CTRL (1 << 3)
  513. /* DA732X_REG_ID (addr=0x81)*/
  514. #define DA732X_ID_MINOR_MASK (0xF << 0)
  515. #define DA732X_ID_MAJOR_MASK (0xF << 4)
  516. /* DA732X_REG_ADC1/2_PD (addr=0x90/0x98) */
  517. #define DA732X_ADC_RST_MASK (0x3 << 0)
  518. #define DA732X_ADC_PD_MASK (0x3 << 2)
  519. #define DA732X_ADC_SET_ACT (0x3 << 0)
  520. #define DA732X_ADC_SET_RST (0x0 << 0)
  521. #define DA732X_ADC_ON (0x3 << 2)
  522. #define DA732X_ADC_OFF (0x0 << 2)
  523. /* DA732X_REG_ADC1/2_SEL (addr=0x94/0x9C) */
  524. #define DA732X_ADC_VOL_VAL_MASK 0x7
  525. #define DA732X_ADCL_VOL_SHIFT 0
  526. #define DA732X_ADCR_VOL_SHIFT 4
  527. #define DA732X_ADCL_EN_SHIFT 2
  528. #define DA732X_ADCR_EN_SHIFT 3
  529. #define DA732X_ADCL_EN (1 << 2)
  530. #define DA732X_ADCR_EN (1 << 3)
  531. #define DA732X_ADC_VOL_VAL_MAX DA732X_ADC_VOL_VAL_MASK
  532. /*
  533. * DA732X_REG_ADC1/2_HPF (addr=0x93/0x9b)
  534. * DA732x_REG_DAC1/2/3_HPG (addr=0xA5/0xB5/0xC5)
  535. */
  536. #define DA732X_HPF_MUSIC_EN (1 << 3)
  537. #define DA732X_HPF_VOICE_EN ((1 << 3) | (1 << 7))
  538. #define DA732X_HPF_MASK ((1 << 3) | (1 << 7))
  539. #define DA732X_HPF_DIS ((0 << 3) | (0 << 7))
  540. /* DA732X_REG_DAC1/2/3_VOL */
  541. #define DA732X_DAC_VOL_VAL_MASK 0x7F
  542. #define DA732X_DAC_VOL_SHIFT 0
  543. #define DA732X_DAC_VOL_VAL_MAX DA732X_DAC_VOL_VAL_MASK
  544. /* DA732X_REG_DAC1/2/3_SEL (addr=0xA3/0xB3/0xC3) */
  545. #define DA732X_DACL_EN_SHIFT 3
  546. #define DA732X_DACR_EN_SHIFT 7
  547. #define DA732X_DACL_MUTE_SHIFT 2
  548. #define DA732X_DACR_MUTE_SHIFT 6
  549. #define DA732X_DACL_EN (1 << 3)
  550. #define DA732X_DACR_EN (1 << 7)
  551. #define DA732X_DACL_SDM (1 << 0)
  552. #define DA732X_DACR_SDM (1 << 4)
  553. #define DA732X_DACL_MUTE (1 << 2)
  554. #define DA732X_DACR_MUTE (1 << 6)
  555. /* DA732X_REG_DAC_SOFTMUTE (addr=0xA4/0xB4/0xC4) */
  556. #define DA732X_SOFTMUTE_EN (1 << 7)
  557. #define DA732X_GAIN_RAMPED (1 << 6)
  558. #define DA732X_16_SAMPLES (4 << 0)
  559. #define DA732X_SOFTMUTE_MASK (1 << 7)
  560. #define DA732X_SOFTMUTE_SHIFT 7
  561. /*
  562. * DA732x_REG_ADC1/2_EQ12 (addr=0x95/0x9D)
  563. * DA732x_REG_ADC1/2_EQ34 (addr=0x96/0x9E)
  564. * DA732x_REG_ADC1/2_EQ5 (addr=0x97/0x9F)
  565. * DA732x_REG_DAC1/2/3_EQ12 (addr=0xA5/0xB5/0xC5)
  566. * DA732x_REG_DAC1/2/3_EQ34 (addr=0xA6/0xB6/0xC6)
  567. * DA732x_REG_DAC1/2/3_EQ5 (addr=0xA7/0xB7/0xB7)
  568. */
  569. #define DA732X_EQ_VOL_VAL_MASK 0xF
  570. #define DA732X_EQ_BAND1_SHIFT 0
  571. #define DA732X_EQ_BAND2_SHIFT 4
  572. #define DA732X_EQ_BAND3_SHIFT 0
  573. #define DA732X_EQ_BAND4_SHIFT 4
  574. #define DA732X_EQ_BAND5_SHIFT 0
  575. #define DA732X_EQ_OVERALL_SHIFT 4
  576. #define DA732X_EQ_OVERALL_VOL_VAL_MASK 0x3
  577. #define DA732X_EQ_DIS (0 << 7)
  578. #define DA732X_EQ_EN (1 << 7)
  579. #define DA732X_EQ_EN_SHIFT 7
  580. #define DA732X_EQ_VOL_VAL_MAX DA732X_EQ_VOL_VAL_MASK
  581. #define DA732X_EQ_OVERALL_VOL_VAL_MAX DA732X_EQ_OVERALL_VOL_VAL_MASK
  582. /* DA732X_REG_DMA_CMD (addr=0xD3) */
  583. #define DA732X_SEL_DSP_DMA_MASK (3 << 0)
  584. #define DA732X_SEL_DSP_DMA_DIS (0 << 0)
  585. #define DA732X_SEL_DSP_DMA_PMEM (1 << 0)
  586. #define DA732X_SEL_DSP_DMA_XMEM (2 << 0)
  587. #define DA732X_SEL_DSP_DMA_YMEM (3 << 0)
  588. #define DA732X_DSP_RW_MASK (1 << 4)
  589. #define DA732X_DSP_DMA_WRITE (0 << 4)
  590. #define DA732X_DSP_DMA_READ (1 << 4)
  591. /* DA732X_REG_DMA_STATUS (addr=0xDA) */
  592. #define DA732X_DSP_DMA_FREE (0 << 0)
  593. #define DA732X_DSP_DMA_BUSY (1 << 0)
  594. #endif /* __DA732X_REG_H_ */