atmel-pdmic.c 21 KB

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  1. /* Atmel PDMIC driver
  2. *
  3. * Copyright (C) 2015 Atmel
  4. *
  5. * Author: Songjun Wu <songjun.wu@atmel.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 or later
  9. * as published by the Free Software Foundation.
  10. */
  11. #include <linux/of.h>
  12. #include <linux/clk.h>
  13. #include <linux/module.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/regmap.h>
  16. #include <sound/core.h>
  17. #include <sound/dmaengine_pcm.h>
  18. #include <sound/pcm_params.h>
  19. #include <sound/tlv.h>
  20. #include "atmel-pdmic.h"
  21. struct atmel_pdmic_pdata {
  22. u32 mic_min_freq;
  23. u32 mic_max_freq;
  24. s32 mic_offset;
  25. const char *card_name;
  26. };
  27. struct atmel_pdmic {
  28. dma_addr_t phy_base;
  29. struct regmap *regmap;
  30. struct clk *pclk;
  31. struct clk *gclk;
  32. int irq;
  33. struct snd_pcm_substream *substream;
  34. const struct atmel_pdmic_pdata *pdata;
  35. };
  36. static const struct of_device_id atmel_pdmic_of_match[] = {
  37. {
  38. .compatible = "atmel,sama5d2-pdmic",
  39. }, {
  40. /* sentinel */
  41. }
  42. };
  43. MODULE_DEVICE_TABLE(of, atmel_pdmic_of_match);
  44. #define PDMIC_OFFSET_MAX_VAL S16_MAX
  45. #define PDMIC_OFFSET_MIN_VAL S16_MIN
  46. static struct atmel_pdmic_pdata *atmel_pdmic_dt_init(struct device *dev)
  47. {
  48. struct device_node *np = dev->of_node;
  49. struct atmel_pdmic_pdata *pdata;
  50. if (!np) {
  51. dev_err(dev, "device node not found\n");
  52. return ERR_PTR(-EINVAL);
  53. }
  54. pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
  55. if (!pdata)
  56. return ERR_PTR(-ENOMEM);
  57. if (of_property_read_string(np, "atmel,model", &pdata->card_name))
  58. pdata->card_name = "PDMIC";
  59. if (of_property_read_u32(np, "atmel,mic-min-freq",
  60. &pdata->mic_min_freq)) {
  61. dev_err(dev, "failed to get mic-min-freq\n");
  62. return ERR_PTR(-EINVAL);
  63. }
  64. if (of_property_read_u32(np, "atmel,mic-max-freq",
  65. &pdata->mic_max_freq)) {
  66. dev_err(dev, "failed to get mic-max-freq\n");
  67. return ERR_PTR(-EINVAL);
  68. }
  69. if (pdata->mic_max_freq < pdata->mic_min_freq) {
  70. dev_err(dev,
  71. "mic-max-freq should not be less than mic-min-freq\n");
  72. return ERR_PTR(-EINVAL);
  73. }
  74. if (of_property_read_s32(np, "atmel,mic-offset", &pdata->mic_offset))
  75. pdata->mic_offset = 0;
  76. if (pdata->mic_offset > PDMIC_OFFSET_MAX_VAL) {
  77. dev_warn(dev,
  78. "mic-offset value %d is larger than the max value %d, the max value is specified\n",
  79. pdata->mic_offset, PDMIC_OFFSET_MAX_VAL);
  80. pdata->mic_offset = PDMIC_OFFSET_MAX_VAL;
  81. } else if (pdata->mic_offset < PDMIC_OFFSET_MIN_VAL) {
  82. dev_warn(dev,
  83. "mic-offset value %d is less than the min value %d, the min value is specified\n",
  84. pdata->mic_offset, PDMIC_OFFSET_MIN_VAL);
  85. pdata->mic_offset = PDMIC_OFFSET_MIN_VAL;
  86. }
  87. return pdata;
  88. }
  89. /* cpu dai component */
  90. static int atmel_pdmic_cpu_dai_startup(struct snd_pcm_substream *substream,
  91. struct snd_soc_dai *cpu_dai)
  92. {
  93. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  94. struct atmel_pdmic *dd = snd_soc_card_get_drvdata(rtd->card);
  95. int ret;
  96. ret = clk_prepare_enable(dd->gclk);
  97. if (ret)
  98. return ret;
  99. ret = clk_prepare_enable(dd->pclk);
  100. if (ret) {
  101. clk_disable_unprepare(dd->gclk);
  102. return ret;
  103. }
  104. /* Clear all bits in the Control Register(PDMIC_CR) */
  105. regmap_write(dd->regmap, PDMIC_CR, 0);
  106. dd->substream = substream;
  107. /* Enable the overrun error interrupt */
  108. regmap_write(dd->regmap, PDMIC_IER, PDMIC_IER_OVRE);
  109. return 0;
  110. }
  111. static void atmel_pdmic_cpu_dai_shutdown(struct snd_pcm_substream *substream,
  112. struct snd_soc_dai *cpu_dai)
  113. {
  114. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  115. struct atmel_pdmic *dd = snd_soc_card_get_drvdata(rtd->card);
  116. /* Disable the overrun error interrupt */
  117. regmap_write(dd->regmap, PDMIC_IDR, PDMIC_IDR_OVRE);
  118. clk_disable_unprepare(dd->gclk);
  119. clk_disable_unprepare(dd->pclk);
  120. }
  121. static int atmel_pdmic_cpu_dai_prepare(struct snd_pcm_substream *substream,
  122. struct snd_soc_dai *cpu_dai)
  123. {
  124. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  125. struct atmel_pdmic *dd = snd_soc_card_get_drvdata(rtd->card);
  126. u32 val;
  127. /* Clean the PDMIC Converted Data Register */
  128. return regmap_read(dd->regmap, PDMIC_CDR, &val);
  129. }
  130. static const struct snd_soc_dai_ops atmel_pdmic_cpu_dai_ops = {
  131. .startup = atmel_pdmic_cpu_dai_startup,
  132. .shutdown = atmel_pdmic_cpu_dai_shutdown,
  133. .prepare = atmel_pdmic_cpu_dai_prepare,
  134. };
  135. #define ATMEL_PDMIC_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
  136. static struct snd_soc_dai_driver atmel_pdmic_cpu_dai = {
  137. .capture = {
  138. .channels_min = 1,
  139. .channels_max = 1,
  140. .rates = SNDRV_PCM_RATE_KNOT,
  141. .formats = ATMEL_PDMIC_FORMATS,},
  142. .ops = &atmel_pdmic_cpu_dai_ops,
  143. };
  144. static const struct snd_soc_component_driver atmel_pdmic_cpu_dai_component = {
  145. .name = "atmel-pdmic",
  146. };
  147. /* platform */
  148. #define ATMEL_PDMIC_MAX_BUF_SIZE (64 * 1024)
  149. #define ATMEL_PDMIC_PREALLOC_BUF_SIZE ATMEL_PDMIC_MAX_BUF_SIZE
  150. static const struct snd_pcm_hardware atmel_pdmic_hw = {
  151. .info = SNDRV_PCM_INFO_MMAP
  152. | SNDRV_PCM_INFO_MMAP_VALID
  153. | SNDRV_PCM_INFO_INTERLEAVED
  154. | SNDRV_PCM_INFO_RESUME
  155. | SNDRV_PCM_INFO_PAUSE,
  156. .formats = ATMEL_PDMIC_FORMATS,
  157. .buffer_bytes_max = ATMEL_PDMIC_MAX_BUF_SIZE,
  158. .period_bytes_min = 256,
  159. .period_bytes_max = 32 * 1024,
  160. .periods_min = 2,
  161. .periods_max = 256,
  162. };
  163. static int
  164. atmel_pdmic_platform_configure_dma(struct snd_pcm_substream *substream,
  165. struct snd_pcm_hw_params *params,
  166. struct dma_slave_config *slave_config)
  167. {
  168. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  169. struct atmel_pdmic *dd = snd_soc_card_get_drvdata(rtd->card);
  170. int ret;
  171. ret = snd_hwparams_to_dma_slave_config(substream, params,
  172. slave_config);
  173. if (ret) {
  174. dev_err(rtd->platform->dev,
  175. "hw params to dma slave configure failed\n");
  176. return ret;
  177. }
  178. slave_config->src_addr = dd->phy_base + PDMIC_CDR;
  179. slave_config->src_maxburst = 1;
  180. slave_config->dst_maxburst = 1;
  181. return 0;
  182. }
  183. static const struct snd_dmaengine_pcm_config
  184. atmel_pdmic_dmaengine_pcm_config = {
  185. .prepare_slave_config = atmel_pdmic_platform_configure_dma,
  186. .pcm_hardware = &atmel_pdmic_hw,
  187. .prealloc_buffer_size = ATMEL_PDMIC_PREALLOC_BUF_SIZE,
  188. };
  189. /* codec */
  190. /* Mic Gain = dgain * 2^(-scale) */
  191. struct mic_gain {
  192. unsigned int dgain;
  193. unsigned int scale;
  194. };
  195. /* range from -90 dB to 90 dB */
  196. static const struct mic_gain mic_gain_table[] = {
  197. { 1, 15}, { 1, 14}, /* -90, -84 dB */
  198. { 3, 15}, { 1, 13}, { 3, 14}, { 1, 12}, /* -81, -78, -75, -72 dB */
  199. { 5, 14}, { 13, 15}, /* -70, -68 dB */
  200. { 9, 14}, { 21, 15}, { 23, 15}, { 13, 14}, /* -65 ~ -62 dB */
  201. { 29, 15}, { 33, 15}, { 37, 15}, { 41, 15}, /* -61 ~ -58 dB */
  202. { 23, 14}, { 13, 13}, { 58, 15}, { 65, 15}, /* -57 ~ -54 dB */
  203. { 73, 15}, { 41, 14}, { 23, 13}, { 13, 12}, /* -53 ~ -50 dB */
  204. { 29, 13}, { 65, 14}, { 73, 14}, { 41, 13}, /* -49 ~ -46 dB */
  205. { 23, 12}, { 207, 15}, { 29, 12}, { 65, 13}, /* -45 ~ -42 dB */
  206. { 73, 13}, { 41, 12}, { 23, 11}, { 413, 15}, /* -41 ~ -38 dB */
  207. { 463, 15}, { 519, 15}, { 583, 15}, { 327, 14}, /* -37 ~ -34 dB */
  208. { 367, 14}, { 823, 15}, { 231, 13}, { 1036, 15}, /* -33 ~ -30 dB */
  209. { 1163, 15}, { 1305, 15}, { 183, 12}, { 1642, 15}, /* -29 ~ -26 dB */
  210. { 1843, 15}, { 2068, 15}, { 145, 11}, { 2603, 15}, /* -25 ~ -22 dB */
  211. { 365, 12}, { 3277, 15}, { 3677, 15}, { 4125, 15}, /* -21 ~ -18 dB */
  212. { 4629, 15}, { 5193, 15}, { 5827, 15}, { 3269, 14}, /* -17 ~ -14 dB */
  213. { 917, 12}, { 8231, 15}, { 9235, 15}, { 5181, 14}, /* -13 ~ -10 dB */
  214. {11627, 15}, {13045, 15}, {14637, 15}, {16423, 15}, /* -9 ~ -6 dB */
  215. {18427, 15}, {20675, 15}, { 5799, 13}, {26029, 15}, /* -5 ~ -2 dB */
  216. { 7301, 13}, { 1, 0}, {18383, 14}, {10313, 13}, /* -1 ~ 2 dB */
  217. {23143, 14}, {25967, 14}, {29135, 14}, {16345, 13}, /* 3 ~ 6 dB */
  218. { 4585, 11}, {20577, 13}, { 1443, 9}, {25905, 13}, /* 7 ~ 10 dB */
  219. {14533, 12}, { 8153, 11}, { 2287, 9}, {20529, 12}, /* 11 ~ 14 dB */
  220. {11517, 11}, { 6461, 10}, {28997, 12}, { 4067, 9}, /* 15 ~ 18 dB */
  221. {18253, 11}, { 10, 0}, {22979, 11}, {25783, 11}, /* 19 ~ 22 dB */
  222. {28929, 11}, {32459, 11}, { 9105, 9}, {20431, 10}, /* 23 ~ 26 dB */
  223. {22925, 10}, {12861, 9}, { 7215, 8}, {16191, 9}, /* 27 ~ 30 dB */
  224. { 9083, 8}, {20383, 9}, {11435, 8}, { 6145, 7}, /* 31 ~ 34 dB */
  225. { 3599, 6}, {32305, 9}, {18123, 8}, {20335, 8}, /* 35 ~ 38 dB */
  226. { 713, 3}, { 100, 0}, { 7181, 6}, { 8057, 6}, /* 39 ~ 42 dB */
  227. { 565, 2}, {20287, 7}, {11381, 6}, {25539, 7}, /* 43 ~ 46 dB */
  228. { 1791, 3}, { 4019, 4}, { 9019, 5}, {20239, 6}, /* 47 ~ 50 dB */
  229. { 5677, 4}, {25479, 6}, { 7147, 4}, { 8019, 4}, /* 51 ~ 54 dB */
  230. {17995, 5}, {20191, 5}, {11327, 4}, {12709, 4}, /* 55 ~ 58 dB */
  231. { 3565, 2}, { 1000, 0}, { 1122, 0}, { 1259, 0}, /* 59 ~ 62 dB */
  232. { 2825, 1}, {12679, 3}, { 7113, 2}, { 7981, 2}, /* 63 ~ 66 dB */
  233. { 8955, 2}, {20095, 3}, {22547, 3}, {12649, 2}, /* 67 ~ 70 dB */
  234. {28385, 3}, { 3981, 0}, {17867, 2}, {20047, 2}, /* 71 ~ 74 dB */
  235. {11247, 1}, {12619, 1}, {14159, 1}, {31773, 2}, /* 75 ~ 78 dB */
  236. {17825, 1}, {10000, 0}, {11220, 0}, {12589, 0}, /* 79 ~ 82 dB */
  237. {28251, 1}, {15849, 0}, {17783, 0}, {19953, 0}, /* 83 ~ 86 dB */
  238. {22387, 0}, {25119, 0}, {28184, 0}, {31623, 0}, /* 87 ~ 90 dB */
  239. };
  240. static const DECLARE_TLV_DB_RANGE(mic_gain_tlv,
  241. 0, 1, TLV_DB_SCALE_ITEM(-9000, 600, 0),
  242. 2, 5, TLV_DB_SCALE_ITEM(-8100, 300, 0),
  243. 6, 7, TLV_DB_SCALE_ITEM(-7000, 200, 0),
  244. 8, ARRAY_SIZE(mic_gain_table)-1, TLV_DB_SCALE_ITEM(-6500, 100, 0),
  245. );
  246. static int pdmic_get_mic_volsw(struct snd_kcontrol *kcontrol,
  247. struct snd_ctl_elem_value *ucontrol)
  248. {
  249. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  250. unsigned int dgain_val, scale_val;
  251. int i;
  252. dgain_val = (snd_soc_read(codec, PDMIC_DSPR1) & PDMIC_DSPR1_DGAIN_MASK)
  253. >> PDMIC_DSPR1_DGAIN_SHIFT;
  254. scale_val = (snd_soc_read(codec, PDMIC_DSPR0) & PDMIC_DSPR0_SCALE_MASK)
  255. >> PDMIC_DSPR0_SCALE_SHIFT;
  256. for (i = 0; i < ARRAY_SIZE(mic_gain_table); i++) {
  257. if ((mic_gain_table[i].dgain == dgain_val) &&
  258. (mic_gain_table[i].scale == scale_val))
  259. ucontrol->value.integer.value[0] = i;
  260. }
  261. return 0;
  262. }
  263. static int pdmic_put_mic_volsw(struct snd_kcontrol *kcontrol,
  264. struct snd_ctl_elem_value *ucontrol)
  265. {
  266. struct soc_mixer_control *mc =
  267. (struct soc_mixer_control *)kcontrol->private_value;
  268. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  269. int max = mc->max;
  270. unsigned int val;
  271. int ret;
  272. val = ucontrol->value.integer.value[0];
  273. if (val > max)
  274. return -EINVAL;
  275. ret = snd_soc_update_bits(codec, PDMIC_DSPR1, PDMIC_DSPR1_DGAIN_MASK,
  276. mic_gain_table[val].dgain << PDMIC_DSPR1_DGAIN_SHIFT);
  277. if (ret < 0)
  278. return ret;
  279. ret = snd_soc_update_bits(codec, PDMIC_DSPR0, PDMIC_DSPR0_SCALE_MASK,
  280. mic_gain_table[val].scale << PDMIC_DSPR0_SCALE_SHIFT);
  281. if (ret < 0)
  282. return ret;
  283. return 0;
  284. }
  285. static const struct snd_kcontrol_new atmel_pdmic_snd_controls[] = {
  286. SOC_SINGLE_EXT_TLV("Mic Capture Volume", PDMIC_DSPR1, PDMIC_DSPR1_DGAIN_SHIFT,
  287. ARRAY_SIZE(mic_gain_table)-1, 0,
  288. pdmic_get_mic_volsw, pdmic_put_mic_volsw, mic_gain_tlv),
  289. SOC_SINGLE("High Pass Filter Switch", PDMIC_DSPR0,
  290. PDMIC_DSPR0_HPFBYP_SHIFT, 1, 1),
  291. SOC_SINGLE("SINCC Filter Switch", PDMIC_DSPR0, PDMIC_DSPR0_SINBYP_SHIFT, 1, 1),
  292. };
  293. static int atmel_pdmic_codec_probe(struct snd_soc_codec *codec)
  294. {
  295. struct snd_soc_card *card = snd_soc_codec_get_drvdata(codec);
  296. struct atmel_pdmic *dd = snd_soc_card_get_drvdata(card);
  297. snd_soc_update_bits(codec, PDMIC_DSPR1, PDMIC_DSPR1_OFFSET_MASK,
  298. (u32)(dd->pdata->mic_offset << PDMIC_DSPR1_OFFSET_SHIFT));
  299. return 0;
  300. }
  301. static struct snd_soc_codec_driver soc_codec_dev_pdmic = {
  302. .probe = atmel_pdmic_codec_probe,
  303. .component_driver = {
  304. .controls = atmel_pdmic_snd_controls,
  305. .num_controls = ARRAY_SIZE(atmel_pdmic_snd_controls),
  306. },
  307. };
  308. /* codec dai component */
  309. #define PDMIC_MR_PRESCAL_MAX_VAL 127
  310. static int
  311. atmel_pdmic_codec_dai_hw_params(struct snd_pcm_substream *substream,
  312. struct snd_pcm_hw_params *params,
  313. struct snd_soc_dai *codec_dai)
  314. {
  315. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  316. struct atmel_pdmic *dd = snd_soc_card_get_drvdata(rtd->card);
  317. struct snd_soc_codec *codec = codec_dai->codec;
  318. unsigned int rate_min = substream->runtime->hw.rate_min;
  319. unsigned int rate_max = substream->runtime->hw.rate_max;
  320. int fs = params_rate(params);
  321. int bits = params_width(params);
  322. unsigned long pclk_rate, gclk_rate;
  323. unsigned int f_pdmic;
  324. u32 mr_val, dspr0_val, pclk_prescal, gclk_prescal;
  325. if (params_channels(params) != 1) {
  326. dev_err(codec->dev,
  327. "only supports one channel\n");
  328. return -EINVAL;
  329. }
  330. if ((fs < rate_min) || (fs > rate_max)) {
  331. dev_err(codec->dev,
  332. "sample rate is %dHz, min rate is %dHz, max rate is %dHz\n",
  333. fs, rate_min, rate_max);
  334. return -EINVAL;
  335. }
  336. switch (bits) {
  337. case 16:
  338. dspr0_val = (PDMIC_DSPR0_SIZE_16_BITS
  339. << PDMIC_DSPR0_SIZE_SHIFT);
  340. break;
  341. case 32:
  342. dspr0_val = (PDMIC_DSPR0_SIZE_32_BITS
  343. << PDMIC_DSPR0_SIZE_SHIFT);
  344. break;
  345. default:
  346. return -EINVAL;
  347. }
  348. if ((fs << 7) > (rate_max << 6)) {
  349. f_pdmic = fs << 6;
  350. dspr0_val |= PDMIC_DSPR0_OSR_64 << PDMIC_DSPR0_OSR_SHIFT;
  351. } else {
  352. f_pdmic = fs << 7;
  353. dspr0_val |= PDMIC_DSPR0_OSR_128 << PDMIC_DSPR0_OSR_SHIFT;
  354. }
  355. pclk_rate = clk_get_rate(dd->pclk);
  356. gclk_rate = clk_get_rate(dd->gclk);
  357. /* PRESCAL = SELCK/(2*f_pdmic) - 1*/
  358. pclk_prescal = (u32)(pclk_rate/(f_pdmic << 1)) - 1;
  359. gclk_prescal = (u32)(gclk_rate/(f_pdmic << 1)) - 1;
  360. if ((pclk_prescal > PDMIC_MR_PRESCAL_MAX_VAL) ||
  361. (gclk_rate/((gclk_prescal + 1) << 1) <
  362. pclk_rate/((pclk_prescal + 1) << 1))) {
  363. mr_val = gclk_prescal << PDMIC_MR_PRESCAL_SHIFT;
  364. mr_val |= PDMIC_MR_CLKS_GCK << PDMIC_MR_CLKS_SHIFT;
  365. } else {
  366. mr_val = pclk_prescal << PDMIC_MR_PRESCAL_SHIFT;
  367. mr_val |= PDMIC_MR_CLKS_PCK << PDMIC_MR_CLKS_SHIFT;
  368. }
  369. snd_soc_update_bits(codec, PDMIC_MR,
  370. PDMIC_MR_PRESCAL_MASK | PDMIC_MR_CLKS_MASK, mr_val);
  371. snd_soc_update_bits(codec, PDMIC_DSPR0,
  372. PDMIC_DSPR0_OSR_MASK | PDMIC_DSPR0_SIZE_MASK, dspr0_val);
  373. return 0;
  374. }
  375. static int atmel_pdmic_codec_dai_prepare(struct snd_pcm_substream *substream,
  376. struct snd_soc_dai *codec_dai)
  377. {
  378. struct snd_soc_codec *codec = codec_dai->codec;
  379. snd_soc_update_bits(codec, PDMIC_CR, PDMIC_CR_ENPDM_MASK,
  380. PDMIC_CR_ENPDM_DIS << PDMIC_CR_ENPDM_SHIFT);
  381. return 0;
  382. }
  383. static int atmel_pdmic_codec_dai_trigger(struct snd_pcm_substream *substream,
  384. int cmd, struct snd_soc_dai *codec_dai)
  385. {
  386. struct snd_soc_codec *codec = codec_dai->codec;
  387. u32 val;
  388. switch (cmd) {
  389. case SNDRV_PCM_TRIGGER_START:
  390. case SNDRV_PCM_TRIGGER_RESUME:
  391. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  392. val = PDMIC_CR_ENPDM_EN << PDMIC_CR_ENPDM_SHIFT;
  393. break;
  394. case SNDRV_PCM_TRIGGER_STOP:
  395. case SNDRV_PCM_TRIGGER_SUSPEND:
  396. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  397. val = PDMIC_CR_ENPDM_DIS << PDMIC_CR_ENPDM_SHIFT;
  398. break;
  399. default:
  400. return -EINVAL;
  401. }
  402. snd_soc_update_bits(codec, PDMIC_CR, PDMIC_CR_ENPDM_MASK, val);
  403. return 0;
  404. }
  405. static const struct snd_soc_dai_ops atmel_pdmic_codec_dai_ops = {
  406. .hw_params = atmel_pdmic_codec_dai_hw_params,
  407. .prepare = atmel_pdmic_codec_dai_prepare,
  408. .trigger = atmel_pdmic_codec_dai_trigger,
  409. };
  410. #define ATMEL_PDMIC_CODEC_DAI_NAME "atmel-pdmic-hifi"
  411. static struct snd_soc_dai_driver atmel_pdmic_codec_dai = {
  412. .name = ATMEL_PDMIC_CODEC_DAI_NAME,
  413. .capture = {
  414. .stream_name = "Capture",
  415. .channels_min = 1,
  416. .channels_max = 1,
  417. .rates = SNDRV_PCM_RATE_KNOT,
  418. .formats = ATMEL_PDMIC_FORMATS,
  419. },
  420. .ops = &atmel_pdmic_codec_dai_ops,
  421. };
  422. /* ASoC sound card */
  423. static int atmel_pdmic_asoc_card_init(struct device *dev,
  424. struct snd_soc_card *card)
  425. {
  426. struct snd_soc_dai_link *dai_link;
  427. struct atmel_pdmic *dd = snd_soc_card_get_drvdata(card);
  428. dai_link = devm_kzalloc(dev, sizeof(*dai_link), GFP_KERNEL);
  429. if (!dai_link)
  430. return -ENOMEM;
  431. dai_link->name = "PDMIC";
  432. dai_link->stream_name = "PDMIC PCM";
  433. dai_link->codec_dai_name = ATMEL_PDMIC_CODEC_DAI_NAME;
  434. dai_link->cpu_dai_name = dev_name(dev);
  435. dai_link->codec_name = dev_name(dev);
  436. dai_link->platform_name = dev_name(dev);
  437. card->dai_link = dai_link;
  438. card->num_links = 1;
  439. card->name = dd->pdata->card_name;
  440. card->dev = dev;
  441. return 0;
  442. }
  443. static void atmel_pdmic_get_sample_rate(struct atmel_pdmic *dd,
  444. unsigned int *rate_min, unsigned int *rate_max)
  445. {
  446. u32 mic_min_freq = dd->pdata->mic_min_freq;
  447. u32 mic_max_freq = dd->pdata->mic_max_freq;
  448. u32 clk_max_rate = (u32)(clk_get_rate(dd->pclk) >> 1);
  449. u32 clk_min_rate = (u32)(clk_get_rate(dd->gclk) >> 8);
  450. if (mic_max_freq > clk_max_rate)
  451. mic_max_freq = clk_max_rate;
  452. if (mic_min_freq < clk_min_rate)
  453. mic_min_freq = clk_min_rate;
  454. *rate_min = DIV_ROUND_CLOSEST(mic_min_freq, 128);
  455. *rate_max = mic_max_freq >> 6;
  456. }
  457. /* PDMIC interrupt handler */
  458. static irqreturn_t atmel_pdmic_interrupt(int irq, void *dev_id)
  459. {
  460. struct atmel_pdmic *dd = (struct atmel_pdmic *)dev_id;
  461. u32 pdmic_isr;
  462. irqreturn_t ret = IRQ_NONE;
  463. regmap_read(dd->regmap, PDMIC_ISR, &pdmic_isr);
  464. if (pdmic_isr & PDMIC_ISR_OVRE) {
  465. regmap_update_bits(dd->regmap, PDMIC_CR, PDMIC_CR_ENPDM_MASK,
  466. PDMIC_CR_ENPDM_DIS << PDMIC_CR_ENPDM_SHIFT);
  467. snd_pcm_stop_xrun(dd->substream);
  468. ret = IRQ_HANDLED;
  469. }
  470. return ret;
  471. }
  472. /* regmap configuration */
  473. #define ATMEL_PDMIC_REG_MAX 0x124
  474. static const struct regmap_config atmel_pdmic_regmap_config = {
  475. .reg_bits = 32,
  476. .reg_stride = 4,
  477. .val_bits = 32,
  478. .max_register = ATMEL_PDMIC_REG_MAX,
  479. };
  480. static int atmel_pdmic_probe(struct platform_device *pdev)
  481. {
  482. struct device *dev = &pdev->dev;
  483. struct atmel_pdmic *dd;
  484. struct resource *res;
  485. void __iomem *io_base;
  486. const struct atmel_pdmic_pdata *pdata;
  487. struct snd_soc_card *card;
  488. unsigned int rate_min, rate_max;
  489. int ret;
  490. pdata = atmel_pdmic_dt_init(dev);
  491. if (IS_ERR(pdata))
  492. return PTR_ERR(pdata);
  493. dd = devm_kzalloc(dev, sizeof(*dd), GFP_KERNEL);
  494. if (!dd)
  495. return -ENOMEM;
  496. dd->pdata = pdata;
  497. dd->irq = platform_get_irq(pdev, 0);
  498. if (dd->irq < 0) {
  499. ret = dd->irq;
  500. dev_err(dev, "failed to get irq: %d\n", ret);
  501. return ret;
  502. }
  503. dd->pclk = devm_clk_get(dev, "pclk");
  504. if (IS_ERR(dd->pclk)) {
  505. ret = PTR_ERR(dd->pclk);
  506. dev_err(dev, "failed to get peripheral clock: %d\n", ret);
  507. return ret;
  508. }
  509. dd->gclk = devm_clk_get(dev, "gclk");
  510. if (IS_ERR(dd->gclk)) {
  511. ret = PTR_ERR(dd->gclk);
  512. dev_err(dev, "failed to get GCK: %d\n", ret);
  513. return ret;
  514. }
  515. /* The gclk clock frequency must always be three times
  516. * lower than the pclk clock frequency
  517. */
  518. ret = clk_set_rate(dd->gclk, clk_get_rate(dd->pclk)/3);
  519. if (ret) {
  520. dev_err(dev, "failed to set GCK clock rate: %d\n", ret);
  521. return ret;
  522. }
  523. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  524. io_base = devm_ioremap_resource(dev, res);
  525. if (IS_ERR(io_base)) {
  526. ret = PTR_ERR(io_base);
  527. dev_err(dev, "failed to remap register memory: %d\n", ret);
  528. return ret;
  529. }
  530. dd->phy_base = res->start;
  531. dd->regmap = devm_regmap_init_mmio(dev, io_base,
  532. &atmel_pdmic_regmap_config);
  533. if (IS_ERR(dd->regmap)) {
  534. ret = PTR_ERR(dd->regmap);
  535. dev_err(dev, "failed to init register map: %d\n", ret);
  536. return ret;
  537. }
  538. ret = devm_request_irq(dev, dd->irq, atmel_pdmic_interrupt, 0,
  539. "PDMIC", (void *)dd);
  540. if (ret < 0) {
  541. dev_err(dev, "can't register ISR for IRQ %u (ret=%i)\n",
  542. dd->irq, ret);
  543. return ret;
  544. }
  545. /* Get the minimal and maximal sample rate that the microphone supports */
  546. atmel_pdmic_get_sample_rate(dd, &rate_min, &rate_max);
  547. /* register cpu dai */
  548. atmel_pdmic_cpu_dai.capture.rate_min = rate_min;
  549. atmel_pdmic_cpu_dai.capture.rate_max = rate_max;
  550. ret = devm_snd_soc_register_component(dev,
  551. &atmel_pdmic_cpu_dai_component,
  552. &atmel_pdmic_cpu_dai, 1);
  553. if (ret) {
  554. dev_err(dev, "could not register CPU DAI: %d\n", ret);
  555. return ret;
  556. }
  557. /* register platform */
  558. ret = devm_snd_dmaengine_pcm_register(dev,
  559. &atmel_pdmic_dmaengine_pcm_config,
  560. 0);
  561. if (ret) {
  562. dev_err(dev, "could not register platform: %d\n", ret);
  563. return ret;
  564. }
  565. /* register codec and codec dai */
  566. atmel_pdmic_codec_dai.capture.rate_min = rate_min;
  567. atmel_pdmic_codec_dai.capture.rate_max = rate_max;
  568. ret = snd_soc_register_codec(dev, &soc_codec_dev_pdmic,
  569. &atmel_pdmic_codec_dai, 1);
  570. if (ret) {
  571. dev_err(dev, "could not register codec: %d\n", ret);
  572. return ret;
  573. }
  574. /* register sound card */
  575. card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL);
  576. if (!card) {
  577. ret = -ENOMEM;
  578. goto unregister_codec;
  579. }
  580. snd_soc_card_set_drvdata(card, dd);
  581. platform_set_drvdata(pdev, card);
  582. ret = atmel_pdmic_asoc_card_init(dev, card);
  583. if (ret) {
  584. dev_err(dev, "failed to init sound card: %d\n", ret);
  585. goto unregister_codec;
  586. }
  587. ret = devm_snd_soc_register_card(dev, card);
  588. if (ret) {
  589. dev_err(dev, "failed to register sound card: %d\n", ret);
  590. goto unregister_codec;
  591. }
  592. return 0;
  593. unregister_codec:
  594. snd_soc_unregister_codec(dev);
  595. return ret;
  596. }
  597. static int atmel_pdmic_remove(struct platform_device *pdev)
  598. {
  599. snd_soc_unregister_codec(&pdev->dev);
  600. return 0;
  601. }
  602. static struct platform_driver atmel_pdmic_driver = {
  603. .driver = {
  604. .name = "atmel-pdmic",
  605. .of_match_table = of_match_ptr(atmel_pdmic_of_match),
  606. .pm = &snd_soc_pm_ops,
  607. },
  608. .probe = atmel_pdmic_probe,
  609. .remove = atmel_pdmic_remove,
  610. };
  611. module_platform_driver(atmel_pdmic_driver);
  612. MODULE_DESCRIPTION("Atmel PDMIC driver under ALSA SoC architecture");
  613. MODULE_AUTHOR("Songjun Wu <songjun.wu@atmel.com>");
  614. MODULE_LICENSE("GPL v2");