atmel-classd.c 18 KB

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  1. /* Atmel ALSA SoC Audio Class D Amplifier (CLASSD) driver
  2. *
  3. * Copyright (C) 2015 Atmel
  4. *
  5. * Author: Songjun Wu <songjun.wu@atmel.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 or later
  9. * as published by the Free Software Foundation.
  10. */
  11. #include <linux/of.h>
  12. #include <linux/clk.h>
  13. #include <linux/module.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/regmap.h>
  16. #include <sound/core.h>
  17. #include <sound/dmaengine_pcm.h>
  18. #include <sound/pcm_params.h>
  19. #include <sound/tlv.h>
  20. #include "atmel-classd.h"
  21. struct atmel_classd_pdata {
  22. bool non_overlap_enable;
  23. int non_overlap_time;
  24. int pwm_type;
  25. const char *card_name;
  26. };
  27. struct atmel_classd {
  28. dma_addr_t phy_base;
  29. struct regmap *regmap;
  30. struct clk *pclk;
  31. struct clk *gclk;
  32. struct clk *aclk;
  33. int irq;
  34. const struct atmel_classd_pdata *pdata;
  35. };
  36. #ifdef CONFIG_OF
  37. static const struct of_device_id atmel_classd_of_match[] = {
  38. {
  39. .compatible = "atmel,sama5d2-classd",
  40. }, {
  41. /* sentinel */
  42. }
  43. };
  44. MODULE_DEVICE_TABLE(of, atmel_classd_of_match);
  45. static struct atmel_classd_pdata *atmel_classd_dt_init(struct device *dev)
  46. {
  47. struct device_node *np = dev->of_node;
  48. struct atmel_classd_pdata *pdata;
  49. const char *pwm_type;
  50. int ret;
  51. if (!np) {
  52. dev_err(dev, "device node not found\n");
  53. return ERR_PTR(-EINVAL);
  54. }
  55. pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
  56. if (!pdata)
  57. return ERR_PTR(-ENOMEM);
  58. ret = of_property_read_string(np, "atmel,pwm-type", &pwm_type);
  59. if ((ret == 0) && (strcmp(pwm_type, "diff") == 0))
  60. pdata->pwm_type = CLASSD_MR_PWMTYP_DIFF;
  61. else
  62. pdata->pwm_type = CLASSD_MR_PWMTYP_SINGLE;
  63. ret = of_property_read_u32(np,
  64. "atmel,non-overlap-time", &pdata->non_overlap_time);
  65. if (ret)
  66. pdata->non_overlap_enable = false;
  67. else
  68. pdata->non_overlap_enable = true;
  69. ret = of_property_read_string(np, "atmel,model", &pdata->card_name);
  70. if (ret)
  71. pdata->card_name = "CLASSD";
  72. return pdata;
  73. }
  74. #else
  75. static inline struct atmel_classd_pdata *
  76. atmel_classd_dt_init(struct device *dev)
  77. {
  78. return ERR_PTR(-EINVAL);
  79. }
  80. #endif
  81. #define ATMEL_CLASSD_RATES (SNDRV_PCM_RATE_8000 \
  82. | SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 \
  83. | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 \
  84. | SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 \
  85. | SNDRV_PCM_RATE_96000)
  86. static const struct snd_pcm_hardware atmel_classd_hw = {
  87. .info = SNDRV_PCM_INFO_MMAP
  88. | SNDRV_PCM_INFO_MMAP_VALID
  89. | SNDRV_PCM_INFO_INTERLEAVED
  90. | SNDRV_PCM_INFO_RESUME
  91. | SNDRV_PCM_INFO_PAUSE,
  92. .formats = (SNDRV_PCM_FMTBIT_S16_LE),
  93. .rates = ATMEL_CLASSD_RATES,
  94. .rate_min = 8000,
  95. .rate_max = 96000,
  96. .channels_min = 1,
  97. .channels_max = 2,
  98. .buffer_bytes_max = 64 * 1024,
  99. .period_bytes_min = 256,
  100. .period_bytes_max = 32 * 1024,
  101. .periods_min = 2,
  102. .periods_max = 256,
  103. };
  104. #define ATMEL_CLASSD_PREALLOC_BUF_SIZE (64 * 1024)
  105. /* cpu dai component */
  106. static int atmel_classd_cpu_dai_startup(struct snd_pcm_substream *substream,
  107. struct snd_soc_dai *cpu_dai)
  108. {
  109. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  110. struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card);
  111. regmap_write(dd->regmap, CLASSD_THR, 0x0);
  112. return clk_prepare_enable(dd->pclk);
  113. }
  114. static void atmel_classd_cpu_dai_shutdown(struct snd_pcm_substream *substream,
  115. struct snd_soc_dai *cpu_dai)
  116. {
  117. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  118. struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card);
  119. clk_disable_unprepare(dd->pclk);
  120. }
  121. static const struct snd_soc_dai_ops atmel_classd_cpu_dai_ops = {
  122. .startup = atmel_classd_cpu_dai_startup,
  123. .shutdown = atmel_classd_cpu_dai_shutdown,
  124. };
  125. static struct snd_soc_dai_driver atmel_classd_cpu_dai = {
  126. .playback = {
  127. .channels_min = 1,
  128. .channels_max = 2,
  129. .rates = ATMEL_CLASSD_RATES,
  130. .formats = SNDRV_PCM_FMTBIT_S16_LE,},
  131. .ops = &atmel_classd_cpu_dai_ops,
  132. };
  133. static const struct snd_soc_component_driver atmel_classd_cpu_dai_component = {
  134. .name = "atmel-classd",
  135. };
  136. /* platform */
  137. static int
  138. atmel_classd_platform_configure_dma(struct snd_pcm_substream *substream,
  139. struct snd_pcm_hw_params *params,
  140. struct dma_slave_config *slave_config)
  141. {
  142. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  143. struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card);
  144. if (params_physical_width(params) != 16) {
  145. dev_err(rtd->platform->dev,
  146. "only supports 16-bit audio data\n");
  147. return -EINVAL;
  148. }
  149. if (params_channels(params) == 1)
  150. slave_config->dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
  151. else
  152. slave_config->dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
  153. slave_config->direction = DMA_MEM_TO_DEV;
  154. slave_config->dst_addr = dd->phy_base + CLASSD_THR;
  155. slave_config->dst_maxburst = 1;
  156. slave_config->src_maxburst = 1;
  157. slave_config->device_fc = false;
  158. return 0;
  159. }
  160. static const struct snd_dmaengine_pcm_config
  161. atmel_classd_dmaengine_pcm_config = {
  162. .prepare_slave_config = atmel_classd_platform_configure_dma,
  163. .pcm_hardware = &atmel_classd_hw,
  164. .prealloc_buffer_size = ATMEL_CLASSD_PREALLOC_BUF_SIZE,
  165. };
  166. /* codec */
  167. static const char * const mono_mode_text[] = {
  168. "mix", "sat", "left", "right"
  169. };
  170. static SOC_ENUM_SINGLE_DECL(classd_mono_mode_enum,
  171. CLASSD_INTPMR, CLASSD_INTPMR_MONO_MODE_SHIFT,
  172. mono_mode_text);
  173. static const char * const eqcfg_text[] = {
  174. "Treble-12dB", "Treble-6dB",
  175. "Medium-8dB", "Medium-3dB",
  176. "Bass-12dB", "Bass-6dB",
  177. "0 dB",
  178. "Bass+6dB", "Bass+12dB",
  179. "Medium+3dB", "Medium+8dB",
  180. "Treble+6dB", "Treble+12dB",
  181. };
  182. static const unsigned int eqcfg_value[] = {
  183. CLASSD_INTPMR_EQCFG_T_CUT_12, CLASSD_INTPMR_EQCFG_T_CUT_6,
  184. CLASSD_INTPMR_EQCFG_M_CUT_8, CLASSD_INTPMR_EQCFG_M_CUT_3,
  185. CLASSD_INTPMR_EQCFG_B_CUT_12, CLASSD_INTPMR_EQCFG_B_CUT_6,
  186. CLASSD_INTPMR_EQCFG_FLAT,
  187. CLASSD_INTPMR_EQCFG_B_BOOST_6, CLASSD_INTPMR_EQCFG_B_BOOST_12,
  188. CLASSD_INTPMR_EQCFG_M_BOOST_3, CLASSD_INTPMR_EQCFG_M_BOOST_8,
  189. CLASSD_INTPMR_EQCFG_T_BOOST_6, CLASSD_INTPMR_EQCFG_T_BOOST_12,
  190. };
  191. static SOC_VALUE_ENUM_SINGLE_DECL(classd_eqcfg_enum,
  192. CLASSD_INTPMR, CLASSD_INTPMR_EQCFG_SHIFT, 0xf,
  193. eqcfg_text, eqcfg_value);
  194. static const DECLARE_TLV_DB_SCALE(classd_digital_tlv, -7800, 100, 1);
  195. static const struct snd_kcontrol_new atmel_classd_snd_controls[] = {
  196. SOC_DOUBLE_TLV("Playback Volume", CLASSD_INTPMR,
  197. CLASSD_INTPMR_ATTL_SHIFT, CLASSD_INTPMR_ATTR_SHIFT,
  198. 78, 1, classd_digital_tlv),
  199. SOC_SINGLE("Deemphasis Switch", CLASSD_INTPMR,
  200. CLASSD_INTPMR_DEEMP_SHIFT, 1, 0),
  201. SOC_SINGLE("Mono Switch", CLASSD_INTPMR, CLASSD_INTPMR_MONO_SHIFT, 1, 0),
  202. SOC_SINGLE("Swap Switch", CLASSD_INTPMR, CLASSD_INTPMR_SWAP_SHIFT, 1, 0),
  203. SOC_ENUM("Mono Mode", classd_mono_mode_enum),
  204. SOC_ENUM("EQ", classd_eqcfg_enum),
  205. };
  206. static const char * const pwm_type[] = {
  207. "Single ended", "Differential"
  208. };
  209. static int atmel_classd_codec_probe(struct snd_soc_codec *codec)
  210. {
  211. struct snd_soc_card *card = snd_soc_codec_get_drvdata(codec);
  212. struct atmel_classd *dd = snd_soc_card_get_drvdata(card);
  213. const struct atmel_classd_pdata *pdata = dd->pdata;
  214. u32 mask, val;
  215. mask = CLASSD_MR_PWMTYP_MASK;
  216. val = pdata->pwm_type << CLASSD_MR_PWMTYP_SHIFT;
  217. mask |= CLASSD_MR_NON_OVERLAP_MASK;
  218. if (pdata->non_overlap_enable) {
  219. val |= (CLASSD_MR_NON_OVERLAP_EN
  220. << CLASSD_MR_NON_OVERLAP_SHIFT);
  221. mask |= CLASSD_MR_NOVR_VAL_MASK;
  222. switch (pdata->non_overlap_time) {
  223. case 5:
  224. val |= (CLASSD_MR_NOVR_VAL_5NS
  225. << CLASSD_MR_NOVR_VAL_SHIFT);
  226. break;
  227. case 10:
  228. val |= (CLASSD_MR_NOVR_VAL_10NS
  229. << CLASSD_MR_NOVR_VAL_SHIFT);
  230. break;
  231. case 15:
  232. val |= (CLASSD_MR_NOVR_VAL_15NS
  233. << CLASSD_MR_NOVR_VAL_SHIFT);
  234. break;
  235. case 20:
  236. val |= (CLASSD_MR_NOVR_VAL_20NS
  237. << CLASSD_MR_NOVR_VAL_SHIFT);
  238. break;
  239. default:
  240. val |= (CLASSD_MR_NOVR_VAL_10NS
  241. << CLASSD_MR_NOVR_VAL_SHIFT);
  242. dev_warn(codec->dev,
  243. "non-overlapping value %d is invalid, the default value 10 is specified\n",
  244. pdata->non_overlap_time);
  245. break;
  246. }
  247. }
  248. snd_soc_update_bits(codec, CLASSD_MR, mask, val);
  249. dev_info(codec->dev,
  250. "PWM modulation type is %s, non-overlapping is %s\n",
  251. pwm_type[pdata->pwm_type],
  252. pdata->non_overlap_enable?"enabled":"disabled");
  253. return 0;
  254. }
  255. static struct regmap *atmel_classd_codec_get_remap(struct device *dev)
  256. {
  257. return dev_get_regmap(dev, NULL);
  258. }
  259. static struct snd_soc_codec_driver soc_codec_dev_classd = {
  260. .probe = atmel_classd_codec_probe,
  261. .get_regmap = atmel_classd_codec_get_remap,
  262. .component_driver = {
  263. .controls = atmel_classd_snd_controls,
  264. .num_controls = ARRAY_SIZE(atmel_classd_snd_controls),
  265. },
  266. };
  267. /* codec dai component */
  268. static int atmel_classd_codec_dai_startup(struct snd_pcm_substream *substream,
  269. struct snd_soc_dai *codec_dai)
  270. {
  271. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  272. struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card);
  273. int ret;
  274. ret = clk_prepare_enable(dd->aclk);
  275. if (ret)
  276. return ret;
  277. return clk_prepare_enable(dd->gclk);
  278. }
  279. static int atmel_classd_codec_dai_digital_mute(struct snd_soc_dai *codec_dai,
  280. int mute)
  281. {
  282. struct snd_soc_codec *codec = codec_dai->codec;
  283. u32 mask, val;
  284. mask = CLASSD_MR_LMUTE_MASK | CLASSD_MR_RMUTE_MASK;
  285. if (mute)
  286. val = mask;
  287. else
  288. val = 0;
  289. snd_soc_update_bits(codec, CLASSD_MR, mask, val);
  290. return 0;
  291. }
  292. #define CLASSD_ACLK_RATE_11M2896_MPY_8 (112896 * 100 * 8)
  293. #define CLASSD_ACLK_RATE_12M288_MPY_8 (12288 * 1000 * 8)
  294. static struct {
  295. int rate;
  296. int sample_rate;
  297. int dsp_clk;
  298. unsigned long aclk_rate;
  299. } const sample_rates[] = {
  300. { 8000, CLASSD_INTPMR_FRAME_8K,
  301. CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_ACLK_RATE_12M288_MPY_8 },
  302. { 16000, CLASSD_INTPMR_FRAME_16K,
  303. CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_ACLK_RATE_12M288_MPY_8 },
  304. { 32000, CLASSD_INTPMR_FRAME_32K,
  305. CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_ACLK_RATE_12M288_MPY_8 },
  306. { 48000, CLASSD_INTPMR_FRAME_48K,
  307. CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_ACLK_RATE_12M288_MPY_8 },
  308. { 96000, CLASSD_INTPMR_FRAME_96K,
  309. CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_ACLK_RATE_12M288_MPY_8 },
  310. { 22050, CLASSD_INTPMR_FRAME_22K,
  311. CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_ACLK_RATE_11M2896_MPY_8 },
  312. { 44100, CLASSD_INTPMR_FRAME_44K,
  313. CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_ACLK_RATE_11M2896_MPY_8 },
  314. { 88200, CLASSD_INTPMR_FRAME_88K,
  315. CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_ACLK_RATE_11M2896_MPY_8 },
  316. };
  317. static int
  318. atmel_classd_codec_dai_hw_params(struct snd_pcm_substream *substream,
  319. struct snd_pcm_hw_params *params,
  320. struct snd_soc_dai *codec_dai)
  321. {
  322. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  323. struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card);
  324. struct snd_soc_codec *codec = codec_dai->codec;
  325. int fs;
  326. int i, best, best_val, cur_val, ret;
  327. u32 mask, val;
  328. fs = params_rate(params);
  329. best = 0;
  330. best_val = abs(fs - sample_rates[0].rate);
  331. for (i = 1; i < ARRAY_SIZE(sample_rates); i++) {
  332. /* Closest match */
  333. cur_val = abs(fs - sample_rates[i].rate);
  334. if (cur_val < best_val) {
  335. best = i;
  336. best_val = cur_val;
  337. }
  338. }
  339. dev_dbg(codec->dev,
  340. "Selected SAMPLE_RATE of %dHz, ACLK_RATE of %ldHz\n",
  341. sample_rates[best].rate, sample_rates[best].aclk_rate);
  342. clk_disable_unprepare(dd->gclk);
  343. clk_disable_unprepare(dd->aclk);
  344. ret = clk_set_rate(dd->aclk, sample_rates[best].aclk_rate);
  345. if (ret)
  346. return ret;
  347. mask = CLASSD_INTPMR_DSP_CLK_FREQ_MASK | CLASSD_INTPMR_FRAME_MASK;
  348. val = (sample_rates[best].dsp_clk << CLASSD_INTPMR_DSP_CLK_FREQ_SHIFT)
  349. | (sample_rates[best].sample_rate << CLASSD_INTPMR_FRAME_SHIFT);
  350. snd_soc_update_bits(codec, CLASSD_INTPMR, mask, val);
  351. ret = clk_prepare_enable(dd->aclk);
  352. if (ret)
  353. return ret;
  354. return clk_prepare_enable(dd->gclk);
  355. }
  356. static void
  357. atmel_classd_codec_dai_shutdown(struct snd_pcm_substream *substream,
  358. struct snd_soc_dai *codec_dai)
  359. {
  360. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  361. struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card);
  362. clk_disable_unprepare(dd->gclk);
  363. clk_disable_unprepare(dd->aclk);
  364. }
  365. static int atmel_classd_codec_dai_prepare(struct snd_pcm_substream *substream,
  366. struct snd_soc_dai *codec_dai)
  367. {
  368. struct snd_soc_codec *codec = codec_dai->codec;
  369. snd_soc_update_bits(codec, CLASSD_MR,
  370. CLASSD_MR_LEN_MASK | CLASSD_MR_REN_MASK,
  371. (CLASSD_MR_LEN_DIS << CLASSD_MR_LEN_SHIFT)
  372. |(CLASSD_MR_REN_DIS << CLASSD_MR_REN_SHIFT));
  373. return 0;
  374. }
  375. static int atmel_classd_codec_dai_trigger(struct snd_pcm_substream *substream,
  376. int cmd, struct snd_soc_dai *codec_dai)
  377. {
  378. struct snd_soc_codec *codec = codec_dai->codec;
  379. u32 mask, val;
  380. mask = CLASSD_MR_LEN_MASK | CLASSD_MR_REN_MASK;
  381. switch (cmd) {
  382. case SNDRV_PCM_TRIGGER_START:
  383. case SNDRV_PCM_TRIGGER_RESUME:
  384. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  385. val = mask;
  386. break;
  387. case SNDRV_PCM_TRIGGER_STOP:
  388. case SNDRV_PCM_TRIGGER_SUSPEND:
  389. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  390. val = (CLASSD_MR_LEN_DIS << CLASSD_MR_LEN_SHIFT)
  391. | (CLASSD_MR_REN_DIS << CLASSD_MR_REN_SHIFT);
  392. break;
  393. default:
  394. return -EINVAL;
  395. }
  396. snd_soc_update_bits(codec, CLASSD_MR, mask, val);
  397. return 0;
  398. }
  399. static const struct snd_soc_dai_ops atmel_classd_codec_dai_ops = {
  400. .digital_mute = atmel_classd_codec_dai_digital_mute,
  401. .startup = atmel_classd_codec_dai_startup,
  402. .shutdown = atmel_classd_codec_dai_shutdown,
  403. .hw_params = atmel_classd_codec_dai_hw_params,
  404. .prepare = atmel_classd_codec_dai_prepare,
  405. .trigger = atmel_classd_codec_dai_trigger,
  406. };
  407. #define ATMEL_CLASSD_CODEC_DAI_NAME "atmel-classd-hifi"
  408. static struct snd_soc_dai_driver atmel_classd_codec_dai = {
  409. .name = ATMEL_CLASSD_CODEC_DAI_NAME,
  410. .playback = {
  411. .stream_name = "Playback",
  412. .channels_min = 1,
  413. .channels_max = 2,
  414. .rates = ATMEL_CLASSD_RATES,
  415. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  416. },
  417. .ops = &atmel_classd_codec_dai_ops,
  418. };
  419. /* ASoC sound card */
  420. static int atmel_classd_asoc_card_init(struct device *dev,
  421. struct snd_soc_card *card)
  422. {
  423. struct snd_soc_dai_link *dai_link;
  424. struct atmel_classd *dd = snd_soc_card_get_drvdata(card);
  425. dai_link = devm_kzalloc(dev, sizeof(*dai_link), GFP_KERNEL);
  426. if (!dai_link)
  427. return -ENOMEM;
  428. dai_link->name = "CLASSD";
  429. dai_link->stream_name = "CLASSD PCM";
  430. dai_link->codec_dai_name = ATMEL_CLASSD_CODEC_DAI_NAME;
  431. dai_link->cpu_dai_name = dev_name(dev);
  432. dai_link->codec_name = dev_name(dev);
  433. dai_link->platform_name = dev_name(dev);
  434. card->dai_link = dai_link;
  435. card->num_links = 1;
  436. card->name = dd->pdata->card_name;
  437. card->dev = dev;
  438. return 0;
  439. };
  440. /* regmap configuration */
  441. static const struct reg_default atmel_classd_reg_defaults[] = {
  442. { CLASSD_INTPMR, 0x00301212 },
  443. };
  444. #define ATMEL_CLASSD_REG_MAX 0xE4
  445. static const struct regmap_config atmel_classd_regmap_config = {
  446. .reg_bits = 32,
  447. .reg_stride = 4,
  448. .val_bits = 32,
  449. .max_register = ATMEL_CLASSD_REG_MAX,
  450. .cache_type = REGCACHE_FLAT,
  451. .reg_defaults = atmel_classd_reg_defaults,
  452. .num_reg_defaults = ARRAY_SIZE(atmel_classd_reg_defaults),
  453. };
  454. static int atmel_classd_probe(struct platform_device *pdev)
  455. {
  456. struct device *dev = &pdev->dev;
  457. struct atmel_classd *dd;
  458. struct resource *res;
  459. void __iomem *io_base;
  460. const struct atmel_classd_pdata *pdata;
  461. struct snd_soc_card *card;
  462. int ret;
  463. pdata = dev_get_platdata(dev);
  464. if (!pdata) {
  465. pdata = atmel_classd_dt_init(dev);
  466. if (IS_ERR(pdata))
  467. return PTR_ERR(pdata);
  468. }
  469. dd = devm_kzalloc(dev, sizeof(*dd), GFP_KERNEL);
  470. if (!dd)
  471. return -ENOMEM;
  472. dd->pdata = pdata;
  473. dd->irq = platform_get_irq(pdev, 0);
  474. if (dd->irq < 0) {
  475. ret = dd->irq;
  476. dev_err(dev, "failed to could not get irq: %d\n", ret);
  477. return ret;
  478. }
  479. dd->pclk = devm_clk_get(dev, "pclk");
  480. if (IS_ERR(dd->pclk)) {
  481. ret = PTR_ERR(dd->pclk);
  482. dev_err(dev, "failed to get peripheral clock: %d\n", ret);
  483. return ret;
  484. }
  485. dd->gclk = devm_clk_get(dev, "gclk");
  486. if (IS_ERR(dd->gclk)) {
  487. ret = PTR_ERR(dd->gclk);
  488. dev_err(dev, "failed to get GCK clock: %d\n", ret);
  489. return ret;
  490. }
  491. dd->aclk = devm_clk_get(dev, "aclk");
  492. if (IS_ERR(dd->aclk)) {
  493. ret = PTR_ERR(dd->aclk);
  494. dev_err(dev, "failed to get audio clock: %d\n", ret);
  495. return ret;
  496. }
  497. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  498. io_base = devm_ioremap_resource(dev, res);
  499. if (IS_ERR(io_base)) {
  500. ret = PTR_ERR(io_base);
  501. dev_err(dev, "failed to remap register memory: %d\n", ret);
  502. return ret;
  503. }
  504. dd->phy_base = res->start;
  505. dd->regmap = devm_regmap_init_mmio(dev, io_base,
  506. &atmel_classd_regmap_config);
  507. if (IS_ERR(dd->regmap)) {
  508. ret = PTR_ERR(dd->regmap);
  509. dev_err(dev, "failed to init register map: %d\n", ret);
  510. return ret;
  511. }
  512. ret = devm_snd_soc_register_component(dev,
  513. &atmel_classd_cpu_dai_component,
  514. &atmel_classd_cpu_dai, 1);
  515. if (ret) {
  516. dev_err(dev, "could not register CPU DAI: %d\n", ret);
  517. return ret;
  518. }
  519. ret = devm_snd_dmaengine_pcm_register(dev,
  520. &atmel_classd_dmaengine_pcm_config,
  521. 0);
  522. if (ret) {
  523. dev_err(dev, "could not register platform: %d\n", ret);
  524. return ret;
  525. }
  526. ret = snd_soc_register_codec(dev, &soc_codec_dev_classd,
  527. &atmel_classd_codec_dai, 1);
  528. if (ret) {
  529. dev_err(dev, "could not register codec: %d\n", ret);
  530. return ret;
  531. }
  532. /* register sound card */
  533. card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL);
  534. if (!card) {
  535. ret = -ENOMEM;
  536. goto unregister_codec;
  537. }
  538. snd_soc_card_set_drvdata(card, dd);
  539. platform_set_drvdata(pdev, card);
  540. ret = atmel_classd_asoc_card_init(dev, card);
  541. if (ret) {
  542. dev_err(dev, "failed to init sound card\n");
  543. goto unregister_codec;
  544. }
  545. ret = devm_snd_soc_register_card(dev, card);
  546. if (ret) {
  547. dev_err(dev, "failed to register sound card: %d\n", ret);
  548. goto unregister_codec;
  549. }
  550. return 0;
  551. unregister_codec:
  552. snd_soc_unregister_codec(dev);
  553. return ret;
  554. }
  555. static int atmel_classd_remove(struct platform_device *pdev)
  556. {
  557. snd_soc_unregister_codec(&pdev->dev);
  558. return 0;
  559. }
  560. static struct platform_driver atmel_classd_driver = {
  561. .driver = {
  562. .name = "atmel-classd",
  563. .of_match_table = of_match_ptr(atmel_classd_of_match),
  564. .pm = &snd_soc_pm_ops,
  565. },
  566. .probe = atmel_classd_probe,
  567. .remove = atmel_classd_remove,
  568. };
  569. module_platform_driver(atmel_classd_driver);
  570. MODULE_DESCRIPTION("Atmel ClassD driver under ALSA SoC architecture");
  571. MODULE_AUTHOR("Songjun Wu <songjun.wu@atmel.com>");
  572. MODULE_LICENSE("GPL");