qoriq_thermal.c 7.9 KB

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  1. /*
  2. * Copyright 2016 Freescale Semiconductor, Inc.
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms and conditions of the GNU General Public License,
  6. * version 2, as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope it will be useful, but WITHOUT
  9. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  11. * more details.
  12. *
  13. */
  14. #include <linux/module.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/err.h>
  17. #include <linux/io.h>
  18. #include <linux/of.h>
  19. #include <linux/of_address.h>
  20. #include <linux/thermal.h>
  21. #include "thermal_core.h"
  22. #define SITES_MAX 16
  23. /*
  24. * QorIQ TMU Registers
  25. */
  26. struct qoriq_tmu_site_regs {
  27. u32 tritsr; /* Immediate Temperature Site Register */
  28. u32 tratsr; /* Average Temperature Site Register */
  29. u8 res0[0x8];
  30. };
  31. struct qoriq_tmu_regs {
  32. u32 tmr; /* Mode Register */
  33. #define TMR_DISABLE 0x0
  34. #define TMR_ME 0x80000000
  35. #define TMR_ALPF 0x0c000000
  36. u32 tsr; /* Status Register */
  37. u32 tmtmir; /* Temperature measurement interval Register */
  38. #define TMTMIR_DEFAULT 0x0000000f
  39. u8 res0[0x14];
  40. u32 tier; /* Interrupt Enable Register */
  41. #define TIER_DISABLE 0x0
  42. u32 tidr; /* Interrupt Detect Register */
  43. u32 tiscr; /* Interrupt Site Capture Register */
  44. u32 ticscr; /* Interrupt Critical Site Capture Register */
  45. u8 res1[0x10];
  46. u32 tmhtcrh; /* High Temperature Capture Register */
  47. u32 tmhtcrl; /* Low Temperature Capture Register */
  48. u8 res2[0x8];
  49. u32 tmhtitr; /* High Temperature Immediate Threshold */
  50. u32 tmhtatr; /* High Temperature Average Threshold */
  51. u32 tmhtactr; /* High Temperature Average Crit Threshold */
  52. u8 res3[0x24];
  53. u32 ttcfgr; /* Temperature Configuration Register */
  54. u32 tscfgr; /* Sensor Configuration Register */
  55. u8 res4[0x78];
  56. struct qoriq_tmu_site_regs site[SITES_MAX];
  57. u8 res5[0x9f8];
  58. u32 ipbrr0; /* IP Block Revision Register 0 */
  59. u32 ipbrr1; /* IP Block Revision Register 1 */
  60. u8 res6[0x310];
  61. u32 ttr0cr; /* Temperature Range 0 Control Register */
  62. u32 ttr1cr; /* Temperature Range 1 Control Register */
  63. u32 ttr2cr; /* Temperature Range 2 Control Register */
  64. u32 ttr3cr; /* Temperature Range 3 Control Register */
  65. };
  66. /*
  67. * Thermal zone data
  68. */
  69. struct qoriq_tmu_data {
  70. struct thermal_zone_device *tz;
  71. struct qoriq_tmu_regs __iomem *regs;
  72. int sensor_id;
  73. bool little_endian;
  74. };
  75. static void tmu_write(struct qoriq_tmu_data *p, u32 val, void __iomem *addr)
  76. {
  77. if (p->little_endian)
  78. iowrite32(val, addr);
  79. else
  80. iowrite32be(val, addr);
  81. }
  82. static u32 tmu_read(struct qoriq_tmu_data *p, void __iomem *addr)
  83. {
  84. if (p->little_endian)
  85. return ioread32(addr);
  86. else
  87. return ioread32be(addr);
  88. }
  89. static int tmu_get_temp(void *p, int *temp)
  90. {
  91. u32 val;
  92. struct qoriq_tmu_data *data = p;
  93. val = tmu_read(data, &data->regs->site[data->sensor_id].tritsr);
  94. *temp = (val & 0xff) * 1000;
  95. return 0;
  96. }
  97. static int qoriq_tmu_get_sensor_id(void)
  98. {
  99. int ret, id;
  100. struct of_phandle_args sensor_specs;
  101. struct device_node *np, *sensor_np;
  102. np = of_find_node_by_name(NULL, "thermal-zones");
  103. if (!np)
  104. return -ENODEV;
  105. sensor_np = of_get_next_child(np, NULL);
  106. ret = of_parse_phandle_with_args(sensor_np, "thermal-sensors",
  107. "#thermal-sensor-cells",
  108. 0, &sensor_specs);
  109. if (ret) {
  110. of_node_put(np);
  111. of_node_put(sensor_np);
  112. return ret;
  113. }
  114. if (sensor_specs.args_count >= 1) {
  115. id = sensor_specs.args[0];
  116. WARN(sensor_specs.args_count > 1,
  117. "%s: too many cells in sensor specifier %d\n",
  118. sensor_specs.np->name, sensor_specs.args_count);
  119. } else {
  120. id = 0;
  121. }
  122. of_node_put(np);
  123. of_node_put(sensor_np);
  124. return id;
  125. }
  126. static int qoriq_tmu_calibration(struct platform_device *pdev)
  127. {
  128. int i, val, len;
  129. u32 range[4];
  130. const u32 *calibration;
  131. struct device_node *np = pdev->dev.of_node;
  132. struct qoriq_tmu_data *data = platform_get_drvdata(pdev);
  133. if (of_property_read_u32_array(np, "fsl,tmu-range", range, 4)) {
  134. dev_err(&pdev->dev, "missing calibration range.\n");
  135. return -ENODEV;
  136. }
  137. /* Init temperature range registers */
  138. tmu_write(data, range[0], &data->regs->ttr0cr);
  139. tmu_write(data, range[1], &data->regs->ttr1cr);
  140. tmu_write(data, range[2], &data->regs->ttr2cr);
  141. tmu_write(data, range[3], &data->regs->ttr3cr);
  142. calibration = of_get_property(np, "fsl,tmu-calibration", &len);
  143. if (calibration == NULL || len % 8) {
  144. dev_err(&pdev->dev, "invalid calibration data.\n");
  145. return -ENODEV;
  146. }
  147. for (i = 0; i < len; i += 8, calibration += 2) {
  148. val = of_read_number(calibration, 1);
  149. tmu_write(data, val, &data->regs->ttcfgr);
  150. val = of_read_number(calibration + 1, 1);
  151. tmu_write(data, val, &data->regs->tscfgr);
  152. }
  153. return 0;
  154. }
  155. static void qoriq_tmu_init_device(struct qoriq_tmu_data *data)
  156. {
  157. /* Disable interrupt, using polling instead */
  158. tmu_write(data, TIER_DISABLE, &data->regs->tier);
  159. /* Set update_interval */
  160. tmu_write(data, TMTMIR_DEFAULT, &data->regs->tmtmir);
  161. /* Disable monitoring */
  162. tmu_write(data, TMR_DISABLE, &data->regs->tmr);
  163. }
  164. static struct thermal_zone_of_device_ops tmu_tz_ops = {
  165. .get_temp = tmu_get_temp,
  166. };
  167. static int qoriq_tmu_probe(struct platform_device *pdev)
  168. {
  169. int ret;
  170. const struct thermal_trip *trip;
  171. struct qoriq_tmu_data *data;
  172. struct device_node *np = pdev->dev.of_node;
  173. u32 site = 0;
  174. if (!np) {
  175. dev_err(&pdev->dev, "Device OF-Node is NULL");
  176. return -ENODEV;
  177. }
  178. data = devm_kzalloc(&pdev->dev, sizeof(struct qoriq_tmu_data),
  179. GFP_KERNEL);
  180. if (!data)
  181. return -ENOMEM;
  182. platform_set_drvdata(pdev, data);
  183. data->little_endian = of_property_read_bool(np, "little-endian");
  184. data->sensor_id = qoriq_tmu_get_sensor_id();
  185. if (data->sensor_id < 0) {
  186. dev_err(&pdev->dev, "Failed to get sensor id\n");
  187. ret = -ENODEV;
  188. goto err_iomap;
  189. }
  190. data->regs = of_iomap(np, 0);
  191. if (!data->regs) {
  192. dev_err(&pdev->dev, "Failed to get memory region\n");
  193. ret = -ENODEV;
  194. goto err_iomap;
  195. }
  196. qoriq_tmu_init_device(data); /* TMU initialization */
  197. ret = qoriq_tmu_calibration(pdev); /* TMU calibration */
  198. if (ret < 0)
  199. goto err_tmu;
  200. data->tz = thermal_zone_of_sensor_register(&pdev->dev, data->sensor_id,
  201. data, &tmu_tz_ops);
  202. if (IS_ERR(data->tz)) {
  203. ret = PTR_ERR(data->tz);
  204. dev_err(&pdev->dev,
  205. "Failed to register thermal zone device %d\n", ret);
  206. goto err_tmu;
  207. }
  208. trip = of_thermal_get_trip_points(data->tz);
  209. /* Enable monitoring */
  210. site |= 0x1 << (15 - data->sensor_id);
  211. tmu_write(data, site | TMR_ME | TMR_ALPF, &data->regs->tmr);
  212. return 0;
  213. err_tmu:
  214. iounmap(data->regs);
  215. err_iomap:
  216. platform_set_drvdata(pdev, NULL);
  217. return ret;
  218. }
  219. static int qoriq_tmu_remove(struct platform_device *pdev)
  220. {
  221. struct qoriq_tmu_data *data = platform_get_drvdata(pdev);
  222. thermal_zone_of_sensor_unregister(&pdev->dev, data->tz);
  223. /* Disable monitoring */
  224. tmu_write(data, TMR_DISABLE, &data->regs->tmr);
  225. iounmap(data->regs);
  226. platform_set_drvdata(pdev, NULL);
  227. return 0;
  228. }
  229. #ifdef CONFIG_PM_SLEEP
  230. static int qoriq_tmu_suspend(struct device *dev)
  231. {
  232. u32 tmr;
  233. struct qoriq_tmu_data *data = dev_get_drvdata(dev);
  234. /* Disable monitoring */
  235. tmr = tmu_read(data, &data->regs->tmr);
  236. tmr &= ~TMR_ME;
  237. tmu_write(data, tmr, &data->regs->tmr);
  238. return 0;
  239. }
  240. static int qoriq_tmu_resume(struct device *dev)
  241. {
  242. u32 tmr;
  243. struct qoriq_tmu_data *data = dev_get_drvdata(dev);
  244. /* Enable monitoring */
  245. tmr = tmu_read(data, &data->regs->tmr);
  246. tmr |= TMR_ME;
  247. tmu_write(data, tmr, &data->regs->tmr);
  248. return 0;
  249. }
  250. #endif
  251. static SIMPLE_DEV_PM_OPS(qoriq_tmu_pm_ops,
  252. qoriq_tmu_suspend, qoriq_tmu_resume);
  253. static const struct of_device_id qoriq_tmu_match[] = {
  254. { .compatible = "fsl,qoriq-tmu", },
  255. {},
  256. };
  257. MODULE_DEVICE_TABLE(of, qoriq_tmu_match);
  258. static struct platform_driver qoriq_tmu = {
  259. .driver = {
  260. .name = "qoriq_thermal",
  261. .pm = &qoriq_tmu_pm_ops,
  262. .of_match_table = qoriq_tmu_match,
  263. },
  264. .probe = qoriq_tmu_probe,
  265. .remove = qoriq_tmu_remove,
  266. };
  267. module_platform_driver(qoriq_tmu);
  268. MODULE_AUTHOR("Jia Hongtao <hongtao.jia@nxp.com>");
  269. MODULE_DESCRIPTION("QorIQ Thermal Monitoring Unit driver");
  270. MODULE_LICENSE("GPL v2");