tps65910-regulator.c 33 KB

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  1. /*
  2. * tps65910.c -- TI tps65910
  3. *
  4. * Copyright 2010 Texas Instruments Inc.
  5. *
  6. * Author: Graeme Gregory <gg@slimlogic.co.uk>
  7. * Author: Jorge Eduardo Candelaria <jedu@slimlogic.co.uk>
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. *
  14. */
  15. #include <linux/kernel.h>
  16. #include <linux/module.h>
  17. #include <linux/init.h>
  18. #include <linux/err.h>
  19. #include <linux/of.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/regulator/driver.h>
  22. #include <linux/regulator/machine.h>
  23. #include <linux/slab.h>
  24. #include <linux/gpio.h>
  25. #include <linux/mfd/tps65910.h>
  26. #include <linux/regulator/of_regulator.h>
  27. #define TPS65910_SUPPLY_STATE_ENABLED 0x1
  28. #define EXT_SLEEP_CONTROL (TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1 | \
  29. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2 | \
  30. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3 | \
  31. TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
  32. /* supported VIO voltages in microvolts */
  33. static const unsigned int VIO_VSEL_table[] = {
  34. 1500000, 1800000, 2500000, 3300000,
  35. };
  36. /* VSEL tables for TPS65910 specific LDOs and dcdc's */
  37. /* supported VRTC voltages in microvolts */
  38. static const unsigned int VRTC_VSEL_table[] = {
  39. 1800000,
  40. };
  41. /* supported VDD3 voltages in microvolts */
  42. static const unsigned int VDD3_VSEL_table[] = {
  43. 5000000,
  44. };
  45. /* supported VDIG1 voltages in microvolts */
  46. static const unsigned int VDIG1_VSEL_table[] = {
  47. 1200000, 1500000, 1800000, 2700000,
  48. };
  49. /* supported VDIG2 voltages in microvolts */
  50. static const unsigned int VDIG2_VSEL_table[] = {
  51. 1000000, 1100000, 1200000, 1800000,
  52. };
  53. /* supported VPLL voltages in microvolts */
  54. static const unsigned int VPLL_VSEL_table[] = {
  55. 1000000, 1100000, 1800000, 2500000,
  56. };
  57. /* supported VDAC voltages in microvolts */
  58. static const unsigned int VDAC_VSEL_table[] = {
  59. 1800000, 2600000, 2800000, 2850000,
  60. };
  61. /* supported VAUX1 voltages in microvolts */
  62. static const unsigned int VAUX1_VSEL_table[] = {
  63. 1800000, 2500000, 2800000, 2850000,
  64. };
  65. /* supported VAUX2 voltages in microvolts */
  66. static const unsigned int VAUX2_VSEL_table[] = {
  67. 1800000, 2800000, 2900000, 3300000,
  68. };
  69. /* supported VAUX33 voltages in microvolts */
  70. static const unsigned int VAUX33_VSEL_table[] = {
  71. 1800000, 2000000, 2800000, 3300000,
  72. };
  73. /* supported VMMC voltages in microvolts */
  74. static const unsigned int VMMC_VSEL_table[] = {
  75. 1800000, 2800000, 3000000, 3300000,
  76. };
  77. /* supported BBCH voltages in microvolts */
  78. static const unsigned int VBB_VSEL_table[] = {
  79. 3000000, 2520000, 3150000, 5000000,
  80. };
  81. struct tps_info {
  82. const char *name;
  83. const char *vin_name;
  84. u8 n_voltages;
  85. const unsigned int *voltage_table;
  86. int enable_time_us;
  87. };
  88. static struct tps_info tps65910_regs[] = {
  89. {
  90. .name = "vrtc",
  91. .vin_name = "vcc7",
  92. .n_voltages = ARRAY_SIZE(VRTC_VSEL_table),
  93. .voltage_table = VRTC_VSEL_table,
  94. .enable_time_us = 2200,
  95. },
  96. {
  97. .name = "vio",
  98. .vin_name = "vccio",
  99. .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
  100. .voltage_table = VIO_VSEL_table,
  101. .enable_time_us = 350,
  102. },
  103. {
  104. .name = "vdd1",
  105. .vin_name = "vcc1",
  106. .enable_time_us = 350,
  107. },
  108. {
  109. .name = "vdd2",
  110. .vin_name = "vcc2",
  111. .enable_time_us = 350,
  112. },
  113. {
  114. .name = "vdd3",
  115. .n_voltages = ARRAY_SIZE(VDD3_VSEL_table),
  116. .voltage_table = VDD3_VSEL_table,
  117. .enable_time_us = 200,
  118. },
  119. {
  120. .name = "vdig1",
  121. .vin_name = "vcc6",
  122. .n_voltages = ARRAY_SIZE(VDIG1_VSEL_table),
  123. .voltage_table = VDIG1_VSEL_table,
  124. .enable_time_us = 100,
  125. },
  126. {
  127. .name = "vdig2",
  128. .vin_name = "vcc6",
  129. .n_voltages = ARRAY_SIZE(VDIG2_VSEL_table),
  130. .voltage_table = VDIG2_VSEL_table,
  131. .enable_time_us = 100,
  132. },
  133. {
  134. .name = "vpll",
  135. .vin_name = "vcc5",
  136. .n_voltages = ARRAY_SIZE(VPLL_VSEL_table),
  137. .voltage_table = VPLL_VSEL_table,
  138. .enable_time_us = 100,
  139. },
  140. {
  141. .name = "vdac",
  142. .vin_name = "vcc5",
  143. .n_voltages = ARRAY_SIZE(VDAC_VSEL_table),
  144. .voltage_table = VDAC_VSEL_table,
  145. .enable_time_us = 100,
  146. },
  147. {
  148. .name = "vaux1",
  149. .vin_name = "vcc4",
  150. .n_voltages = ARRAY_SIZE(VAUX1_VSEL_table),
  151. .voltage_table = VAUX1_VSEL_table,
  152. .enable_time_us = 100,
  153. },
  154. {
  155. .name = "vaux2",
  156. .vin_name = "vcc4",
  157. .n_voltages = ARRAY_SIZE(VAUX2_VSEL_table),
  158. .voltage_table = VAUX2_VSEL_table,
  159. .enable_time_us = 100,
  160. },
  161. {
  162. .name = "vaux33",
  163. .vin_name = "vcc3",
  164. .n_voltages = ARRAY_SIZE(VAUX33_VSEL_table),
  165. .voltage_table = VAUX33_VSEL_table,
  166. .enable_time_us = 100,
  167. },
  168. {
  169. .name = "vmmc",
  170. .vin_name = "vcc3",
  171. .n_voltages = ARRAY_SIZE(VMMC_VSEL_table),
  172. .voltage_table = VMMC_VSEL_table,
  173. .enable_time_us = 100,
  174. },
  175. {
  176. .name = "vbb",
  177. .vin_name = "vcc7",
  178. .n_voltages = ARRAY_SIZE(VBB_VSEL_table),
  179. .voltage_table = VBB_VSEL_table,
  180. },
  181. };
  182. static struct tps_info tps65911_regs[] = {
  183. {
  184. .name = "vrtc",
  185. .vin_name = "vcc7",
  186. .enable_time_us = 2200,
  187. },
  188. {
  189. .name = "vio",
  190. .vin_name = "vccio",
  191. .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
  192. .voltage_table = VIO_VSEL_table,
  193. .enable_time_us = 350,
  194. },
  195. {
  196. .name = "vdd1",
  197. .vin_name = "vcc1",
  198. .n_voltages = 0x4C,
  199. .enable_time_us = 350,
  200. },
  201. {
  202. .name = "vdd2",
  203. .vin_name = "vcc2",
  204. .n_voltages = 0x4C,
  205. .enable_time_us = 350,
  206. },
  207. {
  208. .name = "vddctrl",
  209. .n_voltages = 0x44,
  210. .enable_time_us = 900,
  211. },
  212. {
  213. .name = "ldo1",
  214. .vin_name = "vcc6",
  215. .n_voltages = 0x33,
  216. .enable_time_us = 420,
  217. },
  218. {
  219. .name = "ldo2",
  220. .vin_name = "vcc6",
  221. .n_voltages = 0x33,
  222. .enable_time_us = 420,
  223. },
  224. {
  225. .name = "ldo3",
  226. .vin_name = "vcc5",
  227. .n_voltages = 0x1A,
  228. .enable_time_us = 230,
  229. },
  230. {
  231. .name = "ldo4",
  232. .vin_name = "vcc5",
  233. .n_voltages = 0x33,
  234. .enable_time_us = 230,
  235. },
  236. {
  237. .name = "ldo5",
  238. .vin_name = "vcc4",
  239. .n_voltages = 0x1A,
  240. .enable_time_us = 230,
  241. },
  242. {
  243. .name = "ldo6",
  244. .vin_name = "vcc3",
  245. .n_voltages = 0x1A,
  246. .enable_time_us = 230,
  247. },
  248. {
  249. .name = "ldo7",
  250. .vin_name = "vcc3",
  251. .n_voltages = 0x1A,
  252. .enable_time_us = 230,
  253. },
  254. {
  255. .name = "ldo8",
  256. .vin_name = "vcc3",
  257. .n_voltages = 0x1A,
  258. .enable_time_us = 230,
  259. },
  260. };
  261. #define EXT_CONTROL_REG_BITS(id, regs_offs, bits) (((regs_offs) << 8) | (bits))
  262. static unsigned int tps65910_ext_sleep_control[] = {
  263. 0,
  264. EXT_CONTROL_REG_BITS(VIO, 1, 0),
  265. EXT_CONTROL_REG_BITS(VDD1, 1, 1),
  266. EXT_CONTROL_REG_BITS(VDD2, 1, 2),
  267. EXT_CONTROL_REG_BITS(VDD3, 1, 3),
  268. EXT_CONTROL_REG_BITS(VDIG1, 0, 1),
  269. EXT_CONTROL_REG_BITS(VDIG2, 0, 2),
  270. EXT_CONTROL_REG_BITS(VPLL, 0, 6),
  271. EXT_CONTROL_REG_BITS(VDAC, 0, 7),
  272. EXT_CONTROL_REG_BITS(VAUX1, 0, 3),
  273. EXT_CONTROL_REG_BITS(VAUX2, 0, 4),
  274. EXT_CONTROL_REG_BITS(VAUX33, 0, 5),
  275. EXT_CONTROL_REG_BITS(VMMC, 0, 0),
  276. };
  277. static unsigned int tps65911_ext_sleep_control[] = {
  278. 0,
  279. EXT_CONTROL_REG_BITS(VIO, 1, 0),
  280. EXT_CONTROL_REG_BITS(VDD1, 1, 1),
  281. EXT_CONTROL_REG_BITS(VDD2, 1, 2),
  282. EXT_CONTROL_REG_BITS(VDDCTRL, 1, 3),
  283. EXT_CONTROL_REG_BITS(LDO1, 0, 1),
  284. EXT_CONTROL_REG_BITS(LDO2, 0, 2),
  285. EXT_CONTROL_REG_BITS(LDO3, 0, 7),
  286. EXT_CONTROL_REG_BITS(LDO4, 0, 6),
  287. EXT_CONTROL_REG_BITS(LDO5, 0, 3),
  288. EXT_CONTROL_REG_BITS(LDO6, 0, 0),
  289. EXT_CONTROL_REG_BITS(LDO7, 0, 5),
  290. EXT_CONTROL_REG_BITS(LDO8, 0, 4),
  291. };
  292. struct tps65910_reg {
  293. struct regulator_desc *desc;
  294. struct tps65910 *mfd;
  295. struct regulator_dev **rdev;
  296. struct tps_info **info;
  297. int num_regulators;
  298. int mode;
  299. int (*get_ctrl_reg)(int);
  300. unsigned int *ext_sleep_control;
  301. unsigned int board_ext_control[TPS65910_NUM_REGS];
  302. };
  303. static int tps65910_get_ctrl_register(int id)
  304. {
  305. switch (id) {
  306. case TPS65910_REG_VRTC:
  307. return TPS65910_VRTC;
  308. case TPS65910_REG_VIO:
  309. return TPS65910_VIO;
  310. case TPS65910_REG_VDD1:
  311. return TPS65910_VDD1;
  312. case TPS65910_REG_VDD2:
  313. return TPS65910_VDD2;
  314. case TPS65910_REG_VDD3:
  315. return TPS65910_VDD3;
  316. case TPS65910_REG_VDIG1:
  317. return TPS65910_VDIG1;
  318. case TPS65910_REG_VDIG2:
  319. return TPS65910_VDIG2;
  320. case TPS65910_REG_VPLL:
  321. return TPS65910_VPLL;
  322. case TPS65910_REG_VDAC:
  323. return TPS65910_VDAC;
  324. case TPS65910_REG_VAUX1:
  325. return TPS65910_VAUX1;
  326. case TPS65910_REG_VAUX2:
  327. return TPS65910_VAUX2;
  328. case TPS65910_REG_VAUX33:
  329. return TPS65910_VAUX33;
  330. case TPS65910_REG_VMMC:
  331. return TPS65910_VMMC;
  332. case TPS65910_REG_VBB:
  333. return TPS65910_BBCH;
  334. default:
  335. return -EINVAL;
  336. }
  337. }
  338. static int tps65911_get_ctrl_register(int id)
  339. {
  340. switch (id) {
  341. case TPS65910_REG_VRTC:
  342. return TPS65910_VRTC;
  343. case TPS65910_REG_VIO:
  344. return TPS65910_VIO;
  345. case TPS65910_REG_VDD1:
  346. return TPS65910_VDD1;
  347. case TPS65910_REG_VDD2:
  348. return TPS65910_VDD2;
  349. case TPS65911_REG_VDDCTRL:
  350. return TPS65911_VDDCTRL;
  351. case TPS65911_REG_LDO1:
  352. return TPS65911_LDO1;
  353. case TPS65911_REG_LDO2:
  354. return TPS65911_LDO2;
  355. case TPS65911_REG_LDO3:
  356. return TPS65911_LDO3;
  357. case TPS65911_REG_LDO4:
  358. return TPS65911_LDO4;
  359. case TPS65911_REG_LDO5:
  360. return TPS65911_LDO5;
  361. case TPS65911_REG_LDO6:
  362. return TPS65911_LDO6;
  363. case TPS65911_REG_LDO7:
  364. return TPS65911_LDO7;
  365. case TPS65911_REG_LDO8:
  366. return TPS65911_LDO8;
  367. default:
  368. return -EINVAL;
  369. }
  370. }
  371. static int tps65910_set_mode(struct regulator_dev *dev, unsigned int mode)
  372. {
  373. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  374. struct tps65910 *mfd = pmic->mfd;
  375. int reg, value, id = rdev_get_id(dev);
  376. reg = pmic->get_ctrl_reg(id);
  377. if (reg < 0)
  378. return reg;
  379. switch (mode) {
  380. case REGULATOR_MODE_NORMAL:
  381. return tps65910_reg_update_bits(pmic->mfd, reg,
  382. LDO_ST_MODE_BIT | LDO_ST_ON_BIT,
  383. LDO_ST_ON_BIT);
  384. case REGULATOR_MODE_IDLE:
  385. value = LDO_ST_ON_BIT | LDO_ST_MODE_BIT;
  386. return tps65910_reg_set_bits(mfd, reg, value);
  387. case REGULATOR_MODE_STANDBY:
  388. return tps65910_reg_clear_bits(mfd, reg, LDO_ST_ON_BIT);
  389. }
  390. return -EINVAL;
  391. }
  392. static unsigned int tps65910_get_mode(struct regulator_dev *dev)
  393. {
  394. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  395. int ret, reg, value, id = rdev_get_id(dev);
  396. reg = pmic->get_ctrl_reg(id);
  397. if (reg < 0)
  398. return reg;
  399. ret = tps65910_reg_read(pmic->mfd, reg, &value);
  400. if (ret < 0)
  401. return ret;
  402. if (!(value & LDO_ST_ON_BIT))
  403. return REGULATOR_MODE_STANDBY;
  404. else if (value & LDO_ST_MODE_BIT)
  405. return REGULATOR_MODE_IDLE;
  406. else
  407. return REGULATOR_MODE_NORMAL;
  408. }
  409. static int tps65910_get_voltage_dcdc_sel(struct regulator_dev *dev)
  410. {
  411. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  412. int ret, id = rdev_get_id(dev);
  413. int opvsel = 0, srvsel = 0, vselmax = 0, mult = 0, sr = 0;
  414. switch (id) {
  415. case TPS65910_REG_VDD1:
  416. ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD1_OP, &opvsel);
  417. if (ret < 0)
  418. return ret;
  419. ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD1, &mult);
  420. if (ret < 0)
  421. return ret;
  422. mult = (mult & VDD1_VGAIN_SEL_MASK) >> VDD1_VGAIN_SEL_SHIFT;
  423. ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD1_SR, &srvsel);
  424. if (ret < 0)
  425. return ret;
  426. sr = opvsel & VDD1_OP_CMD_MASK;
  427. opvsel &= VDD1_OP_SEL_MASK;
  428. srvsel &= VDD1_SR_SEL_MASK;
  429. vselmax = 75;
  430. break;
  431. case TPS65910_REG_VDD2:
  432. ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD2_OP, &opvsel);
  433. if (ret < 0)
  434. return ret;
  435. ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD2, &mult);
  436. if (ret < 0)
  437. return ret;
  438. mult = (mult & VDD2_VGAIN_SEL_MASK) >> VDD2_VGAIN_SEL_SHIFT;
  439. ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD2_SR, &srvsel);
  440. if (ret < 0)
  441. return ret;
  442. sr = opvsel & VDD2_OP_CMD_MASK;
  443. opvsel &= VDD2_OP_SEL_MASK;
  444. srvsel &= VDD2_SR_SEL_MASK;
  445. vselmax = 75;
  446. break;
  447. case TPS65911_REG_VDDCTRL:
  448. ret = tps65910_reg_read(pmic->mfd, TPS65911_VDDCTRL_OP,
  449. &opvsel);
  450. if (ret < 0)
  451. return ret;
  452. ret = tps65910_reg_read(pmic->mfd, TPS65911_VDDCTRL_SR,
  453. &srvsel);
  454. if (ret < 0)
  455. return ret;
  456. sr = opvsel & VDDCTRL_OP_CMD_MASK;
  457. opvsel &= VDDCTRL_OP_SEL_MASK;
  458. srvsel &= VDDCTRL_SR_SEL_MASK;
  459. vselmax = 64;
  460. break;
  461. }
  462. /* multiplier 0 == 1 but 2,3 normal */
  463. if (!mult)
  464. mult = 1;
  465. if (sr) {
  466. /* normalise to valid range */
  467. if (srvsel < 3)
  468. srvsel = 3;
  469. if (srvsel > vselmax)
  470. srvsel = vselmax;
  471. return srvsel - 3;
  472. } else {
  473. /* normalise to valid range*/
  474. if (opvsel < 3)
  475. opvsel = 3;
  476. if (opvsel > vselmax)
  477. opvsel = vselmax;
  478. return opvsel - 3;
  479. }
  480. return -EINVAL;
  481. }
  482. static int tps65910_get_voltage_sel(struct regulator_dev *dev)
  483. {
  484. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  485. int ret, reg, value, id = rdev_get_id(dev);
  486. reg = pmic->get_ctrl_reg(id);
  487. if (reg < 0)
  488. return reg;
  489. ret = tps65910_reg_read(pmic->mfd, reg, &value);
  490. if (ret < 0)
  491. return ret;
  492. switch (id) {
  493. case TPS65910_REG_VIO:
  494. case TPS65910_REG_VDIG1:
  495. case TPS65910_REG_VDIG2:
  496. case TPS65910_REG_VPLL:
  497. case TPS65910_REG_VDAC:
  498. case TPS65910_REG_VAUX1:
  499. case TPS65910_REG_VAUX2:
  500. case TPS65910_REG_VAUX33:
  501. case TPS65910_REG_VMMC:
  502. value &= LDO_SEL_MASK;
  503. value >>= LDO_SEL_SHIFT;
  504. break;
  505. case TPS65910_REG_VBB:
  506. value &= BBCH_BBSEL_MASK;
  507. value >>= BBCH_BBSEL_SHIFT;
  508. break;
  509. default:
  510. return -EINVAL;
  511. }
  512. return value;
  513. }
  514. static int tps65910_get_voltage_vdd3(struct regulator_dev *dev)
  515. {
  516. return dev->desc->volt_table[0];
  517. }
  518. static int tps65911_get_voltage_sel(struct regulator_dev *dev)
  519. {
  520. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  521. int ret, id = rdev_get_id(dev);
  522. unsigned int value, reg;
  523. reg = pmic->get_ctrl_reg(id);
  524. ret = tps65910_reg_read(pmic->mfd, reg, &value);
  525. if (ret < 0)
  526. return ret;
  527. switch (id) {
  528. case TPS65911_REG_LDO1:
  529. case TPS65911_REG_LDO2:
  530. case TPS65911_REG_LDO4:
  531. value &= LDO1_SEL_MASK;
  532. value >>= LDO_SEL_SHIFT;
  533. break;
  534. case TPS65911_REG_LDO3:
  535. case TPS65911_REG_LDO5:
  536. case TPS65911_REG_LDO6:
  537. case TPS65911_REG_LDO7:
  538. case TPS65911_REG_LDO8:
  539. value &= LDO3_SEL_MASK;
  540. value >>= LDO_SEL_SHIFT;
  541. break;
  542. case TPS65910_REG_VIO:
  543. value &= LDO_SEL_MASK;
  544. value >>= LDO_SEL_SHIFT;
  545. break;
  546. default:
  547. return -EINVAL;
  548. }
  549. return value;
  550. }
  551. static int tps65910_set_voltage_dcdc_sel(struct regulator_dev *dev,
  552. unsigned selector)
  553. {
  554. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  555. int id = rdev_get_id(dev), vsel;
  556. int dcdc_mult = 0;
  557. switch (id) {
  558. case TPS65910_REG_VDD1:
  559. dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
  560. if (dcdc_mult == 1)
  561. dcdc_mult--;
  562. vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
  563. tps65910_reg_update_bits(pmic->mfd, TPS65910_VDD1,
  564. VDD1_VGAIN_SEL_MASK,
  565. dcdc_mult << VDD1_VGAIN_SEL_SHIFT);
  566. tps65910_reg_write(pmic->mfd, TPS65910_VDD1_OP, vsel);
  567. break;
  568. case TPS65910_REG_VDD2:
  569. dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
  570. if (dcdc_mult == 1)
  571. dcdc_mult--;
  572. vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
  573. tps65910_reg_update_bits(pmic->mfd, TPS65910_VDD2,
  574. VDD1_VGAIN_SEL_MASK,
  575. dcdc_mult << VDD2_VGAIN_SEL_SHIFT);
  576. tps65910_reg_write(pmic->mfd, TPS65910_VDD2_OP, vsel);
  577. break;
  578. case TPS65911_REG_VDDCTRL:
  579. vsel = selector + 3;
  580. tps65910_reg_write(pmic->mfd, TPS65911_VDDCTRL_OP, vsel);
  581. }
  582. return 0;
  583. }
  584. static int tps65910_set_voltage_sel(struct regulator_dev *dev,
  585. unsigned selector)
  586. {
  587. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  588. int reg, id = rdev_get_id(dev);
  589. reg = pmic->get_ctrl_reg(id);
  590. if (reg < 0)
  591. return reg;
  592. switch (id) {
  593. case TPS65910_REG_VIO:
  594. case TPS65910_REG_VDIG1:
  595. case TPS65910_REG_VDIG2:
  596. case TPS65910_REG_VPLL:
  597. case TPS65910_REG_VDAC:
  598. case TPS65910_REG_VAUX1:
  599. case TPS65910_REG_VAUX2:
  600. case TPS65910_REG_VAUX33:
  601. case TPS65910_REG_VMMC:
  602. return tps65910_reg_update_bits(pmic->mfd, reg, LDO_SEL_MASK,
  603. selector << LDO_SEL_SHIFT);
  604. case TPS65910_REG_VBB:
  605. return tps65910_reg_update_bits(pmic->mfd, reg, BBCH_BBSEL_MASK,
  606. selector << BBCH_BBSEL_SHIFT);
  607. }
  608. return -EINVAL;
  609. }
  610. static int tps65911_set_voltage_sel(struct regulator_dev *dev,
  611. unsigned selector)
  612. {
  613. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  614. int reg, id = rdev_get_id(dev);
  615. reg = pmic->get_ctrl_reg(id);
  616. if (reg < 0)
  617. return reg;
  618. switch (id) {
  619. case TPS65911_REG_LDO1:
  620. case TPS65911_REG_LDO2:
  621. case TPS65911_REG_LDO4:
  622. return tps65910_reg_update_bits(pmic->mfd, reg, LDO1_SEL_MASK,
  623. selector << LDO_SEL_SHIFT);
  624. case TPS65911_REG_LDO3:
  625. case TPS65911_REG_LDO5:
  626. case TPS65911_REG_LDO6:
  627. case TPS65911_REG_LDO7:
  628. case TPS65911_REG_LDO8:
  629. return tps65910_reg_update_bits(pmic->mfd, reg, LDO3_SEL_MASK,
  630. selector << LDO_SEL_SHIFT);
  631. case TPS65910_REG_VIO:
  632. return tps65910_reg_update_bits(pmic->mfd, reg, LDO_SEL_MASK,
  633. selector << LDO_SEL_SHIFT);
  634. case TPS65910_REG_VBB:
  635. return tps65910_reg_update_bits(pmic->mfd, reg, BBCH_BBSEL_MASK,
  636. selector << BBCH_BBSEL_SHIFT);
  637. }
  638. return -EINVAL;
  639. }
  640. static int tps65910_list_voltage_dcdc(struct regulator_dev *dev,
  641. unsigned selector)
  642. {
  643. int volt, mult = 1, id = rdev_get_id(dev);
  644. switch (id) {
  645. case TPS65910_REG_VDD1:
  646. case TPS65910_REG_VDD2:
  647. mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
  648. volt = VDD1_2_MIN_VOLT +
  649. (selector % VDD1_2_NUM_VOLT_FINE) * VDD1_2_OFFSET;
  650. break;
  651. case TPS65911_REG_VDDCTRL:
  652. volt = VDDCTRL_MIN_VOLT + (selector * VDDCTRL_OFFSET);
  653. break;
  654. default:
  655. BUG();
  656. return -EINVAL;
  657. }
  658. return volt * 100 * mult;
  659. }
  660. static int tps65911_list_voltage(struct regulator_dev *dev, unsigned selector)
  661. {
  662. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  663. int step_mv = 0, id = rdev_get_id(dev);
  664. switch (id) {
  665. case TPS65911_REG_LDO1:
  666. case TPS65911_REG_LDO2:
  667. case TPS65911_REG_LDO4:
  668. /* The first 5 values of the selector correspond to 1V */
  669. if (selector < 5)
  670. selector = 0;
  671. else
  672. selector -= 4;
  673. step_mv = 50;
  674. break;
  675. case TPS65911_REG_LDO3:
  676. case TPS65911_REG_LDO5:
  677. case TPS65911_REG_LDO6:
  678. case TPS65911_REG_LDO7:
  679. case TPS65911_REG_LDO8:
  680. /* The first 3 values of the selector correspond to 1V */
  681. if (selector < 3)
  682. selector = 0;
  683. else
  684. selector -= 2;
  685. step_mv = 100;
  686. break;
  687. case TPS65910_REG_VIO:
  688. return pmic->info[id]->voltage_table[selector];
  689. default:
  690. return -EINVAL;
  691. }
  692. return (LDO_MIN_VOLT + selector * step_mv) * 1000;
  693. }
  694. /* Regulator ops (except VRTC) */
  695. static struct regulator_ops tps65910_ops_dcdc = {
  696. .is_enabled = regulator_is_enabled_regmap,
  697. .enable = regulator_enable_regmap,
  698. .disable = regulator_disable_regmap,
  699. .set_mode = tps65910_set_mode,
  700. .get_mode = tps65910_get_mode,
  701. .get_voltage_sel = tps65910_get_voltage_dcdc_sel,
  702. .set_voltage_sel = tps65910_set_voltage_dcdc_sel,
  703. .set_voltage_time_sel = regulator_set_voltage_time_sel,
  704. .list_voltage = tps65910_list_voltage_dcdc,
  705. .map_voltage = regulator_map_voltage_ascend,
  706. };
  707. static struct regulator_ops tps65910_ops_vdd3 = {
  708. .is_enabled = regulator_is_enabled_regmap,
  709. .enable = regulator_enable_regmap,
  710. .disable = regulator_disable_regmap,
  711. .set_mode = tps65910_set_mode,
  712. .get_mode = tps65910_get_mode,
  713. .get_voltage = tps65910_get_voltage_vdd3,
  714. .list_voltage = regulator_list_voltage_table,
  715. .map_voltage = regulator_map_voltage_ascend,
  716. };
  717. static struct regulator_ops tps65910_ops_vbb = {
  718. .is_enabled = regulator_is_enabled_regmap,
  719. .enable = regulator_enable_regmap,
  720. .disable = regulator_disable_regmap,
  721. .set_mode = tps65910_set_mode,
  722. .get_mode = tps65910_get_mode,
  723. .get_voltage_sel = tps65910_get_voltage_sel,
  724. .set_voltage_sel = tps65910_set_voltage_sel,
  725. .list_voltage = regulator_list_voltage_table,
  726. .map_voltage = regulator_map_voltage_iterate,
  727. };
  728. static struct regulator_ops tps65910_ops = {
  729. .is_enabled = regulator_is_enabled_regmap,
  730. .enable = regulator_enable_regmap,
  731. .disable = regulator_disable_regmap,
  732. .set_mode = tps65910_set_mode,
  733. .get_mode = tps65910_get_mode,
  734. .get_voltage_sel = tps65910_get_voltage_sel,
  735. .set_voltage_sel = tps65910_set_voltage_sel,
  736. .list_voltage = regulator_list_voltage_table,
  737. .map_voltage = regulator_map_voltage_ascend,
  738. };
  739. static struct regulator_ops tps65911_ops = {
  740. .is_enabled = regulator_is_enabled_regmap,
  741. .enable = regulator_enable_regmap,
  742. .disable = regulator_disable_regmap,
  743. .set_mode = tps65910_set_mode,
  744. .get_mode = tps65910_get_mode,
  745. .get_voltage_sel = tps65911_get_voltage_sel,
  746. .set_voltage_sel = tps65911_set_voltage_sel,
  747. .list_voltage = tps65911_list_voltage,
  748. .map_voltage = regulator_map_voltage_ascend,
  749. };
  750. static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic,
  751. int id, int ext_sleep_config)
  752. {
  753. struct tps65910 *mfd = pmic->mfd;
  754. u8 regoffs = (pmic->ext_sleep_control[id] >> 8) & 0xFF;
  755. u8 bit_pos = (1 << pmic->ext_sleep_control[id] & 0xFF);
  756. int ret;
  757. /*
  758. * Regulator can not be control from multiple external input EN1, EN2
  759. * and EN3 together.
  760. */
  761. if (ext_sleep_config & EXT_SLEEP_CONTROL) {
  762. int en_count;
  763. en_count = ((ext_sleep_config &
  764. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1) != 0);
  765. en_count += ((ext_sleep_config &
  766. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2) != 0);
  767. en_count += ((ext_sleep_config &
  768. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3) != 0);
  769. en_count += ((ext_sleep_config &
  770. TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP) != 0);
  771. if (en_count > 1) {
  772. dev_err(mfd->dev,
  773. "External sleep control flag is not proper\n");
  774. return -EINVAL;
  775. }
  776. }
  777. pmic->board_ext_control[id] = ext_sleep_config;
  778. /* External EN1 control */
  779. if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1)
  780. ret = tps65910_reg_set_bits(mfd,
  781. TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
  782. else
  783. ret = tps65910_reg_clear_bits(mfd,
  784. TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
  785. if (ret < 0) {
  786. dev_err(mfd->dev,
  787. "Error in configuring external control EN1\n");
  788. return ret;
  789. }
  790. /* External EN2 control */
  791. if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2)
  792. ret = tps65910_reg_set_bits(mfd,
  793. TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
  794. else
  795. ret = tps65910_reg_clear_bits(mfd,
  796. TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
  797. if (ret < 0) {
  798. dev_err(mfd->dev,
  799. "Error in configuring external control EN2\n");
  800. return ret;
  801. }
  802. /* External EN3 control for TPS65910 LDO only */
  803. if ((tps65910_chip_id(mfd) == TPS65910) &&
  804. (id >= TPS65910_REG_VDIG1)) {
  805. if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3)
  806. ret = tps65910_reg_set_bits(mfd,
  807. TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
  808. else
  809. ret = tps65910_reg_clear_bits(mfd,
  810. TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
  811. if (ret < 0) {
  812. dev_err(mfd->dev,
  813. "Error in configuring external control EN3\n");
  814. return ret;
  815. }
  816. }
  817. /* Return if no external control is selected */
  818. if (!(ext_sleep_config & EXT_SLEEP_CONTROL)) {
  819. /* Clear all sleep controls */
  820. ret = tps65910_reg_clear_bits(mfd,
  821. TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
  822. if (!ret)
  823. ret = tps65910_reg_clear_bits(mfd,
  824. TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
  825. if (ret < 0)
  826. dev_err(mfd->dev,
  827. "Error in configuring SLEEP register\n");
  828. return ret;
  829. }
  830. /*
  831. * For regulator that has separate operational and sleep register make
  832. * sure that operational is used and clear sleep register to turn
  833. * regulator off when external control is inactive
  834. */
  835. if ((id == TPS65910_REG_VDD1) ||
  836. (id == TPS65910_REG_VDD2) ||
  837. ((id == TPS65911_REG_VDDCTRL) &&
  838. (tps65910_chip_id(mfd) == TPS65911))) {
  839. int op_reg_add = pmic->get_ctrl_reg(id) + 1;
  840. int sr_reg_add = pmic->get_ctrl_reg(id) + 2;
  841. int opvsel, srvsel;
  842. ret = tps65910_reg_read(pmic->mfd, op_reg_add, &opvsel);
  843. if (ret < 0)
  844. return ret;
  845. ret = tps65910_reg_read(pmic->mfd, sr_reg_add, &srvsel);
  846. if (ret < 0)
  847. return ret;
  848. if (opvsel & VDD1_OP_CMD_MASK) {
  849. u8 reg_val = srvsel & VDD1_OP_SEL_MASK;
  850. ret = tps65910_reg_write(pmic->mfd, op_reg_add,
  851. reg_val);
  852. if (ret < 0) {
  853. dev_err(mfd->dev,
  854. "Error in configuring op register\n");
  855. return ret;
  856. }
  857. }
  858. ret = tps65910_reg_write(pmic->mfd, sr_reg_add, 0);
  859. if (ret < 0) {
  860. dev_err(mfd->dev, "Error in setting sr register\n");
  861. return ret;
  862. }
  863. }
  864. ret = tps65910_reg_clear_bits(mfd,
  865. TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
  866. if (!ret) {
  867. if (ext_sleep_config & TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
  868. ret = tps65910_reg_set_bits(mfd,
  869. TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
  870. else
  871. ret = tps65910_reg_clear_bits(mfd,
  872. TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
  873. }
  874. if (ret < 0)
  875. dev_err(mfd->dev,
  876. "Error in configuring SLEEP register\n");
  877. return ret;
  878. }
  879. #ifdef CONFIG_OF
  880. static struct of_regulator_match tps65910_matches[] = {
  881. { .name = "vrtc", .driver_data = (void *) &tps65910_regs[0] },
  882. { .name = "vio", .driver_data = (void *) &tps65910_regs[1] },
  883. { .name = "vdd1", .driver_data = (void *) &tps65910_regs[2] },
  884. { .name = "vdd2", .driver_data = (void *) &tps65910_regs[3] },
  885. { .name = "vdd3", .driver_data = (void *) &tps65910_regs[4] },
  886. { .name = "vdig1", .driver_data = (void *) &tps65910_regs[5] },
  887. { .name = "vdig2", .driver_data = (void *) &tps65910_regs[6] },
  888. { .name = "vpll", .driver_data = (void *) &tps65910_regs[7] },
  889. { .name = "vdac", .driver_data = (void *) &tps65910_regs[8] },
  890. { .name = "vaux1", .driver_data = (void *) &tps65910_regs[9] },
  891. { .name = "vaux2", .driver_data = (void *) &tps65910_regs[10] },
  892. { .name = "vaux33", .driver_data = (void *) &tps65910_regs[11] },
  893. { .name = "vmmc", .driver_data = (void *) &tps65910_regs[12] },
  894. { .name = "vbb", .driver_data = (void *) &tps65910_regs[13] },
  895. };
  896. static struct of_regulator_match tps65911_matches[] = {
  897. { .name = "vrtc", .driver_data = (void *) &tps65911_regs[0] },
  898. { .name = "vio", .driver_data = (void *) &tps65911_regs[1] },
  899. { .name = "vdd1", .driver_data = (void *) &tps65911_regs[2] },
  900. { .name = "vdd2", .driver_data = (void *) &tps65911_regs[3] },
  901. { .name = "vddctrl", .driver_data = (void *) &tps65911_regs[4] },
  902. { .name = "ldo1", .driver_data = (void *) &tps65911_regs[5] },
  903. { .name = "ldo2", .driver_data = (void *) &tps65911_regs[6] },
  904. { .name = "ldo3", .driver_data = (void *) &tps65911_regs[7] },
  905. { .name = "ldo4", .driver_data = (void *) &tps65911_regs[8] },
  906. { .name = "ldo5", .driver_data = (void *) &tps65911_regs[9] },
  907. { .name = "ldo6", .driver_data = (void *) &tps65911_regs[10] },
  908. { .name = "ldo7", .driver_data = (void *) &tps65911_regs[11] },
  909. { .name = "ldo8", .driver_data = (void *) &tps65911_regs[12] },
  910. };
  911. static struct tps65910_board *tps65910_parse_dt_reg_data(
  912. struct platform_device *pdev,
  913. struct of_regulator_match **tps65910_reg_matches)
  914. {
  915. struct tps65910_board *pmic_plat_data;
  916. struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
  917. struct device_node *np, *regulators;
  918. struct of_regulator_match *matches;
  919. unsigned int prop;
  920. int idx = 0, ret, count;
  921. pmic_plat_data = devm_kzalloc(&pdev->dev, sizeof(*pmic_plat_data),
  922. GFP_KERNEL);
  923. if (!pmic_plat_data)
  924. return NULL;
  925. np = pdev->dev.parent->of_node;
  926. regulators = of_get_child_by_name(np, "regulators");
  927. if (!regulators) {
  928. dev_err(&pdev->dev, "regulator node not found\n");
  929. return NULL;
  930. }
  931. switch (tps65910_chip_id(tps65910)) {
  932. case TPS65910:
  933. count = ARRAY_SIZE(tps65910_matches);
  934. matches = tps65910_matches;
  935. break;
  936. case TPS65911:
  937. count = ARRAY_SIZE(tps65911_matches);
  938. matches = tps65911_matches;
  939. break;
  940. default:
  941. of_node_put(regulators);
  942. dev_err(&pdev->dev, "Invalid tps chip version\n");
  943. return NULL;
  944. }
  945. ret = of_regulator_match(&pdev->dev, regulators, matches, count);
  946. of_node_put(regulators);
  947. if (ret < 0) {
  948. dev_err(&pdev->dev, "Error parsing regulator init data: %d\n",
  949. ret);
  950. return NULL;
  951. }
  952. *tps65910_reg_matches = matches;
  953. for (idx = 0; idx < count; idx++) {
  954. if (!matches[idx].of_node)
  955. continue;
  956. pmic_plat_data->tps65910_pmic_init_data[idx] =
  957. matches[idx].init_data;
  958. ret = of_property_read_u32(matches[idx].of_node,
  959. "ti,regulator-ext-sleep-control", &prop);
  960. if (!ret)
  961. pmic_plat_data->regulator_ext_sleep_control[idx] = prop;
  962. }
  963. return pmic_plat_data;
  964. }
  965. #else
  966. static inline struct tps65910_board *tps65910_parse_dt_reg_data(
  967. struct platform_device *pdev,
  968. struct of_regulator_match **tps65910_reg_matches)
  969. {
  970. *tps65910_reg_matches = NULL;
  971. return NULL;
  972. }
  973. #endif
  974. static int tps65910_probe(struct platform_device *pdev)
  975. {
  976. struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
  977. struct regulator_config config = { };
  978. struct tps_info *info;
  979. struct regulator_dev *rdev;
  980. struct tps65910_reg *pmic;
  981. struct tps65910_board *pmic_plat_data;
  982. struct of_regulator_match *tps65910_reg_matches = NULL;
  983. int i, err;
  984. pmic_plat_data = dev_get_platdata(tps65910->dev);
  985. if (!pmic_plat_data && tps65910->dev->of_node)
  986. pmic_plat_data = tps65910_parse_dt_reg_data(pdev,
  987. &tps65910_reg_matches);
  988. if (!pmic_plat_data) {
  989. dev_err(&pdev->dev, "Platform data not found\n");
  990. return -EINVAL;
  991. }
  992. pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
  993. if (!pmic)
  994. return -ENOMEM;
  995. pmic->mfd = tps65910;
  996. platform_set_drvdata(pdev, pmic);
  997. /* Give control of all register to control port */
  998. tps65910_reg_set_bits(pmic->mfd, TPS65910_DEVCTRL,
  999. DEVCTRL_SR_CTL_I2C_SEL_MASK);
  1000. switch (tps65910_chip_id(tps65910)) {
  1001. case TPS65910:
  1002. pmic->get_ctrl_reg = &tps65910_get_ctrl_register;
  1003. pmic->num_regulators = ARRAY_SIZE(tps65910_regs);
  1004. pmic->ext_sleep_control = tps65910_ext_sleep_control;
  1005. info = tps65910_regs;
  1006. /* Work around silicon erratum SWCZ010: output programmed
  1007. * voltage level can go higher than expected or crash
  1008. * Workaround: use no synchronization of DCDC clocks
  1009. */
  1010. tps65910_reg_clear_bits(pmic->mfd, TPS65910_DCDCCTRL,
  1011. DCDCCTRL_DCDCCKSYNC_MASK);
  1012. break;
  1013. case TPS65911:
  1014. pmic->get_ctrl_reg = &tps65911_get_ctrl_register;
  1015. pmic->num_regulators = ARRAY_SIZE(tps65911_regs);
  1016. pmic->ext_sleep_control = tps65911_ext_sleep_control;
  1017. info = tps65911_regs;
  1018. break;
  1019. default:
  1020. dev_err(&pdev->dev, "Invalid tps chip version\n");
  1021. return -ENODEV;
  1022. }
  1023. pmic->desc = devm_kzalloc(&pdev->dev, pmic->num_regulators *
  1024. sizeof(struct regulator_desc), GFP_KERNEL);
  1025. if (!pmic->desc)
  1026. return -ENOMEM;
  1027. pmic->info = devm_kzalloc(&pdev->dev, pmic->num_regulators *
  1028. sizeof(struct tps_info *), GFP_KERNEL);
  1029. if (!pmic->info)
  1030. return -ENOMEM;
  1031. pmic->rdev = devm_kzalloc(&pdev->dev, pmic->num_regulators *
  1032. sizeof(struct regulator_dev *), GFP_KERNEL);
  1033. if (!pmic->rdev)
  1034. return -ENOMEM;
  1035. for (i = 0; i < pmic->num_regulators && i < TPS65910_NUM_REGS;
  1036. i++, info++) {
  1037. /* Register the regulators */
  1038. pmic->info[i] = info;
  1039. pmic->desc[i].name = info->name;
  1040. pmic->desc[i].supply_name = info->vin_name;
  1041. pmic->desc[i].id = i;
  1042. pmic->desc[i].n_voltages = info->n_voltages;
  1043. pmic->desc[i].enable_time = info->enable_time_us;
  1044. if (i == TPS65910_REG_VDD1 || i == TPS65910_REG_VDD2) {
  1045. pmic->desc[i].ops = &tps65910_ops_dcdc;
  1046. pmic->desc[i].n_voltages = VDD1_2_NUM_VOLT_FINE *
  1047. VDD1_2_NUM_VOLT_COARSE;
  1048. pmic->desc[i].ramp_delay = 12500;
  1049. } else if (i == TPS65910_REG_VDD3) {
  1050. if (tps65910_chip_id(tps65910) == TPS65910) {
  1051. pmic->desc[i].ops = &tps65910_ops_vdd3;
  1052. pmic->desc[i].volt_table = info->voltage_table;
  1053. } else {
  1054. pmic->desc[i].ops = &tps65910_ops_dcdc;
  1055. pmic->desc[i].ramp_delay = 5000;
  1056. }
  1057. } else if (i == TPS65910_REG_VBB &&
  1058. tps65910_chip_id(tps65910) == TPS65910) {
  1059. pmic->desc[i].ops = &tps65910_ops_vbb;
  1060. pmic->desc[i].volt_table = info->voltage_table;
  1061. } else {
  1062. if (tps65910_chip_id(tps65910) == TPS65910) {
  1063. pmic->desc[i].ops = &tps65910_ops;
  1064. pmic->desc[i].volt_table = info->voltage_table;
  1065. } else {
  1066. pmic->desc[i].ops = &tps65911_ops;
  1067. }
  1068. }
  1069. err = tps65910_set_ext_sleep_config(pmic, i,
  1070. pmic_plat_data->regulator_ext_sleep_control[i]);
  1071. /*
  1072. * Failing on regulator for configuring externally control
  1073. * is not a serious issue, just throw warning.
  1074. */
  1075. if (err < 0)
  1076. dev_warn(tps65910->dev,
  1077. "Failed to initialise ext control config\n");
  1078. pmic->desc[i].type = REGULATOR_VOLTAGE;
  1079. pmic->desc[i].owner = THIS_MODULE;
  1080. pmic->desc[i].enable_reg = pmic->get_ctrl_reg(i);
  1081. pmic->desc[i].enable_mask = TPS65910_SUPPLY_STATE_ENABLED;
  1082. config.dev = tps65910->dev;
  1083. config.init_data = pmic_plat_data->tps65910_pmic_init_data[i];
  1084. config.driver_data = pmic;
  1085. config.regmap = tps65910->regmap;
  1086. if (tps65910_reg_matches)
  1087. config.of_node = tps65910_reg_matches[i].of_node;
  1088. rdev = devm_regulator_register(&pdev->dev, &pmic->desc[i],
  1089. &config);
  1090. if (IS_ERR(rdev)) {
  1091. dev_err(tps65910->dev,
  1092. "failed to register %s regulator\n",
  1093. pdev->name);
  1094. return PTR_ERR(rdev);
  1095. }
  1096. /* Save regulator for cleanup */
  1097. pmic->rdev[i] = rdev;
  1098. }
  1099. return 0;
  1100. }
  1101. static void tps65910_shutdown(struct platform_device *pdev)
  1102. {
  1103. struct tps65910_reg *pmic = platform_get_drvdata(pdev);
  1104. int i;
  1105. /*
  1106. * Before bootloader jumps to kernel, it makes sure that required
  1107. * external control signals are in desired state so that given rails
  1108. * can be configure accordingly.
  1109. * If rails are configured to be controlled from external control
  1110. * then before shutting down/rebooting the system, the external
  1111. * control configuration need to be remove from the rails so that
  1112. * its output will be available as per register programming even
  1113. * if external controls are removed. This is require when the POR
  1114. * value of the control signals are not in active state and before
  1115. * bootloader initializes it, the system requires the rail output
  1116. * to be active for booting.
  1117. */
  1118. for (i = 0; i < pmic->num_regulators; i++) {
  1119. int err;
  1120. if (!pmic->rdev[i])
  1121. continue;
  1122. err = tps65910_set_ext_sleep_config(pmic, i, 0);
  1123. if (err < 0)
  1124. dev_err(&pdev->dev,
  1125. "Error in clearing external control\n");
  1126. }
  1127. }
  1128. static struct platform_driver tps65910_driver = {
  1129. .driver = {
  1130. .name = "tps65910-pmic",
  1131. },
  1132. .probe = tps65910_probe,
  1133. .shutdown = tps65910_shutdown,
  1134. };
  1135. static int __init tps65910_init(void)
  1136. {
  1137. return platform_driver_register(&tps65910_driver);
  1138. }
  1139. subsys_initcall(tps65910_init);
  1140. static void __exit tps65910_cleanup(void)
  1141. {
  1142. platform_driver_unregister(&tps65910_driver);
  1143. }
  1144. module_exit(tps65910_cleanup);
  1145. MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
  1146. MODULE_DESCRIPTION("TPS65910/TPS65911 voltage regulator driver");
  1147. MODULE_LICENSE("GPL v2");
  1148. MODULE_ALIAS("platform:tps65910-pmic");