max31790.c 12 KB

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  1. /*
  2. * max31790.c - Part of lm_sensors, Linux kernel modules for hardware
  3. * monitoring.
  4. *
  5. * (C) 2015 by Il Han <corone.il.han@gmail.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. */
  17. #include <linux/err.h>
  18. #include <linux/hwmon.h>
  19. #include <linux/i2c.h>
  20. #include <linux/init.h>
  21. #include <linux/jiffies.h>
  22. #include <linux/module.h>
  23. #include <linux/slab.h>
  24. /* MAX31790 registers */
  25. #define MAX31790_REG_GLOBAL_CONFIG 0x00
  26. #define MAX31790_REG_FAN_CONFIG(ch) (0x02 + (ch))
  27. #define MAX31790_REG_FAN_DYNAMICS(ch) (0x08 + (ch))
  28. #define MAX31790_REG_FAN_FAULT_STATUS2 0x10
  29. #define MAX31790_REG_FAN_FAULT_STATUS1 0x11
  30. #define MAX31790_REG_TACH_COUNT(ch) (0x18 + (ch) * 2)
  31. #define MAX31790_REG_PWM_DUTY_CYCLE(ch) (0x30 + (ch) * 2)
  32. #define MAX31790_REG_PWMOUT(ch) (0x40 + (ch) * 2)
  33. #define MAX31790_REG_TARGET_COUNT(ch) (0x50 + (ch) * 2)
  34. /* Fan Config register bits */
  35. #define MAX31790_FAN_CFG_RPM_MODE 0x80
  36. #define MAX31790_FAN_CFG_TACH_INPUT_EN 0x08
  37. #define MAX31790_FAN_CFG_TACH_INPUT 0x01
  38. /* Fan Dynamics register bits */
  39. #define MAX31790_FAN_DYN_SR_SHIFT 5
  40. #define MAX31790_FAN_DYN_SR_MASK 0xE0
  41. #define SR_FROM_REG(reg) (((reg) & MAX31790_FAN_DYN_SR_MASK) \
  42. >> MAX31790_FAN_DYN_SR_SHIFT)
  43. #define FAN_RPM_MIN 120
  44. #define FAN_RPM_MAX 7864320
  45. #define RPM_FROM_REG(reg, sr) (((reg) >> 4) ? \
  46. ((60 * (sr) * 8192) / ((reg) >> 4)) : \
  47. FAN_RPM_MAX)
  48. #define RPM_TO_REG(rpm, sr) ((60 * (sr) * 8192) / ((rpm) * 2))
  49. #define NR_CHANNEL 6
  50. /*
  51. * Client data (each client gets its own)
  52. */
  53. struct max31790_data {
  54. struct i2c_client *client;
  55. struct mutex update_lock;
  56. bool valid; /* zero until following fields are valid */
  57. unsigned long last_updated; /* in jiffies */
  58. /* register values */
  59. u8 fan_config[NR_CHANNEL];
  60. u8 fan_dynamics[NR_CHANNEL];
  61. u16 fault_status;
  62. u16 tach[NR_CHANNEL * 2];
  63. u16 pwm[NR_CHANNEL];
  64. u16 target_count[NR_CHANNEL];
  65. };
  66. static struct max31790_data *max31790_update_device(struct device *dev)
  67. {
  68. struct max31790_data *data = dev_get_drvdata(dev);
  69. struct i2c_client *client = data->client;
  70. struct max31790_data *ret = data;
  71. int i;
  72. int rv;
  73. mutex_lock(&data->update_lock);
  74. if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
  75. rv = i2c_smbus_read_byte_data(client,
  76. MAX31790_REG_FAN_FAULT_STATUS1);
  77. if (rv < 0)
  78. goto abort;
  79. data->fault_status = rv & 0x3F;
  80. rv = i2c_smbus_read_byte_data(client,
  81. MAX31790_REG_FAN_FAULT_STATUS2);
  82. if (rv < 0)
  83. goto abort;
  84. data->fault_status |= (rv & 0x3F) << 6;
  85. for (i = 0; i < NR_CHANNEL; i++) {
  86. rv = i2c_smbus_read_word_swapped(client,
  87. MAX31790_REG_TACH_COUNT(i));
  88. if (rv < 0)
  89. goto abort;
  90. data->tach[i] = rv;
  91. if (data->fan_config[i]
  92. & MAX31790_FAN_CFG_TACH_INPUT) {
  93. rv = i2c_smbus_read_word_swapped(client,
  94. MAX31790_REG_TACH_COUNT(NR_CHANNEL
  95. + i));
  96. if (rv < 0)
  97. goto abort;
  98. data->tach[NR_CHANNEL + i] = rv;
  99. } else {
  100. rv = i2c_smbus_read_word_swapped(client,
  101. MAX31790_REG_PWMOUT(i));
  102. if (rv < 0)
  103. goto abort;
  104. data->pwm[i] = rv;
  105. rv = i2c_smbus_read_word_swapped(client,
  106. MAX31790_REG_TARGET_COUNT(i));
  107. if (rv < 0)
  108. goto abort;
  109. data->target_count[i] = rv;
  110. }
  111. }
  112. data->last_updated = jiffies;
  113. data->valid = true;
  114. }
  115. goto done;
  116. abort:
  117. data->valid = false;
  118. ret = ERR_PTR(rv);
  119. done:
  120. mutex_unlock(&data->update_lock);
  121. return ret;
  122. }
  123. static const u8 tach_period[8] = { 1, 2, 4, 8, 16, 32, 32, 32 };
  124. static u8 get_tach_period(u8 fan_dynamics)
  125. {
  126. return tach_period[SR_FROM_REG(fan_dynamics)];
  127. }
  128. static u8 bits_for_tach_period(int rpm)
  129. {
  130. u8 bits;
  131. if (rpm < 500)
  132. bits = 0x0;
  133. else if (rpm < 1000)
  134. bits = 0x1;
  135. else if (rpm < 2000)
  136. bits = 0x2;
  137. else if (rpm < 4000)
  138. bits = 0x3;
  139. else if (rpm < 8000)
  140. bits = 0x4;
  141. else
  142. bits = 0x5;
  143. return bits;
  144. }
  145. static int max31790_read_fan(struct device *dev, u32 attr, int channel,
  146. long *val)
  147. {
  148. struct max31790_data *data = max31790_update_device(dev);
  149. int sr, rpm;
  150. if (IS_ERR(data))
  151. return PTR_ERR(data);
  152. switch (attr) {
  153. case hwmon_fan_input:
  154. sr = get_tach_period(data->fan_dynamics[channel]);
  155. rpm = RPM_FROM_REG(data->tach[channel], sr);
  156. *val = rpm;
  157. return 0;
  158. case hwmon_fan_target:
  159. sr = get_tach_period(data->fan_dynamics[channel]);
  160. rpm = RPM_FROM_REG(data->target_count[channel], sr);
  161. *val = rpm;
  162. return 0;
  163. case hwmon_fan_fault:
  164. *val = !!(data->fault_status & (1 << channel));
  165. return 0;
  166. default:
  167. return -EOPNOTSUPP;
  168. }
  169. }
  170. static int max31790_write_fan(struct device *dev, u32 attr, int channel,
  171. long val)
  172. {
  173. struct max31790_data *data = dev_get_drvdata(dev);
  174. struct i2c_client *client = data->client;
  175. int target_count;
  176. int err = 0;
  177. u8 bits;
  178. int sr;
  179. mutex_lock(&data->update_lock);
  180. switch (attr) {
  181. case hwmon_fan_target:
  182. val = clamp_val(val, FAN_RPM_MIN, FAN_RPM_MAX);
  183. bits = bits_for_tach_period(val);
  184. data->fan_dynamics[channel] =
  185. ((data->fan_dynamics[channel] &
  186. ~MAX31790_FAN_DYN_SR_MASK) |
  187. (bits << MAX31790_FAN_DYN_SR_SHIFT));
  188. err = i2c_smbus_write_byte_data(client,
  189. MAX31790_REG_FAN_DYNAMICS(channel),
  190. data->fan_dynamics[channel]);
  191. if (err < 0)
  192. break;
  193. sr = get_tach_period(data->fan_dynamics[channel]);
  194. target_count = RPM_TO_REG(val, sr);
  195. target_count = clamp_val(target_count, 0x1, 0x7FF);
  196. data->target_count[channel] = target_count << 5;
  197. err = i2c_smbus_write_word_swapped(client,
  198. MAX31790_REG_TARGET_COUNT(channel),
  199. data->target_count[channel]);
  200. break;
  201. default:
  202. err = -EOPNOTSUPP;
  203. break;
  204. }
  205. mutex_unlock(&data->update_lock);
  206. return err;
  207. }
  208. static umode_t max31790_fan_is_visible(const void *_data, u32 attr, int channel)
  209. {
  210. const struct max31790_data *data = _data;
  211. u8 fan_config = data->fan_config[channel % NR_CHANNEL];
  212. switch (attr) {
  213. case hwmon_fan_input:
  214. case hwmon_fan_fault:
  215. if (channel < NR_CHANNEL ||
  216. (fan_config & MAX31790_FAN_CFG_TACH_INPUT))
  217. return S_IRUGO;
  218. return 0;
  219. case hwmon_fan_target:
  220. if (channel < NR_CHANNEL &&
  221. !(fan_config & MAX31790_FAN_CFG_TACH_INPUT))
  222. return S_IRUGO | S_IWUSR;
  223. return 0;
  224. default:
  225. return 0;
  226. }
  227. }
  228. static int max31790_read_pwm(struct device *dev, u32 attr, int channel,
  229. long *val)
  230. {
  231. struct max31790_data *data = max31790_update_device(dev);
  232. u8 fan_config;
  233. if (IS_ERR(data))
  234. return PTR_ERR(data);
  235. fan_config = data->fan_config[channel];
  236. switch (attr) {
  237. case hwmon_pwm_input:
  238. *val = data->pwm[channel] >> 8;
  239. return 0;
  240. case hwmon_pwm_enable:
  241. if (fan_config & MAX31790_FAN_CFG_RPM_MODE)
  242. *val = 2;
  243. else if (fan_config & MAX31790_FAN_CFG_TACH_INPUT_EN)
  244. *val = 1;
  245. else
  246. *val = 0;
  247. return 0;
  248. default:
  249. return -EOPNOTSUPP;
  250. }
  251. }
  252. static int max31790_write_pwm(struct device *dev, u32 attr, int channel,
  253. long val)
  254. {
  255. struct max31790_data *data = dev_get_drvdata(dev);
  256. struct i2c_client *client = data->client;
  257. u8 fan_config;
  258. int err = 0;
  259. mutex_lock(&data->update_lock);
  260. switch (attr) {
  261. case hwmon_pwm_input:
  262. if (val < 0 || val > 255) {
  263. err = -EINVAL;
  264. break;
  265. }
  266. data->pwm[channel] = val << 8;
  267. err = i2c_smbus_write_word_swapped(client,
  268. MAX31790_REG_PWMOUT(channel),
  269. data->pwm[channel]);
  270. break;
  271. case hwmon_pwm_enable:
  272. fan_config = data->fan_config[channel];
  273. if (val == 0) {
  274. fan_config &= ~(MAX31790_FAN_CFG_TACH_INPUT_EN |
  275. MAX31790_FAN_CFG_RPM_MODE);
  276. } else if (val == 1) {
  277. fan_config = (fan_config |
  278. MAX31790_FAN_CFG_TACH_INPUT_EN) &
  279. ~MAX31790_FAN_CFG_RPM_MODE;
  280. } else if (val == 2) {
  281. fan_config |= MAX31790_FAN_CFG_TACH_INPUT_EN |
  282. MAX31790_FAN_CFG_RPM_MODE;
  283. } else {
  284. err = -EINVAL;
  285. break;
  286. }
  287. data->fan_config[channel] = fan_config;
  288. err = i2c_smbus_write_byte_data(client,
  289. MAX31790_REG_FAN_CONFIG(channel),
  290. fan_config);
  291. break;
  292. default:
  293. err = -EOPNOTSUPP;
  294. break;
  295. }
  296. mutex_unlock(&data->update_lock);
  297. return err;
  298. }
  299. static umode_t max31790_pwm_is_visible(const void *_data, u32 attr, int channel)
  300. {
  301. const struct max31790_data *data = _data;
  302. u8 fan_config = data->fan_config[channel];
  303. switch (attr) {
  304. case hwmon_pwm_input:
  305. case hwmon_pwm_enable:
  306. if (!(fan_config & MAX31790_FAN_CFG_TACH_INPUT))
  307. return S_IRUGO | S_IWUSR;
  308. return 0;
  309. default:
  310. return 0;
  311. }
  312. }
  313. static int max31790_read(struct device *dev, enum hwmon_sensor_types type,
  314. u32 attr, int channel, long *val)
  315. {
  316. switch (type) {
  317. case hwmon_fan:
  318. return max31790_read_fan(dev, attr, channel, val);
  319. case hwmon_pwm:
  320. return max31790_read_pwm(dev, attr, channel, val);
  321. default:
  322. return -EOPNOTSUPP;
  323. }
  324. }
  325. static int max31790_write(struct device *dev, enum hwmon_sensor_types type,
  326. u32 attr, int channel, long val)
  327. {
  328. switch (type) {
  329. case hwmon_fan:
  330. return max31790_write_fan(dev, attr, channel, val);
  331. case hwmon_pwm:
  332. return max31790_write_pwm(dev, attr, channel, val);
  333. default:
  334. return -EOPNOTSUPP;
  335. }
  336. }
  337. static umode_t max31790_is_visible(const void *data,
  338. enum hwmon_sensor_types type,
  339. u32 attr, int channel)
  340. {
  341. switch (type) {
  342. case hwmon_fan:
  343. return max31790_fan_is_visible(data, attr, channel);
  344. case hwmon_pwm:
  345. return max31790_pwm_is_visible(data, attr, channel);
  346. default:
  347. return 0;
  348. }
  349. }
  350. static const u32 max31790_fan_config[] = {
  351. HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
  352. HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
  353. HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
  354. HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
  355. HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
  356. HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
  357. HWMON_F_INPUT | HWMON_F_FAULT,
  358. HWMON_F_INPUT | HWMON_F_FAULT,
  359. HWMON_F_INPUT | HWMON_F_FAULT,
  360. HWMON_F_INPUT | HWMON_F_FAULT,
  361. HWMON_F_INPUT | HWMON_F_FAULT,
  362. HWMON_F_INPUT | HWMON_F_FAULT,
  363. 0
  364. };
  365. static const struct hwmon_channel_info max31790_fan = {
  366. .type = hwmon_fan,
  367. .config = max31790_fan_config,
  368. };
  369. static const u32 max31790_pwm_config[] = {
  370. HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
  371. HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
  372. HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
  373. HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
  374. HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
  375. HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
  376. 0
  377. };
  378. static const struct hwmon_channel_info max31790_pwm = {
  379. .type = hwmon_pwm,
  380. .config = max31790_pwm_config,
  381. };
  382. static const struct hwmon_channel_info *max31790_info[] = {
  383. &max31790_fan,
  384. &max31790_pwm,
  385. NULL
  386. };
  387. static const struct hwmon_ops max31790_hwmon_ops = {
  388. .is_visible = max31790_is_visible,
  389. .read = max31790_read,
  390. .write = max31790_write,
  391. };
  392. static const struct hwmon_chip_info max31790_chip_info = {
  393. .ops = &max31790_hwmon_ops,
  394. .info = max31790_info,
  395. };
  396. static int max31790_init_client(struct i2c_client *client,
  397. struct max31790_data *data)
  398. {
  399. int i, rv;
  400. for (i = 0; i < NR_CHANNEL; i++) {
  401. rv = i2c_smbus_read_byte_data(client,
  402. MAX31790_REG_FAN_CONFIG(i));
  403. if (rv < 0)
  404. return rv;
  405. data->fan_config[i] = rv;
  406. rv = i2c_smbus_read_byte_data(client,
  407. MAX31790_REG_FAN_DYNAMICS(i));
  408. if (rv < 0)
  409. return rv;
  410. data->fan_dynamics[i] = rv;
  411. }
  412. return 0;
  413. }
  414. static int max31790_probe(struct i2c_client *client,
  415. const struct i2c_device_id *id)
  416. {
  417. struct i2c_adapter *adapter = client->adapter;
  418. struct device *dev = &client->dev;
  419. struct max31790_data *data;
  420. struct device *hwmon_dev;
  421. int err;
  422. if (!i2c_check_functionality(adapter,
  423. I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA))
  424. return -ENODEV;
  425. data = devm_kzalloc(dev, sizeof(struct max31790_data), GFP_KERNEL);
  426. if (!data)
  427. return -ENOMEM;
  428. data->client = client;
  429. mutex_init(&data->update_lock);
  430. /*
  431. * Initialize the max31790 chip
  432. */
  433. err = max31790_init_client(client, data);
  434. if (err)
  435. return err;
  436. hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
  437. data,
  438. &max31790_chip_info,
  439. NULL);
  440. return PTR_ERR_OR_ZERO(hwmon_dev);
  441. }
  442. static const struct i2c_device_id max31790_id[] = {
  443. { "max31790", 0 },
  444. { }
  445. };
  446. MODULE_DEVICE_TABLE(i2c, max31790_id);
  447. static struct i2c_driver max31790_driver = {
  448. .class = I2C_CLASS_HWMON,
  449. .probe = max31790_probe,
  450. .driver = {
  451. .name = "max31790",
  452. },
  453. .id_table = max31790_id,
  454. };
  455. module_i2c_driver(max31790_driver);
  456. MODULE_AUTHOR("Il Han <corone.il.han@gmail.com>");
  457. MODULE_DESCRIPTION("MAX31790 sensor driver");
  458. MODULE_LICENSE("GPL");