tpm_i2c_nuvoton.c 19 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681
  1. /******************************************************************************
  2. * Nuvoton TPM I2C Device Driver Interface for WPCT301/NPCT501/NPCT6XX,
  3. * based on the TCG TPM Interface Spec version 1.2.
  4. * Specifications at www.trustedcomputinggroup.org
  5. *
  6. * Copyright (C) 2011, Nuvoton Technology Corporation.
  7. * Dan Morav <dan.morav@nuvoton.com>
  8. * Copyright (C) 2013, Obsidian Research Corp.
  9. * Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
  10. *
  11. * This program is free software: you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation, either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program. If not, see http://www.gnu.org/licenses/>.
  23. *
  24. * Nuvoton contact information: APC.Support@nuvoton.com
  25. *****************************************************************************/
  26. #include <linux/init.h>
  27. #include <linux/module.h>
  28. #include <linux/moduleparam.h>
  29. #include <linux/slab.h>
  30. #include <linux/interrupt.h>
  31. #include <linux/wait.h>
  32. #include <linux/i2c.h>
  33. #include <linux/of_device.h>
  34. #include "tpm.h"
  35. /* I2C interface offsets */
  36. #define TPM_STS 0x00
  37. #define TPM_BURST_COUNT 0x01
  38. #define TPM_DATA_FIFO_W 0x20
  39. #define TPM_DATA_FIFO_R 0x40
  40. #define TPM_VID_DID_RID 0x60
  41. /* TPM command header size */
  42. #define TPM_HEADER_SIZE 10
  43. #define TPM_RETRY 5
  44. /*
  45. * I2C bus device maximum buffer size w/o counting I2C address or command
  46. * i.e. max size required for I2C write is 34 = addr, command, 32 bytes data
  47. */
  48. #define TPM_I2C_MAX_BUF_SIZE 32
  49. #define TPM_I2C_RETRY_COUNT 32
  50. #define TPM_I2C_BUS_DELAY 1000 /* usec */
  51. #define TPM_I2C_RETRY_DELAY_SHORT (2 * 1000) /* usec */
  52. #define TPM_I2C_RETRY_DELAY_LONG (10 * 1000) /* usec */
  53. #define TPM_I2C_DELAY_RANGE 300 /* usec */
  54. #define OF_IS_TPM2 ((void *)1)
  55. #define I2C_IS_TPM2 1
  56. struct priv_data {
  57. int irq;
  58. unsigned int intrs;
  59. wait_queue_head_t read_queue;
  60. };
  61. static s32 i2c_nuvoton_read_buf(struct i2c_client *client, u8 offset, u8 size,
  62. u8 *data)
  63. {
  64. s32 status;
  65. status = i2c_smbus_read_i2c_block_data(client, offset, size, data);
  66. dev_dbg(&client->dev,
  67. "%s(offset=%u size=%u data=%*ph) -> sts=%d\n", __func__,
  68. offset, size, (int)size, data, status);
  69. return status;
  70. }
  71. static s32 i2c_nuvoton_write_buf(struct i2c_client *client, u8 offset, u8 size,
  72. u8 *data)
  73. {
  74. s32 status;
  75. status = i2c_smbus_write_i2c_block_data(client, offset, size, data);
  76. dev_dbg(&client->dev,
  77. "%s(offset=%u size=%u data=%*ph) -> sts=%d\n", __func__,
  78. offset, size, (int)size, data, status);
  79. return status;
  80. }
  81. #define TPM_STS_VALID 0x80
  82. #define TPM_STS_COMMAND_READY 0x40
  83. #define TPM_STS_GO 0x20
  84. #define TPM_STS_DATA_AVAIL 0x10
  85. #define TPM_STS_EXPECT 0x08
  86. #define TPM_STS_RESPONSE_RETRY 0x02
  87. #define TPM_STS_ERR_VAL 0x07 /* bit2...bit0 reads always 0 */
  88. #define TPM_I2C_SHORT_TIMEOUT 750 /* ms */
  89. #define TPM_I2C_LONG_TIMEOUT 2000 /* 2 sec */
  90. /* read TPM_STS register */
  91. static u8 i2c_nuvoton_read_status(struct tpm_chip *chip)
  92. {
  93. struct i2c_client *client = to_i2c_client(chip->dev.parent);
  94. s32 status;
  95. u8 data;
  96. status = i2c_nuvoton_read_buf(client, TPM_STS, 1, &data);
  97. if (status <= 0) {
  98. dev_err(&chip->dev, "%s() error return %d\n", __func__,
  99. status);
  100. data = TPM_STS_ERR_VAL;
  101. }
  102. return data;
  103. }
  104. /* write byte to TPM_STS register */
  105. static s32 i2c_nuvoton_write_status(struct i2c_client *client, u8 data)
  106. {
  107. s32 status;
  108. int i;
  109. /* this causes the current command to be aborted */
  110. for (i = 0, status = -1; i < TPM_I2C_RETRY_COUNT && status < 0; i++) {
  111. status = i2c_nuvoton_write_buf(client, TPM_STS, 1, &data);
  112. if (status < 0)
  113. usleep_range(TPM_I2C_BUS_DELAY, TPM_I2C_BUS_DELAY
  114. + TPM_I2C_DELAY_RANGE);
  115. }
  116. return status;
  117. }
  118. /* write commandReady to TPM_STS register */
  119. static void i2c_nuvoton_ready(struct tpm_chip *chip)
  120. {
  121. struct i2c_client *client = to_i2c_client(chip->dev.parent);
  122. s32 status;
  123. /* this causes the current command to be aborted */
  124. status = i2c_nuvoton_write_status(client, TPM_STS_COMMAND_READY);
  125. if (status < 0)
  126. dev_err(&chip->dev,
  127. "%s() fail to write TPM_STS.commandReady\n", __func__);
  128. }
  129. /* read burstCount field from TPM_STS register
  130. * return -1 on fail to read */
  131. static int i2c_nuvoton_get_burstcount(struct i2c_client *client,
  132. struct tpm_chip *chip)
  133. {
  134. unsigned long stop = jiffies + chip->timeout_d;
  135. s32 status;
  136. int burst_count = -1;
  137. u8 data;
  138. /* wait for burstcount to be non-zero */
  139. do {
  140. /* in I2C burstCount is 1 byte */
  141. status = i2c_nuvoton_read_buf(client, TPM_BURST_COUNT, 1,
  142. &data);
  143. if (status > 0 && data > 0) {
  144. burst_count = min_t(u8, TPM_I2C_MAX_BUF_SIZE, data);
  145. break;
  146. }
  147. usleep_range(TPM_I2C_BUS_DELAY, TPM_I2C_BUS_DELAY
  148. + TPM_I2C_DELAY_RANGE);
  149. } while (time_before(jiffies, stop));
  150. return burst_count;
  151. }
  152. /*
  153. * WPCT301/NPCT501/NPCT6XX SINT# supports only dataAvail
  154. * any call to this function which is not waiting for dataAvail will
  155. * set queue to NULL to avoid waiting for interrupt
  156. */
  157. static bool i2c_nuvoton_check_status(struct tpm_chip *chip, u8 mask, u8 value)
  158. {
  159. u8 status = i2c_nuvoton_read_status(chip);
  160. return (status != TPM_STS_ERR_VAL) && ((status & mask) == value);
  161. }
  162. static int i2c_nuvoton_wait_for_stat(struct tpm_chip *chip, u8 mask, u8 value,
  163. u32 timeout, wait_queue_head_t *queue)
  164. {
  165. if ((chip->flags & TPM_CHIP_FLAG_IRQ) && queue) {
  166. s32 rc;
  167. struct priv_data *priv = dev_get_drvdata(&chip->dev);
  168. unsigned int cur_intrs = priv->intrs;
  169. enable_irq(priv->irq);
  170. rc = wait_event_interruptible_timeout(*queue,
  171. cur_intrs != priv->intrs,
  172. timeout);
  173. if (rc > 0)
  174. return 0;
  175. /* At this point we know that the SINT pin is asserted, so we
  176. * do not need to do i2c_nuvoton_check_status */
  177. } else {
  178. unsigned long ten_msec, stop;
  179. bool status_valid;
  180. /* check current status */
  181. status_valid = i2c_nuvoton_check_status(chip, mask, value);
  182. if (status_valid)
  183. return 0;
  184. /* use polling to wait for the event */
  185. ten_msec = jiffies + usecs_to_jiffies(TPM_I2C_RETRY_DELAY_LONG);
  186. stop = jiffies + timeout;
  187. do {
  188. if (time_before(jiffies, ten_msec))
  189. usleep_range(TPM_I2C_RETRY_DELAY_SHORT,
  190. TPM_I2C_RETRY_DELAY_SHORT
  191. + TPM_I2C_DELAY_RANGE);
  192. else
  193. usleep_range(TPM_I2C_RETRY_DELAY_LONG,
  194. TPM_I2C_RETRY_DELAY_LONG
  195. + TPM_I2C_DELAY_RANGE);
  196. status_valid = i2c_nuvoton_check_status(chip, mask,
  197. value);
  198. if (status_valid)
  199. return 0;
  200. } while (time_before(jiffies, stop));
  201. }
  202. dev_err(&chip->dev, "%s(%02x, %02x) -> timeout\n", __func__, mask,
  203. value);
  204. return -ETIMEDOUT;
  205. }
  206. /* wait for dataAvail field to be set in the TPM_STS register */
  207. static int i2c_nuvoton_wait_for_data_avail(struct tpm_chip *chip, u32 timeout,
  208. wait_queue_head_t *queue)
  209. {
  210. return i2c_nuvoton_wait_for_stat(chip,
  211. TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  212. TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  213. timeout, queue);
  214. }
  215. /* Read @count bytes into @buf from TPM_RD_FIFO register */
  216. static int i2c_nuvoton_recv_data(struct i2c_client *client,
  217. struct tpm_chip *chip, u8 *buf, size_t count)
  218. {
  219. struct priv_data *priv = dev_get_drvdata(&chip->dev);
  220. s32 rc;
  221. int burst_count, bytes2read, size = 0;
  222. while (size < count &&
  223. i2c_nuvoton_wait_for_data_avail(chip,
  224. chip->timeout_c,
  225. &priv->read_queue) == 0) {
  226. burst_count = i2c_nuvoton_get_burstcount(client, chip);
  227. if (burst_count < 0) {
  228. dev_err(&chip->dev,
  229. "%s() fail to read burstCount=%d\n", __func__,
  230. burst_count);
  231. return -EIO;
  232. }
  233. bytes2read = min_t(size_t, burst_count, count - size);
  234. rc = i2c_nuvoton_read_buf(client, TPM_DATA_FIFO_R,
  235. bytes2read, &buf[size]);
  236. if (rc < 0) {
  237. dev_err(&chip->dev,
  238. "%s() fail on i2c_nuvoton_read_buf()=%d\n",
  239. __func__, rc);
  240. return -EIO;
  241. }
  242. dev_dbg(&chip->dev, "%s(%d):", __func__, bytes2read);
  243. size += bytes2read;
  244. }
  245. return size;
  246. }
  247. /* Read TPM command results */
  248. static int i2c_nuvoton_recv(struct tpm_chip *chip, u8 *buf, size_t count)
  249. {
  250. struct priv_data *priv = dev_get_drvdata(&chip->dev);
  251. struct device *dev = chip->dev.parent;
  252. struct i2c_client *client = to_i2c_client(dev);
  253. s32 rc;
  254. int status;
  255. int burst_count;
  256. int retries;
  257. int size = 0;
  258. u32 expected;
  259. if (count < TPM_HEADER_SIZE) {
  260. i2c_nuvoton_ready(chip); /* return to idle */
  261. dev_err(dev, "%s() count < header size\n", __func__);
  262. return -EIO;
  263. }
  264. for (retries = 0; retries < TPM_RETRY; retries++) {
  265. if (retries > 0) {
  266. /* if this is not the first trial, set responseRetry */
  267. i2c_nuvoton_write_status(client,
  268. TPM_STS_RESPONSE_RETRY);
  269. }
  270. /*
  271. * read first available (> 10 bytes), including:
  272. * tag, paramsize, and result
  273. */
  274. status = i2c_nuvoton_wait_for_data_avail(
  275. chip, chip->timeout_c, &priv->read_queue);
  276. if (status != 0) {
  277. dev_err(dev, "%s() timeout on dataAvail\n", __func__);
  278. size = -ETIMEDOUT;
  279. continue;
  280. }
  281. burst_count = i2c_nuvoton_get_burstcount(client, chip);
  282. if (burst_count < 0) {
  283. dev_err(dev, "%s() fail to get burstCount\n", __func__);
  284. size = -EIO;
  285. continue;
  286. }
  287. size = i2c_nuvoton_recv_data(client, chip, buf,
  288. burst_count);
  289. if (size < TPM_HEADER_SIZE) {
  290. dev_err(dev, "%s() fail to read header\n", __func__);
  291. size = -EIO;
  292. continue;
  293. }
  294. /*
  295. * convert number of expected bytes field from big endian 32 bit
  296. * to machine native
  297. */
  298. expected = be32_to_cpu(*(__be32 *) (buf + 2));
  299. if (expected > count || expected < size) {
  300. dev_err(dev, "%s() expected > count\n", __func__);
  301. size = -EIO;
  302. continue;
  303. }
  304. rc = i2c_nuvoton_recv_data(client, chip, &buf[size],
  305. expected - size);
  306. size += rc;
  307. if (rc < 0 || size < expected) {
  308. dev_err(dev, "%s() fail to read remainder of result\n",
  309. __func__);
  310. size = -EIO;
  311. continue;
  312. }
  313. if (i2c_nuvoton_wait_for_stat(
  314. chip, TPM_STS_VALID | TPM_STS_DATA_AVAIL,
  315. TPM_STS_VALID, chip->timeout_c,
  316. NULL)) {
  317. dev_err(dev, "%s() error left over data\n", __func__);
  318. size = -ETIMEDOUT;
  319. continue;
  320. }
  321. break;
  322. }
  323. i2c_nuvoton_ready(chip);
  324. dev_dbg(&chip->dev, "%s() -> %d\n", __func__, size);
  325. return size;
  326. }
  327. /*
  328. * Send TPM command.
  329. *
  330. * If interrupts are used (signaled by an irq set in the vendor structure)
  331. * tpm.c can skip polling for the data to be available as the interrupt is
  332. * waited for here
  333. */
  334. static int i2c_nuvoton_send(struct tpm_chip *chip, u8 *buf, size_t len)
  335. {
  336. struct priv_data *priv = dev_get_drvdata(&chip->dev);
  337. struct device *dev = chip->dev.parent;
  338. struct i2c_client *client = to_i2c_client(dev);
  339. u32 ordinal;
  340. size_t count = 0;
  341. int burst_count, bytes2write, retries, rc = -EIO;
  342. for (retries = 0; retries < TPM_RETRY; retries++) {
  343. i2c_nuvoton_ready(chip);
  344. if (i2c_nuvoton_wait_for_stat(chip, TPM_STS_COMMAND_READY,
  345. TPM_STS_COMMAND_READY,
  346. chip->timeout_b, NULL)) {
  347. dev_err(dev, "%s() timeout on commandReady\n",
  348. __func__);
  349. rc = -EIO;
  350. continue;
  351. }
  352. rc = 0;
  353. while (count < len - 1) {
  354. burst_count = i2c_nuvoton_get_burstcount(client,
  355. chip);
  356. if (burst_count < 0) {
  357. dev_err(dev, "%s() fail get burstCount\n",
  358. __func__);
  359. rc = -EIO;
  360. break;
  361. }
  362. bytes2write = min_t(size_t, burst_count,
  363. len - 1 - count);
  364. rc = i2c_nuvoton_write_buf(client, TPM_DATA_FIFO_W,
  365. bytes2write, &buf[count]);
  366. if (rc < 0) {
  367. dev_err(dev, "%s() fail i2cWriteBuf\n",
  368. __func__);
  369. break;
  370. }
  371. dev_dbg(dev, "%s(%d):", __func__, bytes2write);
  372. count += bytes2write;
  373. rc = i2c_nuvoton_wait_for_stat(chip,
  374. TPM_STS_VALID |
  375. TPM_STS_EXPECT,
  376. TPM_STS_VALID |
  377. TPM_STS_EXPECT,
  378. chip->timeout_c,
  379. NULL);
  380. if (rc < 0) {
  381. dev_err(dev, "%s() timeout on Expect\n",
  382. __func__);
  383. rc = -ETIMEDOUT;
  384. break;
  385. }
  386. }
  387. if (rc < 0)
  388. continue;
  389. /* write last byte */
  390. rc = i2c_nuvoton_write_buf(client, TPM_DATA_FIFO_W, 1,
  391. &buf[count]);
  392. if (rc < 0) {
  393. dev_err(dev, "%s() fail to write last byte\n",
  394. __func__);
  395. rc = -EIO;
  396. continue;
  397. }
  398. dev_dbg(dev, "%s(last): %02x", __func__, buf[count]);
  399. rc = i2c_nuvoton_wait_for_stat(chip,
  400. TPM_STS_VALID | TPM_STS_EXPECT,
  401. TPM_STS_VALID,
  402. chip->timeout_c, NULL);
  403. if (rc) {
  404. dev_err(dev, "%s() timeout on Expect to clear\n",
  405. __func__);
  406. rc = -ETIMEDOUT;
  407. continue;
  408. }
  409. break;
  410. }
  411. if (rc < 0) {
  412. /* retries == TPM_RETRY */
  413. i2c_nuvoton_ready(chip);
  414. return rc;
  415. }
  416. /* execute the TPM command */
  417. rc = i2c_nuvoton_write_status(client, TPM_STS_GO);
  418. if (rc < 0) {
  419. dev_err(dev, "%s() fail to write Go\n", __func__);
  420. i2c_nuvoton_ready(chip);
  421. return rc;
  422. }
  423. ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
  424. rc = i2c_nuvoton_wait_for_data_avail(chip,
  425. tpm_calc_ordinal_duration(chip,
  426. ordinal),
  427. &priv->read_queue);
  428. if (rc) {
  429. dev_err(dev, "%s() timeout command duration\n", __func__);
  430. i2c_nuvoton_ready(chip);
  431. return rc;
  432. }
  433. dev_dbg(dev, "%s() -> %zd\n", __func__, len);
  434. return len;
  435. }
  436. static bool i2c_nuvoton_req_canceled(struct tpm_chip *chip, u8 status)
  437. {
  438. return (status == TPM_STS_COMMAND_READY);
  439. }
  440. static const struct tpm_class_ops tpm_i2c = {
  441. .flags = TPM_OPS_AUTO_STARTUP,
  442. .status = i2c_nuvoton_read_status,
  443. .recv = i2c_nuvoton_recv,
  444. .send = i2c_nuvoton_send,
  445. .cancel = i2c_nuvoton_ready,
  446. .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  447. .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  448. .req_canceled = i2c_nuvoton_req_canceled,
  449. };
  450. /* The only purpose for the handler is to signal to any waiting threads that
  451. * the interrupt is currently being asserted. The driver does not do any
  452. * processing triggered by interrupts, and the chip provides no way to mask at
  453. * the source (plus that would be slow over I2C). Run the IRQ as a one-shot,
  454. * this means it cannot be shared. */
  455. static irqreturn_t i2c_nuvoton_int_handler(int dummy, void *dev_id)
  456. {
  457. struct tpm_chip *chip = dev_id;
  458. struct priv_data *priv = dev_get_drvdata(&chip->dev);
  459. priv->intrs++;
  460. wake_up(&priv->read_queue);
  461. disable_irq_nosync(priv->irq);
  462. return IRQ_HANDLED;
  463. }
  464. static int get_vid(struct i2c_client *client, u32 *res)
  465. {
  466. static const u8 vid_did_rid_value[] = { 0x50, 0x10, 0xfe };
  467. u32 temp;
  468. s32 rc;
  469. if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
  470. return -ENODEV;
  471. rc = i2c_nuvoton_read_buf(client, TPM_VID_DID_RID, 4, (u8 *)&temp);
  472. if (rc < 0)
  473. return rc;
  474. /* check WPCT301 values - ignore RID */
  475. if (memcmp(&temp, vid_did_rid_value, sizeof(vid_did_rid_value))) {
  476. /*
  477. * f/w rev 2.81 has an issue where the VID_DID_RID is not
  478. * reporting the right value. so give it another chance at
  479. * offset 0x20 (FIFO_W).
  480. */
  481. rc = i2c_nuvoton_read_buf(client, TPM_DATA_FIFO_W, 4,
  482. (u8 *) (&temp));
  483. if (rc < 0)
  484. return rc;
  485. /* check WPCT301 values - ignore RID */
  486. if (memcmp(&temp, vid_did_rid_value,
  487. sizeof(vid_did_rid_value)))
  488. return -ENODEV;
  489. }
  490. *res = temp;
  491. return 0;
  492. }
  493. static int i2c_nuvoton_probe(struct i2c_client *client,
  494. const struct i2c_device_id *id)
  495. {
  496. int rc;
  497. struct tpm_chip *chip;
  498. struct device *dev = &client->dev;
  499. struct priv_data *priv;
  500. u32 vid = 0;
  501. rc = get_vid(client, &vid);
  502. if (rc)
  503. return rc;
  504. dev_info(dev, "VID: %04X DID: %02X RID: %02X\n", (u16) vid,
  505. (u8) (vid >> 16), (u8) (vid >> 24));
  506. chip = tpmm_chip_alloc(dev, &tpm_i2c);
  507. if (IS_ERR(chip))
  508. return PTR_ERR(chip);
  509. priv = devm_kzalloc(dev, sizeof(struct priv_data), GFP_KERNEL);
  510. if (!priv)
  511. return -ENOMEM;
  512. if (dev->of_node) {
  513. const struct of_device_id *of_id;
  514. of_id = of_match_device(dev->driver->of_match_table, dev);
  515. if (of_id && of_id->data == OF_IS_TPM2)
  516. chip->flags |= TPM_CHIP_FLAG_TPM2;
  517. } else
  518. if (id->driver_data == I2C_IS_TPM2)
  519. chip->flags |= TPM_CHIP_FLAG_TPM2;
  520. init_waitqueue_head(&priv->read_queue);
  521. /* Default timeouts */
  522. chip->timeout_a = msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT);
  523. chip->timeout_b = msecs_to_jiffies(TPM_I2C_LONG_TIMEOUT);
  524. chip->timeout_c = msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT);
  525. chip->timeout_d = msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT);
  526. dev_set_drvdata(&chip->dev, priv);
  527. /*
  528. * I2C intfcaps (interrupt capabilitieis) in the chip are hard coded to:
  529. * TPM_INTF_INT_LEVEL_LOW | TPM_INTF_DATA_AVAIL_INT
  530. * The IRQ should be set in the i2c_board_info (which is done
  531. * automatically in of_i2c_register_devices, for device tree users */
  532. priv->irq = client->irq;
  533. if (client->irq) {
  534. dev_dbg(dev, "%s() priv->irq\n", __func__);
  535. rc = devm_request_irq(dev, client->irq,
  536. i2c_nuvoton_int_handler,
  537. IRQF_TRIGGER_LOW,
  538. dev_name(&chip->dev),
  539. chip);
  540. if (rc) {
  541. dev_err(dev, "%s() Unable to request irq: %d for use\n",
  542. __func__, priv->irq);
  543. priv->irq = 0;
  544. } else {
  545. chip->flags |= TPM_CHIP_FLAG_IRQ;
  546. /* Clear any pending interrupt */
  547. i2c_nuvoton_ready(chip);
  548. /* - wait for TPM_STS==0xA0 (stsValid, commandReady) */
  549. rc = i2c_nuvoton_wait_for_stat(chip,
  550. TPM_STS_COMMAND_READY,
  551. TPM_STS_COMMAND_READY,
  552. chip->timeout_b,
  553. NULL);
  554. if (rc == 0) {
  555. /*
  556. * TIS is in ready state
  557. * write dummy byte to enter reception state
  558. * TPM_DATA_FIFO_W <- rc (0)
  559. */
  560. rc = i2c_nuvoton_write_buf(client,
  561. TPM_DATA_FIFO_W,
  562. 1, (u8 *) (&rc));
  563. if (rc < 0)
  564. return rc;
  565. /* TPM_STS <- 0x40 (commandReady) */
  566. i2c_nuvoton_ready(chip);
  567. } else {
  568. /*
  569. * timeout_b reached - command was
  570. * aborted. TIS should now be in idle state -
  571. * only TPM_STS_VALID should be set
  572. */
  573. if (i2c_nuvoton_read_status(chip) !=
  574. TPM_STS_VALID)
  575. return -EIO;
  576. }
  577. }
  578. }
  579. return tpm_chip_register(chip);
  580. }
  581. static int i2c_nuvoton_remove(struct i2c_client *client)
  582. {
  583. struct tpm_chip *chip = i2c_get_clientdata(client);
  584. tpm_chip_unregister(chip);
  585. return 0;
  586. }
  587. static const struct i2c_device_id i2c_nuvoton_id[] = {
  588. {"tpm_i2c_nuvoton"},
  589. {"tpm2_i2c_nuvoton", .driver_data = I2C_IS_TPM2},
  590. {}
  591. };
  592. MODULE_DEVICE_TABLE(i2c, i2c_nuvoton_id);
  593. #ifdef CONFIG_OF
  594. static const struct of_device_id i2c_nuvoton_of_match[] = {
  595. {.compatible = "nuvoton,npct501"},
  596. {.compatible = "winbond,wpct301"},
  597. {.compatible = "nuvoton,npct601", .data = OF_IS_TPM2},
  598. {},
  599. };
  600. MODULE_DEVICE_TABLE(of, i2c_nuvoton_of_match);
  601. #endif
  602. static SIMPLE_DEV_PM_OPS(i2c_nuvoton_pm_ops, tpm_pm_suspend, tpm_pm_resume);
  603. static struct i2c_driver i2c_nuvoton_driver = {
  604. .id_table = i2c_nuvoton_id,
  605. .probe = i2c_nuvoton_probe,
  606. .remove = i2c_nuvoton_remove,
  607. .driver = {
  608. .name = "tpm_i2c_nuvoton",
  609. .pm = &i2c_nuvoton_pm_ops,
  610. .of_match_table = of_match_ptr(i2c_nuvoton_of_match),
  611. },
  612. };
  613. module_i2c_driver(i2c_nuvoton_driver);
  614. MODULE_AUTHOR("Dan Morav (dan.morav@nuvoton.com)");
  615. MODULE_DESCRIPTION("Nuvoton TPM I2C Driver");
  616. MODULE_LICENSE("GPL");