pata_sch.c 5.0 KB

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  1. /*
  2. * pata_sch.c - Intel SCH PATA controllers
  3. *
  4. * Copyright (c) 2008 Alek Du <alek.du@intel.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License 2 as published
  8. * by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; see the file COPYING. If not, write to
  17. * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
  18. *
  19. */
  20. /*
  21. * Supports:
  22. * Intel SCH (AF82US15W, AF82US15L, AF82UL11L) chipsets -- see spec at:
  23. * http://download.intel.com/design/chipsets/embedded/datashts/319537.pdf
  24. */
  25. #include <linux/kernel.h>
  26. #include <linux/module.h>
  27. #include <linux/pci.h>
  28. #include <linux/blkdev.h>
  29. #include <linux/delay.h>
  30. #include <linux/device.h>
  31. #include <scsi/scsi_host.h>
  32. #include <linux/libata.h>
  33. #include <linux/dmi.h>
  34. #define DRV_NAME "pata_sch"
  35. #define DRV_VERSION "0.2"
  36. /* see SCH datasheet page 351 */
  37. enum {
  38. D0TIM = 0x80, /* Device 0 Timing Register */
  39. D1TIM = 0x84, /* Device 1 Timing Register */
  40. PM = 0x07, /* PIO Mode Bit Mask */
  41. MDM = (0x03 << 8), /* Multi-word DMA Mode Bit Mask */
  42. UDM = (0x07 << 16), /* Ultra DMA Mode Bit Mask */
  43. PPE = (1 << 30), /* Prefetch/Post Enable */
  44. USD = (1 << 31), /* Use Synchronous DMA */
  45. };
  46. static int sch_init_one(struct pci_dev *pdev,
  47. const struct pci_device_id *ent);
  48. static void sch_set_piomode(struct ata_port *ap, struct ata_device *adev);
  49. static void sch_set_dmamode(struct ata_port *ap, struct ata_device *adev);
  50. static const struct pci_device_id sch_pci_tbl[] = {
  51. /* Intel SCH PATA Controller */
  52. { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_SCH_IDE), 0 },
  53. { } /* terminate list */
  54. };
  55. static struct pci_driver sch_pci_driver = {
  56. .name = DRV_NAME,
  57. .id_table = sch_pci_tbl,
  58. .probe = sch_init_one,
  59. .remove = ata_pci_remove_one,
  60. #ifdef CONFIG_PM_SLEEP
  61. .suspend = ata_pci_device_suspend,
  62. .resume = ata_pci_device_resume,
  63. #endif
  64. };
  65. static struct scsi_host_template sch_sht = {
  66. ATA_BMDMA_SHT(DRV_NAME),
  67. };
  68. static struct ata_port_operations sch_pata_ops = {
  69. .inherits = &ata_bmdma_port_ops,
  70. .cable_detect = ata_cable_unknown,
  71. .set_piomode = sch_set_piomode,
  72. .set_dmamode = sch_set_dmamode,
  73. };
  74. static struct ata_port_info sch_port_info = {
  75. .flags = ATA_FLAG_SLAVE_POSS,
  76. .pio_mask = ATA_PIO4,
  77. .mwdma_mask = ATA_MWDMA2,
  78. .udma_mask = ATA_UDMA5,
  79. .port_ops = &sch_pata_ops,
  80. };
  81. MODULE_AUTHOR("Alek Du <alek.du@intel.com>");
  82. MODULE_DESCRIPTION("SCSI low-level driver for Intel SCH PATA controllers");
  83. MODULE_LICENSE("GPL");
  84. MODULE_DEVICE_TABLE(pci, sch_pci_tbl);
  85. MODULE_VERSION(DRV_VERSION);
  86. /**
  87. * sch_set_piomode - Initialize host controller PATA PIO timings
  88. * @ap: Port whose timings we are configuring
  89. * @adev: ATA device
  90. *
  91. * Set PIO mode for device, in host controller PCI config space.
  92. *
  93. * LOCKING:
  94. * None (inherited from caller).
  95. */
  96. static void sch_set_piomode(struct ata_port *ap, struct ata_device *adev)
  97. {
  98. unsigned int pio = adev->pio_mode - XFER_PIO_0;
  99. struct pci_dev *dev = to_pci_dev(ap->host->dev);
  100. unsigned int port = adev->devno ? D1TIM : D0TIM;
  101. unsigned int data;
  102. pci_read_config_dword(dev, port, &data);
  103. /* see SCH datasheet page 351 */
  104. /* set PIO mode */
  105. data &= ~(PM | PPE);
  106. data |= pio;
  107. /* enable PPE for block device */
  108. if (adev->class == ATA_DEV_ATA)
  109. data |= PPE;
  110. pci_write_config_dword(dev, port, data);
  111. }
  112. /**
  113. * sch_set_dmamode - Initialize host controller PATA DMA timings
  114. * @ap: Port whose timings we are configuring
  115. * @adev: ATA device
  116. *
  117. * Set MW/UDMA mode for device, in host controller PCI config space.
  118. *
  119. * LOCKING:
  120. * None (inherited from caller).
  121. */
  122. static void sch_set_dmamode(struct ata_port *ap, struct ata_device *adev)
  123. {
  124. unsigned int dma_mode = adev->dma_mode;
  125. struct pci_dev *dev = to_pci_dev(ap->host->dev);
  126. unsigned int port = adev->devno ? D1TIM : D0TIM;
  127. unsigned int data;
  128. pci_read_config_dword(dev, port, &data);
  129. /* see SCH datasheet page 351 */
  130. if (dma_mode >= XFER_UDMA_0) {
  131. /* enable Synchronous DMA mode */
  132. data |= USD;
  133. data &= ~UDM;
  134. data |= (dma_mode - XFER_UDMA_0) << 16;
  135. } else { /* must be MWDMA mode, since we masked SWDMA already */
  136. data &= ~(USD | MDM);
  137. data |= (dma_mode - XFER_MW_DMA_0) << 8;
  138. }
  139. pci_write_config_dword(dev, port, data);
  140. }
  141. /**
  142. * sch_init_one - Register SCH ATA PCI device with kernel services
  143. * @pdev: PCI device to register
  144. * @ent: Entry in sch_pci_tbl matching with @pdev
  145. *
  146. * LOCKING:
  147. * Inherited from PCI layer (may sleep).
  148. *
  149. * RETURNS:
  150. * Zero on success, or -ERRNO value.
  151. */
  152. static int sch_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
  153. {
  154. const struct ata_port_info *ppi[] = { &sch_port_info, NULL };
  155. ata_print_version_once(&pdev->dev, DRV_VERSION);
  156. return ata_pci_bmdma_init_one(pdev, ppi, &sch_sht, NULL, 0);
  157. }
  158. module_pci_driver(sch_pci_driver);