setup.c 21 KB

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  1. /*
  2. * 64-bit pSeries and RS/6000 setup code.
  3. *
  4. * Copyright (C) 1995 Linus Torvalds
  5. * Adapted from 'alpha' version by Gary Thomas
  6. * Modified by Cort Dougan (cort@cs.nmt.edu)
  7. * Modified by PPC64 Team, IBM Corp
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version
  12. * 2 of the License, or (at your option) any later version.
  13. */
  14. /*
  15. * bootup setup stuff..
  16. */
  17. #include <linux/cpu.h>
  18. #include <linux/errno.h>
  19. #include <linux/sched.h>
  20. #include <linux/kernel.h>
  21. #include <linux/mm.h>
  22. #include <linux/stddef.h>
  23. #include <linux/unistd.h>
  24. #include <linux/user.h>
  25. #include <linux/tty.h>
  26. #include <linux/major.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/reboot.h>
  29. #include <linux/init.h>
  30. #include <linux/ioport.h>
  31. #include <linux/console.h>
  32. #include <linux/pci.h>
  33. #include <linux/utsname.h>
  34. #include <linux/adb.h>
  35. #include <linux/export.h>
  36. #include <linux/delay.h>
  37. #include <linux/irq.h>
  38. #include <linux/seq_file.h>
  39. #include <linux/root_dev.h>
  40. #include <linux/of.h>
  41. #include <linux/of_pci.h>
  42. #include <asm/mmu.h>
  43. #include <asm/processor.h>
  44. #include <asm/io.h>
  45. #include <asm/pgtable.h>
  46. #include <asm/prom.h>
  47. #include <asm/rtas.h>
  48. #include <asm/pci-bridge.h>
  49. #include <asm/iommu.h>
  50. #include <asm/dma.h>
  51. #include <asm/machdep.h>
  52. #include <asm/irq.h>
  53. #include <asm/time.h>
  54. #include <asm/nvram.h>
  55. #include <asm/pmc.h>
  56. #include <asm/xics.h>
  57. #include <asm/ppc-pci.h>
  58. #include <asm/i8259.h>
  59. #include <asm/udbg.h>
  60. #include <asm/smp.h>
  61. #include <asm/firmware.h>
  62. #include <asm/eeh.h>
  63. #include <asm/reg.h>
  64. #include <asm/plpar_wrappers.h>
  65. #include <asm/kexec.h>
  66. #include <asm/security_features.h>
  67. #include "pseries.h"
  68. int CMO_PrPSP = -1;
  69. int CMO_SecPSP = -1;
  70. unsigned long CMO_PageSize = (ASM_CONST(1) << IOMMU_PAGE_SHIFT_4K);
  71. EXPORT_SYMBOL(CMO_PageSize);
  72. int fwnmi_active; /* TRUE if an FWNMI handler is present */
  73. static void pSeries_show_cpuinfo(struct seq_file *m)
  74. {
  75. struct device_node *root;
  76. const char *model = "";
  77. root = of_find_node_by_path("/");
  78. if (root)
  79. model = of_get_property(root, "model", NULL);
  80. seq_printf(m, "machine\t\t: CHRP %s\n", model);
  81. of_node_put(root);
  82. }
  83. /* Initialize firmware assisted non-maskable interrupts if
  84. * the firmware supports this feature.
  85. */
  86. static void __init fwnmi_init(void)
  87. {
  88. unsigned long system_reset_addr, machine_check_addr;
  89. int ibm_nmi_register = rtas_token("ibm,nmi-register");
  90. if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE)
  91. return;
  92. /* If the kernel's not linked at zero we point the firmware at low
  93. * addresses anyway, and use a trampoline to get to the real code. */
  94. system_reset_addr = __pa(system_reset_fwnmi) - PHYSICAL_START;
  95. machine_check_addr = __pa(machine_check_fwnmi) - PHYSICAL_START;
  96. if (0 == rtas_call(ibm_nmi_register, 2, 1, NULL, system_reset_addr,
  97. machine_check_addr))
  98. fwnmi_active = 1;
  99. }
  100. static void pseries_8259_cascade(struct irq_desc *desc)
  101. {
  102. struct irq_chip *chip = irq_desc_get_chip(desc);
  103. unsigned int cascade_irq = i8259_irq();
  104. if (cascade_irq)
  105. generic_handle_irq(cascade_irq);
  106. chip->irq_eoi(&desc->irq_data);
  107. }
  108. static void __init pseries_setup_i8259_cascade(void)
  109. {
  110. struct device_node *np, *old, *found = NULL;
  111. unsigned int cascade;
  112. const u32 *addrp;
  113. unsigned long intack = 0;
  114. int naddr;
  115. for_each_node_by_type(np, "interrupt-controller") {
  116. if (of_device_is_compatible(np, "chrp,iic")) {
  117. found = np;
  118. break;
  119. }
  120. }
  121. if (found == NULL) {
  122. printk(KERN_DEBUG "pic: no ISA interrupt controller\n");
  123. return;
  124. }
  125. cascade = irq_of_parse_and_map(found, 0);
  126. if (!cascade) {
  127. printk(KERN_ERR "pic: failed to map cascade interrupt");
  128. return;
  129. }
  130. pr_debug("pic: cascade mapped to irq %d\n", cascade);
  131. for (old = of_node_get(found); old != NULL ; old = np) {
  132. np = of_get_parent(old);
  133. of_node_put(old);
  134. if (np == NULL)
  135. break;
  136. if (strcmp(np->name, "pci") != 0)
  137. continue;
  138. addrp = of_get_property(np, "8259-interrupt-acknowledge", NULL);
  139. if (addrp == NULL)
  140. continue;
  141. naddr = of_n_addr_cells(np);
  142. intack = addrp[naddr-1];
  143. if (naddr > 1)
  144. intack |= ((unsigned long)addrp[naddr-2]) << 32;
  145. }
  146. if (intack)
  147. printk(KERN_DEBUG "pic: PCI 8259 intack at 0x%016lx\n", intack);
  148. i8259_init(found, intack);
  149. of_node_put(found);
  150. irq_set_chained_handler(cascade, pseries_8259_cascade);
  151. }
  152. static void __init pseries_init_irq(void)
  153. {
  154. xics_init();
  155. pseries_setup_i8259_cascade();
  156. }
  157. static void pseries_lpar_enable_pmcs(void)
  158. {
  159. unsigned long set, reset;
  160. set = 1UL << 63;
  161. reset = 0;
  162. plpar_hcall_norets(H_PERFMON, set, reset);
  163. }
  164. static int pci_dn_reconfig_notifier(struct notifier_block *nb, unsigned long action, void *data)
  165. {
  166. struct of_reconfig_data *rd = data;
  167. struct device_node *parent, *np = rd->dn;
  168. struct pci_dn *pdn;
  169. int err = NOTIFY_OK;
  170. switch (action) {
  171. case OF_RECONFIG_ATTACH_NODE:
  172. parent = of_get_parent(np);
  173. pdn = parent ? PCI_DN(parent) : NULL;
  174. if (pdn)
  175. pci_add_device_node_info(pdn->phb, np);
  176. of_node_put(parent);
  177. break;
  178. case OF_RECONFIG_DETACH_NODE:
  179. pdn = PCI_DN(np);
  180. if (pdn)
  181. list_del(&pdn->list);
  182. break;
  183. default:
  184. err = NOTIFY_DONE;
  185. break;
  186. }
  187. return err;
  188. }
  189. static struct notifier_block pci_dn_reconfig_nb = {
  190. .notifier_call = pci_dn_reconfig_notifier,
  191. };
  192. struct kmem_cache *dtl_cache;
  193. #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
  194. /*
  195. * Allocate space for the dispatch trace log for all possible cpus
  196. * and register the buffers with the hypervisor. This is used for
  197. * computing time stolen by the hypervisor.
  198. */
  199. static int alloc_dispatch_logs(void)
  200. {
  201. int cpu, ret;
  202. struct paca_struct *pp;
  203. struct dtl_entry *dtl;
  204. if (!firmware_has_feature(FW_FEATURE_SPLPAR))
  205. return 0;
  206. if (!dtl_cache)
  207. return 0;
  208. for_each_possible_cpu(cpu) {
  209. pp = &paca[cpu];
  210. dtl = kmem_cache_alloc(dtl_cache, GFP_KERNEL);
  211. if (!dtl) {
  212. pr_warn("Failed to allocate dispatch trace log for cpu %d\n",
  213. cpu);
  214. pr_warn("Stolen time statistics will be unreliable\n");
  215. break;
  216. }
  217. pp->dtl_ridx = 0;
  218. pp->dispatch_log = dtl;
  219. pp->dispatch_log_end = dtl + N_DISPATCH_LOG;
  220. pp->dtl_curr = dtl;
  221. }
  222. /* Register the DTL for the current (boot) cpu */
  223. dtl = get_paca()->dispatch_log;
  224. get_paca()->dtl_ridx = 0;
  225. get_paca()->dtl_curr = dtl;
  226. get_paca()->lppaca_ptr->dtl_idx = 0;
  227. /* hypervisor reads buffer length from this field */
  228. dtl->enqueue_to_dispatch_time = cpu_to_be32(DISPATCH_LOG_BYTES);
  229. ret = register_dtl(hard_smp_processor_id(), __pa(dtl));
  230. if (ret)
  231. pr_err("WARNING: DTL registration of cpu %d (hw %d) failed "
  232. "with %d\n", smp_processor_id(),
  233. hard_smp_processor_id(), ret);
  234. get_paca()->lppaca_ptr->dtl_enable_mask = 2;
  235. return 0;
  236. }
  237. #else /* !CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */
  238. static inline int alloc_dispatch_logs(void)
  239. {
  240. return 0;
  241. }
  242. #endif /* CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */
  243. static int alloc_dispatch_log_kmem_cache(void)
  244. {
  245. dtl_cache = kmem_cache_create("dtl", DISPATCH_LOG_BYTES,
  246. DISPATCH_LOG_BYTES, 0, NULL);
  247. if (!dtl_cache) {
  248. pr_warn("Failed to create dispatch trace log buffer cache\n");
  249. pr_warn("Stolen time statistics will be unreliable\n");
  250. return 0;
  251. }
  252. return alloc_dispatch_logs();
  253. }
  254. machine_early_initcall(pseries, alloc_dispatch_log_kmem_cache);
  255. static void pseries_lpar_idle(void)
  256. {
  257. /*
  258. * Default handler to go into low thread priority and possibly
  259. * low power mode by ceding processor to hypervisor
  260. */
  261. /* Indicate to hypervisor that we are idle. */
  262. get_lppaca()->idle = 1;
  263. /*
  264. * Yield the processor to the hypervisor. We return if
  265. * an external interrupt occurs (which are driven prior
  266. * to returning here) or if a prod occurs from another
  267. * processor. When returning here, external interrupts
  268. * are enabled.
  269. */
  270. cede_processor();
  271. get_lppaca()->idle = 0;
  272. }
  273. /*
  274. * Enable relocation on during exceptions. This has partition wide scope and
  275. * may take a while to complete, if it takes longer than one second we will
  276. * just give up rather than wasting any more time on this - if that turns out
  277. * to ever be a problem in practice we can move this into a kernel thread to
  278. * finish off the process later in boot.
  279. */
  280. void pseries_enable_reloc_on_exc(void)
  281. {
  282. long rc;
  283. unsigned int delay, total_delay = 0;
  284. while (1) {
  285. rc = enable_reloc_on_exceptions();
  286. if (!H_IS_LONG_BUSY(rc)) {
  287. if (rc == H_P2) {
  288. pr_info("Relocation on exceptions not"
  289. " supported\n");
  290. } else if (rc != H_SUCCESS) {
  291. pr_warn("Unable to enable relocation"
  292. " on exceptions: %ld\n", rc);
  293. }
  294. break;
  295. }
  296. delay = get_longbusy_msecs(rc);
  297. total_delay += delay;
  298. if (total_delay > 1000) {
  299. pr_warn("Warning: Giving up waiting to enable "
  300. "relocation on exceptions (%u msec)!\n",
  301. total_delay);
  302. return;
  303. }
  304. mdelay(delay);
  305. }
  306. }
  307. EXPORT_SYMBOL(pseries_enable_reloc_on_exc);
  308. void pseries_disable_reloc_on_exc(void)
  309. {
  310. long rc;
  311. while (1) {
  312. rc = disable_reloc_on_exceptions();
  313. if (!H_IS_LONG_BUSY(rc))
  314. break;
  315. mdelay(get_longbusy_msecs(rc));
  316. }
  317. if (rc != H_SUCCESS)
  318. pr_warning("Warning: Failed to disable relocation on "
  319. "exceptions: %ld\n", rc);
  320. }
  321. EXPORT_SYMBOL(pseries_disable_reloc_on_exc);
  322. #ifdef CONFIG_KEXEC
  323. static void pSeries_machine_kexec(struct kimage *image)
  324. {
  325. if (firmware_has_feature(FW_FEATURE_SET_MODE))
  326. pseries_disable_reloc_on_exc();
  327. default_machine_kexec(image);
  328. }
  329. #endif
  330. #ifdef __LITTLE_ENDIAN__
  331. void pseries_big_endian_exceptions(void)
  332. {
  333. long rc;
  334. while (1) {
  335. rc = enable_big_endian_exceptions();
  336. if (!H_IS_LONG_BUSY(rc))
  337. break;
  338. mdelay(get_longbusy_msecs(rc));
  339. }
  340. /*
  341. * At this point it is unlikely panic() will get anything
  342. * out to the user, since this is called very late in kexec
  343. * but at least this will stop us from continuing on further
  344. * and creating an even more difficult to debug situation.
  345. *
  346. * There is a known problem when kdump'ing, if cpus are offline
  347. * the above call will fail. Rather than panicking again, keep
  348. * going and hope the kdump kernel is also little endian, which
  349. * it usually is.
  350. */
  351. if (rc && !kdump_in_progress())
  352. panic("Could not enable big endian exceptions");
  353. }
  354. void pseries_little_endian_exceptions(void)
  355. {
  356. long rc;
  357. while (1) {
  358. rc = enable_little_endian_exceptions();
  359. if (!H_IS_LONG_BUSY(rc))
  360. break;
  361. mdelay(get_longbusy_msecs(rc));
  362. }
  363. if (rc) {
  364. ppc_md.progress("H_SET_MODE LE exception fail", 0);
  365. panic("Could not enable little endian exceptions");
  366. }
  367. }
  368. #endif
  369. static void __init find_and_init_phbs(void)
  370. {
  371. struct device_node *node;
  372. struct pci_controller *phb;
  373. struct device_node *root = of_find_node_by_path("/");
  374. for_each_child_of_node(root, node) {
  375. if (node->type == NULL || (strcmp(node->type, "pci") != 0 &&
  376. strcmp(node->type, "pciex") != 0))
  377. continue;
  378. phb = pcibios_alloc_controller(node);
  379. if (!phb)
  380. continue;
  381. rtas_setup_phb(phb);
  382. pci_process_bridge_OF_ranges(phb, node, 0);
  383. isa_bridge_find_early(phb);
  384. phb->controller_ops = pseries_pci_controller_ops;
  385. }
  386. of_node_put(root);
  387. /*
  388. * PCI_PROBE_ONLY and PCI_REASSIGN_ALL_BUS can be set via properties
  389. * in chosen.
  390. */
  391. of_pci_check_probe_only();
  392. }
  393. static void init_cpu_char_feature_flags(struct h_cpu_char_result *result)
  394. {
  395. /*
  396. * The features below are disabled by default, so we instead look to see
  397. * if firmware has *enabled* them, and set them if so.
  398. */
  399. if (result->character & H_CPU_CHAR_SPEC_BAR_ORI31)
  400. security_ftr_set(SEC_FTR_SPEC_BAR_ORI31);
  401. if (result->character & H_CPU_CHAR_BCCTRL_SERIALISED)
  402. security_ftr_set(SEC_FTR_BCCTRL_SERIALISED);
  403. if (result->character & H_CPU_CHAR_L1D_FLUSH_ORI30)
  404. security_ftr_set(SEC_FTR_L1D_FLUSH_ORI30);
  405. if (result->character & H_CPU_CHAR_L1D_FLUSH_TRIG2)
  406. security_ftr_set(SEC_FTR_L1D_FLUSH_TRIG2);
  407. if (result->character & H_CPU_CHAR_L1D_THREAD_PRIV)
  408. security_ftr_set(SEC_FTR_L1D_THREAD_PRIV);
  409. if (result->character & H_CPU_CHAR_COUNT_CACHE_DISABLED)
  410. security_ftr_set(SEC_FTR_COUNT_CACHE_DISABLED);
  411. /*
  412. * The features below are enabled by default, so we instead look to see
  413. * if firmware has *disabled* them, and clear them if so.
  414. */
  415. if (!(result->behaviour & H_CPU_BEHAV_FAVOUR_SECURITY))
  416. security_ftr_clear(SEC_FTR_FAVOUR_SECURITY);
  417. if (!(result->behaviour & H_CPU_BEHAV_L1D_FLUSH_PR))
  418. security_ftr_clear(SEC_FTR_L1D_FLUSH_PR);
  419. if (!(result->behaviour & H_CPU_BEHAV_BNDS_CHK_SPEC_BAR))
  420. security_ftr_clear(SEC_FTR_BNDS_CHK_SPEC_BAR);
  421. }
  422. void pseries_setup_rfi_flush(void)
  423. {
  424. struct h_cpu_char_result result;
  425. enum l1d_flush_type types;
  426. bool enable;
  427. long rc;
  428. /*
  429. * Set features to the defaults assumed by init_cpu_char_feature_flags()
  430. * so it can set/clear again any features that might have changed after
  431. * migration, and in case the hypercall fails and it is not even called.
  432. */
  433. powerpc_security_features = SEC_FTR_DEFAULT;
  434. rc = plpar_get_cpu_characteristics(&result);
  435. if (rc == H_SUCCESS)
  436. init_cpu_char_feature_flags(&result);
  437. /*
  438. * We're the guest so this doesn't apply to us, clear it to simplify
  439. * handling of it elsewhere.
  440. */
  441. security_ftr_clear(SEC_FTR_L1D_FLUSH_HV);
  442. types = L1D_FLUSH_FALLBACK;
  443. if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_TRIG2))
  444. types |= L1D_FLUSH_MTTRIG;
  445. if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_ORI30))
  446. types |= L1D_FLUSH_ORI;
  447. enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && \
  448. security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR);
  449. setup_rfi_flush(types, enable);
  450. }
  451. static void __init pSeries_setup_arch(void)
  452. {
  453. set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT);
  454. /* Discover PIC type and setup ppc_md accordingly */
  455. smp_init_pseries();
  456. /* openpic global configuration register (64-bit format). */
  457. /* openpic Interrupt Source Unit pointer (64-bit format). */
  458. /* python0 facility area (mmio) (64-bit format) REAL address. */
  459. /* init to some ~sane value until calibrate_delay() runs */
  460. loops_per_jiffy = 50000000;
  461. fwnmi_init();
  462. pseries_setup_rfi_flush();
  463. setup_stf_barrier();
  464. /* By default, only probe PCI (can be overridden by rtas_pci) */
  465. pci_add_flags(PCI_PROBE_ONLY);
  466. /* Find and initialize PCI host bridges */
  467. init_pci_config_tokens();
  468. find_and_init_phbs();
  469. of_reconfig_notifier_register(&pci_dn_reconfig_nb);
  470. pSeries_nvram_init();
  471. if (firmware_has_feature(FW_FEATURE_LPAR)) {
  472. vpa_init(boot_cpuid);
  473. ppc_md.power_save = pseries_lpar_idle;
  474. ppc_md.enable_pmcs = pseries_lpar_enable_pmcs;
  475. } else {
  476. /* No special idle routine */
  477. ppc_md.enable_pmcs = power4_enable_pmcs;
  478. }
  479. ppc_md.pcibios_root_bridge_prepare = pseries_root_bridge_prepare;
  480. }
  481. static int __init pSeries_init_panel(void)
  482. {
  483. /* Manually leave the kernel version on the panel. */
  484. #ifdef __BIG_ENDIAN__
  485. ppc_md.progress("Linux ppc64\n", 0);
  486. #else
  487. ppc_md.progress("Linux ppc64le\n", 0);
  488. #endif
  489. ppc_md.progress(init_utsname()->version, 0);
  490. return 0;
  491. }
  492. machine_arch_initcall(pseries, pSeries_init_panel);
  493. static int pseries_set_dabr(unsigned long dabr, unsigned long dabrx)
  494. {
  495. return plpar_hcall_norets(H_SET_DABR, dabr);
  496. }
  497. static int pseries_set_xdabr(unsigned long dabr, unsigned long dabrx)
  498. {
  499. /* Have to set at least one bit in the DABRX according to PAPR */
  500. if (dabrx == 0 && dabr == 0)
  501. dabrx = DABRX_USER;
  502. /* PAPR says we can only set kernel and user bits */
  503. dabrx &= DABRX_KERNEL | DABRX_USER;
  504. return plpar_hcall_norets(H_SET_XDABR, dabr, dabrx);
  505. }
  506. static int pseries_set_dawr(unsigned long dawr, unsigned long dawrx)
  507. {
  508. /* PAPR says we can't set HYP */
  509. dawrx &= ~DAWRX_HYP;
  510. return plapr_set_watchpoint0(dawr, dawrx);
  511. }
  512. #define CMO_CHARACTERISTICS_TOKEN 44
  513. #define CMO_MAXLENGTH 1026
  514. void pSeries_coalesce_init(void)
  515. {
  516. struct hvcall_mpp_x_data mpp_x_data;
  517. if (firmware_has_feature(FW_FEATURE_CMO) && !h_get_mpp_x(&mpp_x_data))
  518. powerpc_firmware_features |= FW_FEATURE_XCMO;
  519. else
  520. powerpc_firmware_features &= ~FW_FEATURE_XCMO;
  521. }
  522. /**
  523. * fw_cmo_feature_init - FW_FEATURE_CMO is not stored in ibm,hypertas-functions,
  524. * handle that here. (Stolen from parse_system_parameter_string)
  525. */
  526. static void pSeries_cmo_feature_init(void)
  527. {
  528. char *ptr, *key, *value, *end;
  529. int call_status;
  530. int page_order = IOMMU_PAGE_SHIFT_4K;
  531. pr_debug(" -> fw_cmo_feature_init()\n");
  532. spin_lock(&rtas_data_buf_lock);
  533. memset(rtas_data_buf, 0, RTAS_DATA_BUF_SIZE);
  534. call_status = rtas_call(rtas_token("ibm,get-system-parameter"), 3, 1,
  535. NULL,
  536. CMO_CHARACTERISTICS_TOKEN,
  537. __pa(rtas_data_buf),
  538. RTAS_DATA_BUF_SIZE);
  539. if (call_status != 0) {
  540. spin_unlock(&rtas_data_buf_lock);
  541. pr_debug("CMO not available\n");
  542. pr_debug(" <- fw_cmo_feature_init()\n");
  543. return;
  544. }
  545. end = rtas_data_buf + CMO_MAXLENGTH - 2;
  546. ptr = rtas_data_buf + 2; /* step over strlen value */
  547. key = value = ptr;
  548. while (*ptr && (ptr <= end)) {
  549. /* Separate the key and value by replacing '=' with '\0' and
  550. * point the value at the string after the '='
  551. */
  552. if (ptr[0] == '=') {
  553. ptr[0] = '\0';
  554. value = ptr + 1;
  555. } else if (ptr[0] == '\0' || ptr[0] == ',') {
  556. /* Terminate the string containing the key/value pair */
  557. ptr[0] = '\0';
  558. if (key == value) {
  559. pr_debug("Malformed key/value pair\n");
  560. /* Never found a '=', end processing */
  561. break;
  562. }
  563. if (0 == strcmp(key, "CMOPageSize"))
  564. page_order = simple_strtol(value, NULL, 10);
  565. else if (0 == strcmp(key, "PrPSP"))
  566. CMO_PrPSP = simple_strtol(value, NULL, 10);
  567. else if (0 == strcmp(key, "SecPSP"))
  568. CMO_SecPSP = simple_strtol(value, NULL, 10);
  569. value = key = ptr + 1;
  570. }
  571. ptr++;
  572. }
  573. /* Page size is returned as the power of 2 of the page size,
  574. * convert to the page size in bytes before returning
  575. */
  576. CMO_PageSize = 1 << page_order;
  577. pr_debug("CMO_PageSize = %lu\n", CMO_PageSize);
  578. if (CMO_PrPSP != -1 || CMO_SecPSP != -1) {
  579. pr_info("CMO enabled\n");
  580. pr_debug("CMO enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP,
  581. CMO_SecPSP);
  582. powerpc_firmware_features |= FW_FEATURE_CMO;
  583. pSeries_coalesce_init();
  584. } else
  585. pr_debug("CMO not enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP,
  586. CMO_SecPSP);
  587. spin_unlock(&rtas_data_buf_lock);
  588. pr_debug(" <- fw_cmo_feature_init()\n");
  589. }
  590. /*
  591. * Early initialization. Relocation is on but do not reference unbolted pages
  592. */
  593. static void __init pseries_init(void)
  594. {
  595. pr_debug(" -> pseries_init()\n");
  596. #ifdef CONFIG_HVC_CONSOLE
  597. if (firmware_has_feature(FW_FEATURE_LPAR))
  598. hvc_vio_init_early();
  599. #endif
  600. if (firmware_has_feature(FW_FEATURE_XDABR))
  601. ppc_md.set_dabr = pseries_set_xdabr;
  602. else if (firmware_has_feature(FW_FEATURE_DABR))
  603. ppc_md.set_dabr = pseries_set_dabr;
  604. if (firmware_has_feature(FW_FEATURE_SET_MODE))
  605. ppc_md.set_dawr = pseries_set_dawr;
  606. pSeries_cmo_feature_init();
  607. iommu_init_early_pSeries();
  608. pr_debug(" <- pseries_init()\n");
  609. }
  610. /**
  611. * pseries_power_off - tell firmware about how to power off the system.
  612. *
  613. * This function calls either the power-off rtas token in normal cases
  614. * or the ibm,power-off-ups token (if present & requested) in case of
  615. * a power failure. If power-off token is used, power on will only be
  616. * possible with power button press. If ibm,power-off-ups token is used
  617. * it will allow auto poweron after power is restored.
  618. */
  619. static void pseries_power_off(void)
  620. {
  621. int rc;
  622. int rtas_poweroff_ups_token = rtas_token("ibm,power-off-ups");
  623. if (rtas_flash_term_hook)
  624. rtas_flash_term_hook(SYS_POWER_OFF);
  625. if (rtas_poweron_auto == 0 ||
  626. rtas_poweroff_ups_token == RTAS_UNKNOWN_SERVICE) {
  627. rc = rtas_call(rtas_token("power-off"), 2, 1, NULL, -1, -1);
  628. printk(KERN_INFO "RTAS power-off returned %d\n", rc);
  629. } else {
  630. rc = rtas_call(rtas_poweroff_ups_token, 0, 1, NULL);
  631. printk(KERN_INFO "RTAS ibm,power-off-ups returned %d\n", rc);
  632. }
  633. for (;;);
  634. }
  635. static int __init pSeries_probe(void)
  636. {
  637. const char *dtype = of_get_property(of_root, "device_type", NULL);
  638. if (dtype == NULL)
  639. return 0;
  640. if (strcmp(dtype, "chrp"))
  641. return 0;
  642. /* Cell blades firmware claims to be chrp while it's not. Until this
  643. * is fixed, we need to avoid those here.
  644. */
  645. if (of_machine_is_compatible("IBM,CPBW-1.0") ||
  646. of_machine_is_compatible("IBM,CBEA"))
  647. return 0;
  648. pm_power_off = pseries_power_off;
  649. pr_debug("Machine is%s LPAR !\n",
  650. (powerpc_firmware_features & FW_FEATURE_LPAR) ? "" : " not");
  651. pseries_init();
  652. return 1;
  653. }
  654. static int pSeries_pci_probe_mode(struct pci_bus *bus)
  655. {
  656. if (firmware_has_feature(FW_FEATURE_LPAR))
  657. return PCI_PROBE_DEVTREE;
  658. return PCI_PROBE_NORMAL;
  659. }
  660. struct pci_controller_ops pseries_pci_controller_ops = {
  661. .probe_mode = pSeries_pci_probe_mode,
  662. };
  663. define_machine(pseries) {
  664. .name = "pSeries",
  665. .probe = pSeries_probe,
  666. .setup_arch = pSeries_setup_arch,
  667. .init_IRQ = pseries_init_irq,
  668. .show_cpuinfo = pSeries_show_cpuinfo,
  669. .log_error = pSeries_log_error,
  670. .pcibios_fixup = pSeries_final_fixup,
  671. .restart = rtas_restart,
  672. .halt = rtas_halt,
  673. .panic = rtas_os_term,
  674. .get_boot_time = rtas_get_boot_time,
  675. .get_rtc_time = rtas_get_rtc_time,
  676. .set_rtc_time = rtas_set_rtc_time,
  677. .calibrate_decr = generic_calibrate_decr,
  678. .progress = rtas_progress,
  679. .system_reset_exception = pSeries_system_reset_exception,
  680. .machine_check_exception = pSeries_machine_check_exception,
  681. #ifdef CONFIG_KEXEC
  682. .machine_kexec = pSeries_machine_kexec,
  683. .kexec_cpu_down = pseries_kexec_cpu_down,
  684. #endif
  685. #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
  686. .memory_block_size = pseries_memory_block_size,
  687. #endif
  688. };