dma-mapping.c 4.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198
  1. /*
  2. * Copyright (C) 2011 Tobias Klauser <tklauser@distanz.ch>
  3. * Copyright (C) 2009 Wind River Systems Inc
  4. * Implemented by fredrik.markstrom@gmail.com and ivarholmqvist@gmail.com
  5. *
  6. * Based on DMA code from MIPS.
  7. *
  8. * This file is subject to the terms and conditions of the GNU General Public
  9. * License. See the file "COPYING" in the main directory of this archive
  10. * for more details.
  11. */
  12. #include <linux/types.h>
  13. #include <linux/mm.h>
  14. #include <linux/export.h>
  15. #include <linux/string.h>
  16. #include <linux/scatterlist.h>
  17. #include <linux/dma-mapping.h>
  18. #include <linux/io.h>
  19. #include <linux/cache.h>
  20. #include <asm/cacheflush.h>
  21. static inline void __dma_sync_for_device(void *vaddr, size_t size,
  22. enum dma_data_direction direction)
  23. {
  24. switch (direction) {
  25. case DMA_FROM_DEVICE:
  26. invalidate_dcache_range((unsigned long)vaddr,
  27. (unsigned long)(vaddr + size));
  28. break;
  29. case DMA_TO_DEVICE:
  30. /*
  31. * We just need to flush the caches here , but Nios2 flush
  32. * instruction will do both writeback and invalidate.
  33. */
  34. case DMA_BIDIRECTIONAL: /* flush and invalidate */
  35. flush_dcache_range((unsigned long)vaddr,
  36. (unsigned long)(vaddr + size));
  37. break;
  38. default:
  39. BUG();
  40. }
  41. }
  42. static inline void __dma_sync_for_cpu(void *vaddr, size_t size,
  43. enum dma_data_direction direction)
  44. {
  45. switch (direction) {
  46. case DMA_BIDIRECTIONAL:
  47. case DMA_FROM_DEVICE:
  48. invalidate_dcache_range((unsigned long)vaddr,
  49. (unsigned long)(vaddr + size));
  50. break;
  51. case DMA_TO_DEVICE:
  52. break;
  53. default:
  54. BUG();
  55. }
  56. }
  57. static void *nios2_dma_alloc(struct device *dev, size_t size,
  58. dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs)
  59. {
  60. void *ret;
  61. /* ignore region specifiers */
  62. gfp &= ~(__GFP_DMA | __GFP_HIGHMEM);
  63. /* optimized page clearing */
  64. gfp |= __GFP_ZERO;
  65. if (dev == NULL || (dev->coherent_dma_mask < 0xffffffff))
  66. gfp |= GFP_DMA;
  67. ret = (void *) __get_free_pages(gfp, get_order(size));
  68. if (ret != NULL) {
  69. *dma_handle = virt_to_phys(ret);
  70. flush_dcache_range((unsigned long) ret,
  71. (unsigned long) ret + size);
  72. ret = UNCAC_ADDR(ret);
  73. }
  74. return ret;
  75. }
  76. static void nios2_dma_free(struct device *dev, size_t size, void *vaddr,
  77. dma_addr_t dma_handle, unsigned long attrs)
  78. {
  79. unsigned long addr = (unsigned long) CAC_ADDR((unsigned long) vaddr);
  80. free_pages(addr, get_order(size));
  81. }
  82. static int nios2_dma_map_sg(struct device *dev, struct scatterlist *sg,
  83. int nents, enum dma_data_direction direction,
  84. unsigned long attrs)
  85. {
  86. int i;
  87. for_each_sg(sg, sg, nents, i) {
  88. void *addr;
  89. addr = sg_virt(sg);
  90. if (addr) {
  91. __dma_sync_for_device(addr, sg->length, direction);
  92. sg->dma_address = sg_phys(sg);
  93. }
  94. }
  95. return nents;
  96. }
  97. static dma_addr_t nios2_dma_map_page(struct device *dev, struct page *page,
  98. unsigned long offset, size_t size,
  99. enum dma_data_direction direction,
  100. unsigned long attrs)
  101. {
  102. void *addr = page_address(page) + offset;
  103. __dma_sync_for_device(addr, size, direction);
  104. return page_to_phys(page) + offset;
  105. }
  106. static void nios2_dma_unmap_page(struct device *dev, dma_addr_t dma_address,
  107. size_t size, enum dma_data_direction direction,
  108. unsigned long attrs)
  109. {
  110. __dma_sync_for_cpu(phys_to_virt(dma_address), size, direction);
  111. }
  112. static void nios2_dma_unmap_sg(struct device *dev, struct scatterlist *sg,
  113. int nhwentries, enum dma_data_direction direction,
  114. unsigned long attrs)
  115. {
  116. void *addr;
  117. int i;
  118. if (direction == DMA_TO_DEVICE)
  119. return;
  120. for_each_sg(sg, sg, nhwentries, i) {
  121. addr = sg_virt(sg);
  122. if (addr)
  123. __dma_sync_for_cpu(addr, sg->length, direction);
  124. }
  125. }
  126. static void nios2_dma_sync_single_for_cpu(struct device *dev,
  127. dma_addr_t dma_handle, size_t size,
  128. enum dma_data_direction direction)
  129. {
  130. __dma_sync_for_cpu(phys_to_virt(dma_handle), size, direction);
  131. }
  132. static void nios2_dma_sync_single_for_device(struct device *dev,
  133. dma_addr_t dma_handle, size_t size,
  134. enum dma_data_direction direction)
  135. {
  136. __dma_sync_for_device(phys_to_virt(dma_handle), size, direction);
  137. }
  138. static void nios2_dma_sync_sg_for_cpu(struct device *dev,
  139. struct scatterlist *sg, int nelems,
  140. enum dma_data_direction direction)
  141. {
  142. int i;
  143. /* Make sure that gcc doesn't leave the empty loop body. */
  144. for_each_sg(sg, sg, nelems, i)
  145. __dma_sync_for_cpu(sg_virt(sg), sg->length, direction);
  146. }
  147. static void nios2_dma_sync_sg_for_device(struct device *dev,
  148. struct scatterlist *sg, int nelems,
  149. enum dma_data_direction direction)
  150. {
  151. int i;
  152. /* Make sure that gcc doesn't leave the empty loop body. */
  153. for_each_sg(sg, sg, nelems, i)
  154. __dma_sync_for_device(sg_virt(sg), sg->length, direction);
  155. }
  156. struct dma_map_ops nios2_dma_ops = {
  157. .alloc = nios2_dma_alloc,
  158. .free = nios2_dma_free,
  159. .map_page = nios2_dma_map_page,
  160. .unmap_page = nios2_dma_unmap_page,
  161. .map_sg = nios2_dma_map_sg,
  162. .unmap_sg = nios2_dma_unmap_sg,
  163. .sync_single_for_device = nios2_dma_sync_single_for_device,
  164. .sync_single_for_cpu = nios2_dma_sync_single_for_cpu,
  165. .sync_sg_for_cpu = nios2_dma_sync_sg_for_cpu,
  166. .sync_sg_for_device = nios2_dma_sync_sg_for_device,
  167. };
  168. EXPORT_SYMBOL(nios2_dma_ops);